X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fhns3%2Fhns3_rxtx.h;h=66893976056123de5d6c2be4e9fd43bc88786cd3;hb=ed9726ce83eb7562b3dcfaf0ee10647ed816ae4a;hp=8a0c981bc4aec3dd49952b17b2ffca0fa167226d;hpb=9b77f1fe303f1f9b6e5af0428d03fe07f17687a9;p=dpdk.git

diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index 8a0c981bc4..6689397605 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -88,6 +88,8 @@
 #define HNS3_RXD_OL3ID_M			(0xf << HNS3_RXD_OL3ID_S)
 #define HNS3_RXD_OL4ID_S			8
 #define HNS3_RXD_OL4ID_M			(0xf << HNS3_RXD_OL4ID_S)
+#define HNS3_RXD_PTYPE_S			4
+#define HNS3_RXD_PTYPE_M			(0xff << HNS3_RXD_PTYPE_S)
 #define HNS3_RXD_FBHI_S				12
 #define HNS3_RXD_FBHI_M				(0x3 << HNS3_RXD_FBHI_S)
 #define HNS3_RXD_FBLI_S				14
@@ -147,6 +149,7 @@
 #define HNS3_TXD_MSS_S				0
 #define HNS3_TXD_MSS_M				(0x3fff << HNS3_TXD_MSS_S)
 
+#define HNS3_TXD_OL4CS_B			22
 #define HNS3_L2_LEN_UNIT			1UL
 #define HNS3_L3_LEN_UNIT			2UL
 #define HNS3_L4_LEN_UNIT			2UL
@@ -232,7 +235,7 @@ struct hns3_desc {
 				};
 			};
 
-			uint32_t paylen;
+			uint32_t paylen_fd_dop_ol4cs;
 			uint16_t tp_fe_sc_vld_ra_ri;
 			uint16_t mss;
 		} tx;
@@ -266,6 +269,12 @@ struct hns3_entry {
 	struct rte_mbuf *mbuf;
 };
 
+struct hns3_rx_basic_stats {
+	uint64_t packets;
+	uint64_t bytes;
+	uint64_t errors;
+};
+
 struct hns3_rx_dfx_stats {
 	uint64_t l3_csum_errors;
 	uint64_t l4_csum_errors;
@@ -322,8 +331,10 @@ struct hns3_rx_queue {
 	 * point, the pvid_sw_discard_en will be false.
 	 */
 	bool pvid_sw_discard_en;
+	bool ptype_en;          /* indicate if the ptype field enabled */
 	bool enabled;           /* indicate if Rx queue has been enabled */
 
+	struct hns3_rx_basic_stats basic_stats;
 	/* DFX statistics that driver does not need to discard packets */
 	struct hns3_rx_dfx_stats dfx_stats;
 	/* Error statistics that driver needs to discard packets */
@@ -338,6 +349,11 @@ struct hns3_rx_queue {
 	struct rte_mbuf fake_mbuf; /* fake mbuf used with vector rx */
 };
 
+struct hns3_tx_basic_stats {
+	uint64_t packets;
+	uint64_t bytes;
+};
+
 /*
  * The following items are used for the abnormal errors statistics in
  * the Tx datapath. When upper level application calls the
@@ -448,6 +464,22 @@ struct hns3_tx_queue {
 	 *     not need to recalculate it.
 	 */
 	uint8_t tso_mode;
+	/*
+	 * udp checksum mode.
+	 * value range:
+	 *      HNS3_SPECIAL_PORT_HW_CKSUM_MODE/HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+	 *
+	 *  - HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+	 *     In this mode, HW can not do checksum for special UDP port like
+	 *     4789, 4790, 6081 for non-tunnel UDP packets and UDP tunnel
+	 *     packets without the PKT_TX_TUNEL_MASK in the mbuf. So, PMD need
+	 *     do the checksum for these packets to avoid a checksum error.
+	 *
+	 *  - HNS3_SPECIAL_PORT_HW_CKSUM_MODE
+	 *     In this mode, HW does not have the preceding problems and can
+	 *     directly calculate the checksum of these UDP packets.
+	 */
+	uint8_t udp_cksum_mode;
 	/*
 	 * The minimum length of the packet supported by hardware in the Tx
 	 * direction.
@@ -472,6 +504,7 @@ struct hns3_tx_queue {
 	bool pvid_sw_shift_en;
 	bool enabled;           /* indicate if Tx queue has been enabled */
 
+	struct hns3_tx_basic_stats basic_stats;
 	struct hns3_tx_dfx_stats dfx_stats;
 };
 
@@ -487,6 +520,7 @@ struct hns3_queue_info {
 };
 
 #define HNS3_TX_CKSUM_OFFLOAD_MASK ( \
+	PKT_TX_OUTER_UDP_CKSUM | \
 	PKT_TX_OUTER_IP_CKSUM | \
 	PKT_TX_IP_CKSUM | \
 	PKT_TX_TCP_SEG | \
@@ -596,6 +630,13 @@ hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info,
 	const struct hns3_ptype_table * const ptype_tbl = rxq->ptype_tbl;
 	uint32_t l2id, l3id, l4id;
 	uint32_t ol3id, ol4id, ol2id;
+	uint32_t ptype;
+
+	if (rxq->ptype_en) {
+		ptype = hns3_get_field(ol_info, HNS3_RXD_PTYPE_M,
+				       HNS3_RXD_PTYPE_S);
+		return ptype_tbl->ptype[ptype];
+	}
 
 	ol4id = hns3_get_field(ol_info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
 	ol3id = hns3_get_field(ol_info, HNS3_RXD_OL3ID_M, HNS3_RXD_OL3ID_S);
@@ -667,6 +708,7 @@ int hns3_tx_burst_mode_get(struct rte_eth_dev *dev,
 const uint32_t *hns3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 void hns3_init_rx_ptype_tble(struct rte_eth_dev *dev);
 void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev);
+uint32_t hns3_get_tqp_intr_reg_offset(uint16_t tqp_intr_id);
 void hns3_set_queue_intr_gl(struct hns3_hw *hw, uint16_t queue_id,
 			    uint8_t gl_idx, uint16_t gl_value);
 void hns3_set_queue_intr_rl(struct hns3_hw *hw, uint16_t queue_id,
@@ -692,5 +734,9 @@ int hns3_start_all_txqs(struct rte_eth_dev *dev);
 int hns3_start_all_rxqs(struct rte_eth_dev *dev);
 void hns3_stop_all_txqs(struct rte_eth_dev *dev);
 void hns3_restore_tqp_enable_state(struct hns3_hw *hw);
+int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
+void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
+int hns3_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
 
 #endif /* _HNS3_RXTX_H_ */