X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fi40e%2Frte_pmd_i40e.c;h=17938e7d305be8b0ac4e258d700e5fa84483e55a;hb=675911d0330b0802e845657c3f4edc5886cf8685;hp=4c3c7088a09e7e258ef2fd06b4544cd8afa32809;hpb=73bd0ad5936de7a3152850b22f0d08e5c7bd1f5a;p=dpdk.git

diff --git a/drivers/net/i40e/rte_pmd_i40e.c b/drivers/net/i40e/rte_pmd_i40e.c
index 4c3c7088a0..17938e7d30 100644
--- a/drivers/net/i40e/rte_pmd_i40e.c
+++ b/drivers/net/i40e/rte_pmd_i40e.c
@@ -1409,7 +1409,7 @@ rte_pmd_i40e_set_tc_strict_prio(uint16_t port, uint8_t tc_map)
 
 	/* Disable DCBx if it's the first time to set strict priority. */
 	if (!veb->strict_prio_tc) {
-		ret = i40e_aq_stop_lldp(hw, true, NULL);
+		ret = i40e_aq_stop_lldp(hw, true, true, NULL);
 		if (ret)
 			PMD_DRV_LOG(INFO,
 				    "Failed to disable DCBx as it's already"
@@ -1464,7 +1464,7 @@ rte_pmd_i40e_set_tc_strict_prio(uint16_t port, uint8_t tc_map)
 
 	/* Enable DCBx again, if all the TCs' strict priority disabled. */
 	if (!tc_map) {
-		ret = i40e_aq_start_lldp(hw, NULL);
+		ret = i40e_aq_start_lldp(hw, true, NULL);
 		if (ret) {
 			PMD_DRV_LOG(ERR,
 				    "Failed to enable DCBx, err(%d).", ret);
@@ -2169,10 +2169,10 @@ static int check_invalid_pkt_type(uint32_t pkt_type)
 	    tnl != RTE_PTYPE_TUNNEL_VXLAN &&
 	    tnl != RTE_PTYPE_TUNNEL_NVGRE &&
 	    tnl != RTE_PTYPE_TUNNEL_GENEVE &&
-	    tnl != RTE_PTYPE_TUNNEL_GRENAT &&
 	    tnl != RTE_PTYPE_TUNNEL_GTPC &&
 	    tnl != RTE_PTYPE_TUNNEL_GTPU &&
-	    tnl != RTE_PTYPE_TUNNEL_L2TP)
+	    tnl != RTE_PTYPE_TUNNEL_L2TP &&
+	    tnl != RTE_PTYPE_TUNNEL_ESP)
 		return -1;
 
 	if (il2 &&
@@ -3207,3 +3207,75 @@ rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype,
 	I40E_WRITE_FLUSH(hw);
 	return 0;
 }
+
+int
+rte_pmd_i40e_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info)
+{
+	struct rte_eth_dev *dev;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_i40e_supported(dev))
+		return -ENOTSUP;
+
+	i40e_fdir_info_get(dev, fdir_info);
+
+	return 0;
+}
+
+int
+rte_pmd_i40e_get_fdir_stats(uint16_t port, struct rte_eth_fdir_stats *fdir_stat)
+{
+	struct rte_eth_dev *dev;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_i40e_supported(dev))
+		return -ENOTSUP;
+
+	i40e_fdir_stats_get(dev, fdir_stat);
+
+	return 0;
+}
+
+int
+rte_pmd_i40e_set_gre_key_len(uint16_t port, uint8_t len)
+{
+	struct rte_eth_dev *dev;
+	struct i40e_pf *pf;
+	struct i40e_hw *hw;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_i40e_supported(dev))
+		return -ENOTSUP;
+
+	pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+	hw = I40E_PF_TO_HW(pf);
+
+	return i40e_dev_set_gre_key_len(hw, len);
+}
+
+int
+rte_pmd_i40e_set_switch_dev(uint16_t port_id, struct rte_eth_dev *switch_dev)
+{
+	struct rte_eth_dev *i40e_dev;
+	struct i40e_hw *hw;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+
+	i40e_dev = &rte_eth_devices[port_id];
+	if (!is_i40e_supported(i40e_dev))
+		return -ENOTSUP;
+
+	hw = I40E_DEV_PRIVATE_TO_HW(i40e_dev->data->dev_private);
+	if (!hw)
+		return -1;
+
+	hw->switch_dev = switch_dev;
+
+	return 0;
+}