X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fice%2Fice_dcf_ethdev.c;h=f510bad381db003643c6367740a2d9daa20f305f;hb=a972972fe00a9f06f6fa8632981c4ee6ef8cdcd1;hp=69fe6e63d1d3281eed822a9b336a8868882bee33;hpb=3a6bfc37eaf49b46af211beb0e448b5ad862d017;p=dpdk.git

diff --git a/drivers/net/ice/ice_dcf_ethdev.c b/drivers/net/ice/ice_dcf_ethdev.c
index 69fe6e63d1..f510bad381 100644
--- a/drivers/net/ice/ice_dcf_ethdev.c
+++ b/drivers/net/ice/ice_dcf_ethdev.c
@@ -32,6 +32,12 @@ static int
 ice_dcf_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
 				struct rte_eth_udp_tunnel *udp_tunnel);
 
+static int
+ice_dcf_dev_init(struct rte_eth_dev *eth_dev);
+
+static int
+ice_dcf_dev_uninit(struct rte_eth_dev *eth_dev);
+
 static uint16_t
 ice_dcf_recv_pkts(__rte_unused void *rx_queue,
 		  __rte_unused struct rte_mbuf **bufs,
@@ -172,10 +178,15 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,
 		    VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {
 			/* If WB_ON_ITR supports, enable it */
 			hw->msix_base = IAVF_RX_VEC_START;
+			/* Set the ITR for index zero, to 2us to make sure that
+			 * we leave time for aggregation to occur, but don't
+			 * increase latency dramatically.
+			 */
 			IAVF_WRITE_REG(&hw->avf,
 				       IAVF_VFINT_DYN_CTLN1(hw->msix_base - 1),
-				       IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK |
-				       IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK);
+				       (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
+				       IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
+				       (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
 		} else {
 			/* If no WB_ON_ITR offload flags, need to set
 			 * interrupt for descriptor write back.
@@ -511,6 +522,12 @@ ice_dcf_dev_start(struct rte_eth_dev *dev)
 	struct ice_dcf_hw *hw = &dcf_ad->real_hw;
 	int ret;
 
+	if (hw->resetting) {
+		PMD_DRV_LOG(ERR,
+			    "The DCF has been reset by PF, please reinit first");
+		return -EIO;
+	}
+
 	ad->pf.adapter_stopped = 0;
 
 	hw->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
@@ -585,6 +602,7 @@ ice_dcf_stop_queues(struct rte_eth_dev *dev)
 		txq->tx_rel_mbufs(txq);
 		reset_tx_queue(txq);
 		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+		dev->data->tx_queues[i] = NULL;
 	}
 	for (i = 0; i < dev->data->nb_rx_queues; i++) {
 		rxq = dev->data->rx_queues[i];
@@ -593,6 +611,7 @@ ice_dcf_stop_queues(struct rte_eth_dev *dev)
 		rxq->rx_rel_mbufs(rxq);
 		reset_rx_queue(rxq);
 		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+		dev->data->rx_queues[i] = NULL;
 	}
 }
 
@@ -622,7 +641,6 @@ ice_dcf_dev_stop(struct rte_eth_dev *dev)
 	ice_dcf_add_del_all_mac_addr(&dcf_ad->real_hw, false);
 	dev->data->dev_link.link_status = ETH_LINK_DOWN;
 	ad->pf.adapter_stopped = 1;
-	dcf_ad->real_hw.tm_conf.committed = false;
 
 	return 0;
 }
@@ -806,6 +824,12 @@ ice_dcf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 	struct virtchnl_eth_stats pstats;
 	int ret;
 
+	if (hw->resetting) {
+		PMD_DRV_LOG(ERR,
+			    "The DCF has been reset by PF, please reinit first");
+		return -EIO;
+	}
+
 	ret = ice_dcf_query_stats(hw, &pstats);
 	if (ret == 0) {
 		ice_dcf_update_stats(&hw->eth_stats_offset, &pstats);
@@ -832,6 +856,9 @@ ice_dcf_stats_reset(struct rte_eth_dev *dev)
 	struct virtchnl_eth_stats pstats;
 	int ret;
 
+	if (hw->resetting)
+		return 0;
+
 	/* read stat values to clear hardware registers */
 	ret = ice_dcf_query_stats(hw, &pstats);
 	if (ret != 0)
@@ -875,6 +902,8 @@ ice_dcf_dev_close(struct rte_eth_dev *dev)
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
+	(void)ice_dcf_dev_stop(dev);
+
 	ice_dcf_free_repr_info(adapter);
 	ice_dcf_uninit_parent_adapter(dev);
 	ice_dcf_uninit_hw(dev, &adapter->real_hw);
@@ -1007,10 +1036,25 @@ ice_dcf_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
 	return 0;
 }
 
+static int
+ice_dcf_dev_reset(struct rte_eth_dev *dev)
+{
+	int ret;
+
+	ret = ice_dcf_dev_uninit(dev);
+	if (ret)
+		return ret;
+
+	ret = ice_dcf_dev_init(dev);
+
+	return ret;
+}
+
 static const struct eth_dev_ops ice_dcf_eth_dev_ops = {
 	.dev_start               = ice_dcf_dev_start,
 	.dev_stop                = ice_dcf_dev_stop,
 	.dev_close               = ice_dcf_dev_close,
+	.dev_reset               = ice_dcf_dev_reset,
 	.dev_configure           = ice_dcf_dev_configure,
 	.dev_infos_get           = ice_dcf_dev_info_get,
 	.rx_queue_setup          = ice_rx_queue_setup,
@@ -1039,6 +1083,7 @@ ice_dcf_dev_init(struct rte_eth_dev *eth_dev)
 {
 	struct ice_dcf_adapter *adapter = eth_dev->data->dev_private;
 
+	adapter->real_hw.resetting = false;
 	eth_dev->dev_ops = &ice_dcf_eth_dev_ops;
 	eth_dev->rx_pkt_burst = ice_dcf_recv_pkts;
 	eth_dev->tx_pkt_burst = ice_dcf_xmit_pkts;