X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fice%2Fice_ethdev.c;h=51b99c6506f58e22cb6d735a70316708a2393515;hb=a4e480de268eaabbb2251b2f1782ae0f05f005a9;hp=9d2210a45e98ac81f76c29deea294c9767348fde;hpb=1161029318a94eba01ea3e23553bb2106cab4056;p=dpdk.git diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 9d2210a45e..51b99c6506 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -14,6 +14,8 @@ #include "base/ice_flow.h" #include "base/ice_dcb.h" #include "base/ice_common.h" + +#include "rte_pmd_ice.h" #include "ice_ethdev.h" #include "ice_rxtx.h" #include "ice_generic_flow.h" @@ -30,35 +32,52 @@ static const char * const ice_valid_args[] = { NULL }; -#define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100 +static const struct rte_mbuf_dynfield ice_proto_xtr_metadata_param = { + .name = "ice_dynfield_proto_xtr_metadata", + .size = sizeof(uint32_t), + .align = __alignof__(uint32_t), + .flags = 0, +}; + +struct proto_xtr_ol_flag { + const struct rte_mbuf_dynflag param; + uint64_t *ol_flag; + bool required; +}; + +static bool ice_proto_xtr_hw_support[PROTO_XTR_MAX]; + +static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = { + [PROTO_XTR_VLAN] = { + .param = { .name = "ice_dynflag_proto_xtr_vlan" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_vlan_mask }, + [PROTO_XTR_IPV4] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv4" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv4_mask }, + [PROTO_XTR_IPV6] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv6" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv6_mask }, + [PROTO_XTR_IPV6_FLOW] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv6_flow" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask }, + [PROTO_XTR_TCP] = { + .param = { .name = "ice_dynflag_proto_xtr_tcp" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_tcp_mask }, + [PROTO_XTR_IP_OFFSET] = { + .param = { .name = "ice_dynflag_proto_xtr_ip_offset" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ip_offset_mask }, +}; -/* DDP package search path */ -#define ICE_PKG_FILE_DEFAULT "/lib/firmware/intel/ice/ddp/ice.pkg" -#define ICE_PKG_FILE_UPDATES "/lib/firmware/updates/intel/ice/ddp/ice.pkg" -#define ICE_PKG_FILE_SEARCH_PATH_DEFAULT "/lib/firmware/intel/ice/ddp/" -#define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/" +#define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100 #define ICE_OS_DEFAULT_PKG_NAME "ICE OS Default Package" #define ICE_COMMS_PKG_NAME "ICE COMMS Package" -#define ICE_MAX_PKG_FILENAME_SIZE 256 #define ICE_MAX_RES_DESC_NUM 1024 -int ice_logtype_init; -int ice_logtype_driver; -#ifdef RTE_LIBRTE_ICE_DEBUG_RX -int ice_logtype_rx; -#endif -#ifdef RTE_LIBRTE_ICE_DEBUG_TX -int ice_logtype_tx; -#endif -#ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE -int ice_logtype_tx_free; -#endif - static int ice_dev_configure(struct rte_eth_dev *dev); static int ice_dev_start(struct rte_eth_dev *dev); -static void ice_dev_stop(struct rte_eth_dev *dev); -static void ice_dev_close(struct rte_eth_dev *dev); +static int ice_dev_stop(struct rte_eth_dev *dev); +static int ice_dev_close(struct rte_eth_dev *dev); static int ice_dev_reset(struct rte_eth_dev *dev); static int ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info); @@ -69,9 +88,6 @@ static int ice_dev_set_link_down(struct rte_eth_dev *dev); static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); -static int ice_vlan_tpid_set(struct rte_eth_dev *dev, - enum rte_vlan_type vlan_type, - uint16_t tpid); static int ice_rss_reta_update(struct rte_eth_dev *dev, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); @@ -125,9 +141,26 @@ static int ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, struct rte_eth_udp_tunnel *udp_tunnel); static const struct rte_pci_id pci_id_ice_map[] = { + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_QSFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_QSFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SGMII) }, { .vendor_id = 0, /* sentinel */ }, }; @@ -156,7 +189,6 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .mac_addr_remove = ice_macaddr_remove, .vlan_filter_set = ice_vlan_filter_set, .vlan_offload_set = ice_vlan_offload_set, - .vlan_tpid_set = ice_vlan_tpid_set, .reta_update = ice_rss_reta_update, .reta_query = ice_rss_reta_query, .rss_hash_update = ice_rss_hash_update, @@ -175,9 +207,6 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .tx_burst_mode_get = ice_tx_burst_mode_get, .get_eeprom_length = ice_get_eeprom_length, .get_eeprom = ice_get_eeprom, - .rx_queue_count = ice_rx_queue_count, - .rx_descriptor_status = ice_rx_descriptor_status, - .tx_descriptor_status = ice_tx_descriptor_status, .stats_get = ice_stats_get, .stats_reset = ice_stats_reset, .xstats_get = ice_xstats_get, @@ -186,6 +215,7 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .filter_ctrl = ice_dev_filter_ctrl, .udp_tunnel_port_add = ice_dev_udp_tunnel_port_add, .udp_tunnel_port_del = ice_dev_udp_tunnel_port_del, + .tx_done_cleanup = ice_tx_done_cleanup, }; /* store statistics names and its offset in stats structure */ @@ -295,6 +325,7 @@ lookup_proto_xtr_type(const char *xtr_name) { "ipv6", PROTO_XTR_IPV6 }, { "ipv6_flow", PROTO_XTR_IPV6_FLOW }, { "tcp", PROTO_XTR_TCP }, + { "ip_offset", PROTO_XTR_IP_OFFSET }, }; uint32_t i; @@ -510,25 +541,40 @@ handle_proto_xtr_arg(__rte_unused const char *key, const char *value, return 0; } -static bool -ice_proto_xtr_support(struct ice_hw *hw) +static void +ice_check_proto_xtr_support(struct ice_hw *hw) { #define FLX_REG(val, fld, idx) \ (((val) & GLFLXP_RXDID_FLX_WRD_##idx##_##fld##_M) >> \ GLFLXP_RXDID_FLX_WRD_##idx##_##fld##_S) static struct { uint32_t rxdid; - uint16_t protid_0; - uint16_t protid_1; + uint8_t opcode; + uint8_t protid_0; + uint8_t protid_1; } xtr_sets[] = { - { ICE_RXDID_COMMS_AUX_VLAN, ICE_PROT_EVLAN_O, ICE_PROT_VLAN_O }, - { ICE_RXDID_COMMS_AUX_IPV4, ICE_PROT_IPV4_OF_OR_S, - ICE_PROT_IPV4_OF_OR_S }, - { ICE_RXDID_COMMS_AUX_IPV6, ICE_PROT_IPV6_OF_OR_S, - ICE_PROT_IPV6_OF_OR_S }, - { ICE_RXDID_COMMS_AUX_IPV6_FLOW, ICE_PROT_IPV6_OF_OR_S, - ICE_PROT_IPV6_OF_OR_S }, - { ICE_RXDID_COMMS_AUX_TCP, ICE_PROT_TCP_IL, ICE_PROT_ID_INVAL }, + [PROTO_XTR_VLAN] = { ICE_RXDID_COMMS_AUX_VLAN, + ICE_RX_OPC_EXTRACT, + ICE_PROT_EVLAN_O, ICE_PROT_VLAN_O}, + [PROTO_XTR_IPV4] = { ICE_RXDID_COMMS_AUX_IPV4, + ICE_RX_OPC_EXTRACT, + ICE_PROT_IPV4_OF_OR_S, + ICE_PROT_IPV4_OF_OR_S }, + [PROTO_XTR_IPV6] = { ICE_RXDID_COMMS_AUX_IPV6, + ICE_RX_OPC_EXTRACT, + ICE_PROT_IPV6_OF_OR_S, + ICE_PROT_IPV6_OF_OR_S }, + [PROTO_XTR_IPV6_FLOW] = { ICE_RXDID_COMMS_AUX_IPV6_FLOW, + ICE_RX_OPC_EXTRACT, + ICE_PROT_IPV6_OF_OR_S, + ICE_PROT_IPV6_OF_OR_S }, + [PROTO_XTR_TCP] = { ICE_RXDID_COMMS_AUX_TCP, + ICE_RX_OPC_EXTRACT, + ICE_PROT_TCP_IL, ICE_PROT_ID_INVAL }, + [PROTO_XTR_IP_OFFSET] = { ICE_RXDID_COMMS_AUX_IP_OFFSET, + ICE_RX_OPC_PROTID, + ICE_PROT_IPV4_OF_OR_S, + ICE_PROT_IPV6_OF_OR_S }, }; uint32_t i; @@ -539,21 +585,19 @@ ice_proto_xtr_support(struct ice_hw *hw) if (xtr_sets[i].protid_0 != ICE_PROT_ID_INVAL) { v = ICE_READ_REG(hw, GLFLXP_RXDID_FLX_WRD_4(rxdid)); - if (FLX_REG(v, PROT_MDID, 4) != xtr_sets[i].protid_0 || - FLX_REG(v, RXDID_OPCODE, 4) != ICE_RX_OPC_EXTRACT) - return false; + if (FLX_REG(v, PROT_MDID, 4) == xtr_sets[i].protid_0 && + FLX_REG(v, RXDID_OPCODE, 4) == xtr_sets[i].opcode) + ice_proto_xtr_hw_support[i] = true; } if (xtr_sets[i].protid_1 != ICE_PROT_ID_INVAL) { v = ICE_READ_REG(hw, GLFLXP_RXDID_FLX_WRD_5(rxdid)); - if (FLX_REG(v, PROT_MDID, 5) != xtr_sets[i].protid_1 || - FLX_REG(v, RXDID_OPCODE, 5) != ICE_RX_OPC_EXTRACT) - return false; + if (FLX_REG(v, PROT_MDID, 5) == xtr_sets[i].protid_1 && + FLX_REG(v, RXDID_OPCODE, 5) == xtr_sets[i].opcode) + ice_proto_xtr_hw_support[i] = true; } } - - return true; } static int @@ -836,7 +880,7 @@ ice_add_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *mac_addr) ret = -ENOMEM; goto DONE; } - rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN); + rte_ether_addr_copy(mac_addr, &f->mac_info.mac_addr); TAILQ_INSERT_TAIL(&vsi->mac_list, f, next); vsi->mac_num++; @@ -1272,7 +1316,7 @@ ice_handle_aq_msg(struct rte_eth_dev *dev) case ice_aqc_opc_get_link_status: ret = ice_link_update(dev, 0); if (!ret) - _rte_eth_dev_callback_process + rte_eth_dev_callback_process (dev, RTE_ETH_EVENT_INTR_LSC, NULL); break; default: @@ -1337,7 +1381,7 @@ ice_interrupt_handler(void *param) PMD_DRV_LOG(INFO, "OICR: link state change event"); ret = ice_link_update(dev, 0); if (!ret) - _rte_eth_dev_callback_process + rte_eth_dev_callback_process (dev, RTE_ETH_EVENT_INTR_LSC, NULL); } #endif @@ -1385,23 +1429,77 @@ ice_init_proto_xtr(struct rte_eth_dev *dev) ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); struct ice_hw *hw = ICE_PF_TO_HW(pf); + const struct proto_xtr_ol_flag *ol_flag; + bool proto_xtr_enable = false; + int offset; uint16_t i; - if (!ice_proto_xtr_support(hw)) { - PMD_DRV_LOG(NOTICE, "Protocol extraction is not supported"); - return; - } - pf->proto_xtr = rte_zmalloc(NULL, pf->lan_nb_qps, 0); if (unlikely(pf->proto_xtr == NULL)) { PMD_DRV_LOG(ERR, "No memory for setting up protocol extraction table"); return; } - for (i = 0; i < pf->lan_nb_qps; i++) + for (i = 0; i < pf->lan_nb_qps; i++) { pf->proto_xtr[i] = ad->devargs.proto_xtr[i] != PROTO_XTR_NONE ? ad->devargs.proto_xtr[i] : ad->devargs.proto_xtr_dflt; + + if (pf->proto_xtr[i] != PROTO_XTR_NONE) { + uint8_t type = pf->proto_xtr[i]; + + ice_proto_xtr_ol_flag_params[type].required = true; + proto_xtr_enable = true; + } + } + + if (likely(!proto_xtr_enable)) + return; + + ice_check_proto_xtr_support(hw); + + offset = rte_mbuf_dynfield_register(&ice_proto_xtr_metadata_param); + if (unlikely(offset == -1)) { + PMD_DRV_LOG(ERR, + "Protocol extraction metadata is disabled in mbuf with error %d", + -rte_errno); + return; + } + + PMD_DRV_LOG(DEBUG, + "Protocol extraction metadata offset in mbuf is : %d", + offset); + rte_net_ice_dynfield_proto_xtr_metadata_offs = offset; + + for (i = 0; i < RTE_DIM(ice_proto_xtr_ol_flag_params); i++) { + ol_flag = &ice_proto_xtr_ol_flag_params[i]; + + if (!ol_flag->required) + continue; + + if (!ice_proto_xtr_hw_support[i]) { + PMD_DRV_LOG(ERR, + "Protocol extraction type %u is not supported in hardware", + i); + rte_net_ice_dynfield_proto_xtr_metadata_offs = -1; + break; + } + + offset = rte_mbuf_dynflag_register(&ol_flag->param); + if (unlikely(offset == -1)) { + PMD_DRV_LOG(ERR, + "Protocol extraction offload '%s' failed to register with error %d", + ol_flag->param.name, -rte_errno); + + rte_net_ice_dynfield_proto_xtr_metadata_offs = -1; + break; + } + + PMD_DRV_LOG(DEBUG, + "Protocol extraction offload '%s' offset in mbuf is : %d", + ol_flag->param.name, offset); + *ol_flag->ol_flag = 1ULL << offset; + } } /* Initialize SW parameters of PF */ @@ -1490,7 +1588,7 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) cfg = ICE_AQ_VSI_PROP_SECURITY_VALID | ICE_AQ_VSI_PROP_FLOW_DIR_VALID; vsi_ctx.info.valid_sections |= rte_cpu_to_le_16(cfg); - cfg = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; + cfg = ICE_AQ_VSI_FD_ENABLE; vsi_ctx.info.fd_options = rte_cpu_to_le_16(cfg); vsi_ctx.info.max_fd_fltr_dedicated = rte_cpu_to_le_16(hw->func_caps.fd_fltr_guar); @@ -1518,9 +1616,10 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) cfg = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; vsi_ctx.info.valid_sections |= rte_cpu_to_le_16(cfg); - cfg = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; + cfg = ICE_AQ_VSI_FD_PROG_ENABLE; vsi_ctx.info.fd_options = rte_cpu_to_le_16(cfg); vsi_ctx.info.sw_id = hw->port_info->sw_id; + vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; ret = ice_vsi_config_tc_queue_mapping(vsi, &vsi_ctx.info, ICE_DEFAULT_TCMAP); @@ -1574,16 +1673,16 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) if (type == ICE_VSI_PF) { /* MAC configuration */ - rte_memcpy(pf->dev_addr.addr_bytes, - hw->port_info->mac.perm_addr, - ETH_ADDR_LEN); + rte_ether_addr_copy((struct rte_ether_addr *) + hw->port_info->mac.perm_addr, + &pf->dev_addr); - rte_memcpy(&mac_addr, &pf->dev_addr, RTE_ETHER_ADDR_LEN); + rte_ether_addr_copy(&pf->dev_addr, &mac_addr); ret = ice_add_mac_filter(vsi, &mac_addr); if (ret != ICE_SUCCESS) PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter"); - rte_memcpy(&mac_addr, &broadcast, RTE_ETHER_ADDR_LEN); + rte_ether_addr_copy(&broadcast, &mac_addr); ret = ice_add_mac_filter(vsi, &mac_addr); if (ret != ICE_SUCCESS) PMD_INIT_LOG(ERR, "Failed to add MAC filter"); @@ -1630,7 +1729,7 @@ ice_pf_setup(struct ice_pf *pf) uint16_t unused; /* Clear all stats counters */ - pf->offset_loaded = FALSE; + pf->offset_loaded = false; memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats)); memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats)); memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats)); @@ -1654,53 +1753,6 @@ ice_pf_setup(struct ice_pf *pf) return 0; } -/* PCIe configuration space setting */ -#define PCI_CFG_SPACE_SIZE 256 -#define PCI_CFG_SPACE_EXP_SIZE 4096 -#define PCI_EXT_CAP_ID(header) (int)((header) & 0x0000ffff) -#define PCI_EXT_CAP_NEXT(header) (((header) >> 20) & 0xffc) -#define PCI_EXT_CAP_ID_DSN 0x03 - -static int -ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap) -{ - uint32_t header; - int ttl; - int pos = PCI_CFG_SPACE_SIZE; - - /* minimum 8 bytes per capability */ - ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; - - if (rte_pci_read_config(dev, &header, 4, pos) < 0) { - PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n"); - return -1; - } - - /* - * If we have no capabilities, this is indicated by cap ID, - * cap version and next pointer all being 0. - */ - if (header == 0) - return 0; - - while (ttl-- > 0) { - if (PCI_EXT_CAP_ID(header) == cap) - return pos; - - pos = PCI_EXT_CAP_NEXT(header); - - if (pos < PCI_CFG_SPACE_SIZE) - break; - - if (rte_pci_read_config(dev, &header, 4, pos) < 0) { - PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n"); - return -1; - } - } - - return 0; -} - /* * Extract device serial number from PCIe Configuration Space and * determine the pkg file path according to the DSN. @@ -1708,12 +1760,12 @@ ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap) static int ice_pkg_file_search_path(struct rte_pci_device *pci_dev, char *pkg_file) { - int pos; + off_t pos; char opt_ddp_filename[ICE_MAX_PKG_FILENAME_SIZE]; uint32_t dsn_low, dsn_high; memset(opt_ddp_filename, 0, ICE_MAX_PKG_FILENAME_SIZE); - pos = ice_pci_find_next_ext_capability(pci_dev, PCI_EXT_CAP_ID_DSN); + pos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN); if (pos) { rte_pci_read_config(pci_dev, &dsn_low, 4, pos + 4); @@ -1743,7 +1795,7 @@ fail_dsn: return 0; } -static enum ice_pkg_type +enum ice_pkg_type ice_load_pkg_type(struct ice_hw *hw) { enum ice_pkg_type package_type; @@ -1906,6 +1958,8 @@ static int ice_parse_devargs(struct rte_eth_dev *dev) ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG, &parse_bool, &ad->devargs.pipe_mode_support); + if (ret) + goto bail; bail: rte_kvargs_free(kvlist); @@ -1949,7 +2003,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type, uint16_t num, uint16_t desc_id, uint16_t *prof_buf, uint16_t *num_prof) { - struct ice_aqc_get_allocd_res_desc_resp *resp_buf; + struct ice_aqc_res_elem *resp_buf; int ret; uint16_t buf_len; bool res_shared = 1; @@ -1958,7 +2012,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type, struct ice_aqc_get_allocd_res_desc *cmd = &aq_desc.params.get_res_desc; - buf_len = sizeof(resp_buf->elem) * num; + buf_len = sizeof(*resp_buf) * num; resp_buf = ice_malloc(hw, buf_len); if (!resp_buf) return -ENOMEM; @@ -1977,7 +2031,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type, else goto exit; - ice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) * + ice_memcpy(prof_buf, resp_buf, sizeof(*resp_buf) * (*num_prof), ICE_NONDMA_TO_NONDMA); exit: @@ -2030,6 +2084,30 @@ ice_reset_fxp_resource(struct ice_hw *hw) return 0; } +static void +ice_rss_ctx_init(struct ice_pf *pf) +{ + memset(&pf->hash_ctx, 0, sizeof(pf->hash_ctx)); +} + +static uint64_t +ice_get_supported_rxdid(struct ice_hw *hw) +{ + uint64_t supported_rxdid = 0; /* bitmap for supported RXDID */ + uint32_t regval; + int i; + + supported_rxdid |= BIT(ICE_RXDID_LEGACY_1); + + for (i = ICE_RXDID_FLEX_NIC; i < ICE_FLEX_DESC_RXDID_MAX_NUM; i++) { + regval = ICE_READ_REG(hw, GLFLXP_RXDID_FLAGS(i, 0)); + if ((regval >> GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) + & GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) + supported_rxdid |= BIT(i); + } + return supported_rxdid; +} + static int ice_dev_init(struct rte_eth_dev *dev) { @@ -2043,6 +2121,9 @@ ice_dev_init(struct rte_eth_dev *dev) int ret; dev->dev_ops = &ice_eth_dev_ops; + dev->rx_queue_count = ice_rx_queue_count; + dev->rx_descriptor_status = ice_rx_descriptor_status; + dev->tx_descriptor_status = ice_tx_descriptor_status; dev->rx_pkt_burst = ice_recv_pkts; dev->tx_pkt_burst = ice_xmit_pkts; dev->tx_pkt_prepare = ice_prep_pkts; @@ -2056,6 +2137,8 @@ ice_dev_init(struct rte_eth_dev *dev) return 0; } + dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + ice_set_default_ptype_table(dev); pci_dev = RTE_DEV_TO_PCI(dev->device); intr_handle = &pci_dev->intr_handle; @@ -2110,11 +2193,6 @@ ice_dev_init(struct rte_eth_dev *dev) goto err_init_mac; } - /* Pass the information to the rte_eth_dev_close() that it should also - * release the private port resources. - */ - dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; - ret = ice_res_pool_init(&pf->msix_pool, 1, hw->func_caps.common_cap.num_msix_vectors - 1); if (ret) { @@ -2137,16 +2215,16 @@ ice_dev_init(struct rte_eth_dev *dev) vsi = pf->main_vsi; /* Disable double vlan by default */ - ice_vsi_config_double_vlan(vsi, FALSE); + ice_vsi_config_double_vlan(vsi, false); - ret = ice_aq_stop_lldp(hw, TRUE, FALSE, NULL); + ret = ice_aq_stop_lldp(hw, true, false, NULL); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "lldp has already stopped\n"); - ret = ice_init_dcb(hw, TRUE); + ret = ice_init_dcb(hw, true); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "Failed to init DCB\n"); /* Forward LLDP packets to default VSI */ - ret = ice_vsi_config_sw_lldp(vsi, TRUE); + ret = ice_vsi_config_sw_lldp(vsi, true); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "Failed to cfg lldp\n"); /* register callback func to eal lib */ @@ -2161,10 +2239,15 @@ ice_dev_init(struct rte_eth_dev *dev) /* get base queue pairs index in the device */ ice_base_queue_get(pf); - ret = ice_flow_init(ad); - if (ret) { - PMD_INIT_LOG(ERR, "Failed to initialize flow"); - return ret; + /* Initialize RSS context for gtpu_eh */ + ice_rss_ctx_init(pf); + + if (!ad->is_safe_mode) { + ret = ice_flow_init(ad); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to initialize flow"); + return ret; + } } ret = ice_reset_fxp_resource(hw); @@ -2173,6 +2256,8 @@ ice_dev_init(struct rte_eth_dev *dev) return ret; } + pf->supported_rxdid = ice_get_supported_rxdid(hw); + return 0; err_pf_setup: @@ -2195,9 +2280,10 @@ ice_release_vsi(struct ice_vsi *vsi) struct ice_hw *hw; struct ice_vsi_ctx vsi_ctx; enum ice_status ret; + int error = 0; if (!vsi) - return 0; + return error; hw = ICE_VSI_TO_HW(vsi); @@ -2210,15 +2296,16 @@ ice_release_vsi(struct ice_vsi *vsi) ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL); if (ret != ICE_SUCCESS) { PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id); - rte_free(vsi); - return -1; + error = -1; } + rte_free(vsi->rss_lut); + rte_free(vsi->rss_key); rte_free(vsi); - return 0; + return error; } -static void +void ice_vsi_disable_queues_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2246,7 +2333,7 @@ ice_vsi_disable_queues_intr(struct ice_vsi *vsi) ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M); } -static void +static int ice_dev_stop(struct rte_eth_dev *dev) { struct rte_eth_dev_data *data = dev->data; @@ -2258,7 +2345,7 @@ ice_dev_stop(struct rte_eth_dev *dev) /* avoid stopping again */ if (pf->adapter_stopped) - return; + return 0; /* stop and clear all Rx queues */ for (i = 0; i < data->nb_rx_queues; i++) @@ -2271,13 +2358,10 @@ ice_dev_stop(struct rte_eth_dev *dev) /* disable all queue interrupts */ ice_vsi_disable_queues_intr(main_vsi); - if (pf->fdir.fdir_vsi) - ice_vsi_disable_queues_intr(pf->fdir.fdir_vsi); - - /* Clear all queues and release mbufs */ - ice_clear_queues(dev); - - ice_dev_set_link_down(dev); + if (pf->init_link_up) + ice_dev_set_link_up(dev); + else + ice_dev_set_link_down(dev); /* Clean datapath event and queue/vec mapping */ rte_intr_efd_disable(intr_handle); @@ -2287,9 +2371,12 @@ ice_dev_stop(struct rte_eth_dev *dev) } pf->adapter_stopped = true; + dev->data->dev_started = 0; + + return 0; } -static void +static int ice_dev_close(struct rte_eth_dev *dev) { struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); @@ -2298,6 +2385,10 @@ ice_dev_close(struct rte_eth_dev *dev) struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; struct ice_adapter *ad = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + int ret; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; /* Since stop will make link down, then the link event will be * triggered, disable the irq firstly to avoid the port_infoe etc @@ -2306,9 +2397,10 @@ ice_dev_close(struct rte_eth_dev *dev) */ ice_pf_disable_irq0(hw); - ice_dev_stop(dev); + ret = ice_dev_stop(dev); - ice_flow_uninit(ad); + if (!ad->is_safe_mode) + ice_flow_uninit(ad); /* release all queue resource */ ice_free_queues(dev); @@ -2316,25 +2408,21 @@ ice_dev_close(struct rte_eth_dev *dev) ice_res_pool_destroy(&pf->msix_pool); ice_release_vsi(pf->main_vsi); ice_sched_cleanup_all(hw); + ice_free_hw_tbls(hw); rte_free(hw->port_info); hw->port_info = NULL; ice_shutdown_all_ctrlq(hw); rte_free(pf->proto_xtr); pf->proto_xtr = NULL; - dev->dev_ops = NULL; - dev->rx_pkt_burst = NULL; - dev->tx_pkt_burst = NULL; - - rte_free(dev->data->mac_addrs); - dev->data->mac_addrs = NULL; - /* disable uio intr before callback unregister */ rte_intr_disable(intr_handle); /* unregister callback func from eal lib */ rte_intr_callback_unregister(intr_handle, ice_interrupt_handler, dev); + + return ret; } static int @@ -2345,21 +2433,791 @@ ice_dev_uninit(struct rte_eth_dev *dev) return 0; } +static bool +is_hash_cfg_valid(struct ice_rss_hash_cfg *cfg) +{ + return ((cfg->hash_func >= ICE_RSS_HASH_TOEPLITZ && + cfg->hash_func <= ICE_RSS_HASH_JHASH) && + (cfg->hash_flds != 0 && cfg->addl_hdrs != 0)) ? + true : false; +} + +static void +hash_cfg_reset(struct ice_rss_hash_cfg *cfg) +{ + cfg->hash_flds = 0; + cfg->addl_hdrs = 0; + cfg->hash_func = 0; +} + +static int +ice_hash_moveout(struct ice_pf *pf, struct ice_rss_hash_cfg *cfg) +{ + enum ice_status status = ICE_SUCCESS; + struct ice_hw *hw = ICE_PF_TO_HW(pf); + struct ice_vsi *vsi = pf->main_vsi; + + if (!is_hash_cfg_valid(cfg)) + return -ENOENT; + + status = ice_rem_rss_cfg(hw, vsi->idx, cfg->hash_flds, + cfg->addl_hdrs); + if (status && status != ICE_ERR_DOES_NOT_EXIST) { + PMD_DRV_LOG(ERR, + "ice_rem_rss_cfg failed for VSI:%d, error:%d\n", + vsi->idx, status); + return -EBUSY; + } + + return 0; +} + static int -ice_dev_configure(struct rte_eth_dev *dev) +ice_hash_moveback(struct ice_pf *pf, struct ice_rss_hash_cfg *cfg) { - struct ice_adapter *ad = - ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + enum ice_status status = ICE_SUCCESS; + struct ice_hw *hw = ICE_PF_TO_HW(pf); + struct ice_vsi *vsi = pf->main_vsi; + bool symm; - /* Initialize to TRUE. If any of Rx queues doesn't meet the - * bulk allocation or vector Rx preconditions we will reset it. - */ - ad->rx_bulk_alloc_allowed = true; - ad->tx_simple_allowed = true; + if (!is_hash_cfg_valid(cfg)) + return -ENOENT; + + symm = (cfg->hash_func == ICE_RSS_HASH_TOEPLITZ_SYMMETRIC) ? + true : false; + + status = ice_add_rss_cfg(hw, vsi->idx, cfg->hash_flds, + cfg->addl_hdrs, symm); + if (status) { + PMD_DRV_LOG(ERR, + "ice_add_rss_cfg failed for VSI:%d, error:%d\n", + vsi->idx, status); + return -EBUSY; + } return 0; } +static int +ice_hash_remove(struct ice_pf *pf, struct ice_rss_hash_cfg *cfg) +{ + int ret; + + ret = ice_hash_moveout(pf, cfg); + if (ret && (ret != -ENOENT)) + return ret; + + hash_cfg_reset(cfg); + + return 0; +} + +static int +ice_add_rss_cfg_pre_gtpu(struct ice_pf *pf, struct ice_hash_gtpu_ctx *ctx, + u8 ctx_idx) +{ + int ret; + + switch (ctx_idx) { + case ICE_HASH_GTPU_CTX_EH_IP: + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_EH_IP_UDP: + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_EH_IP_TCP: + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_UP_IP: + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_UP_IP_UDP: + case ICE_HASH_GTPU_CTX_UP_IP_TCP: + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_DW_IP: + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_remove(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_DW_IP_UDP: + case ICE_HASH_GTPU_CTX_DW_IP_TCP: + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveout(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + default: + break; + } + + return 0; +} + +static u8 calc_gtpu_ctx_idx(uint32_t hdr) +{ + u8 eh_idx, ip_idx; + + if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) + eh_idx = 0; + else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) + eh_idx = 1; + else if (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) + eh_idx = 2; + else + return ICE_HASH_GTPU_CTX_MAX; + + ip_idx = 0; + if (hdr & ICE_FLOW_SEG_HDR_UDP) + ip_idx = 1; + else if (hdr & ICE_FLOW_SEG_HDR_TCP) + ip_idx = 2; + + if (hdr & (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6)) + return eh_idx * 3 + ip_idx; + else + return ICE_HASH_GTPU_CTX_MAX; +} + +static int +ice_add_rss_cfg_pre(struct ice_pf *pf, uint32_t hdr) +{ + u8 gtpu_ctx_idx = calc_gtpu_ctx_idx(hdr); + + if (hdr & ICE_FLOW_SEG_HDR_IPV4) + return ice_add_rss_cfg_pre_gtpu(pf, &pf->hash_ctx.gtpu4, + gtpu_ctx_idx); + else if (hdr & ICE_FLOW_SEG_HDR_IPV6) + return ice_add_rss_cfg_pre_gtpu(pf, &pf->hash_ctx.gtpu6, + gtpu_ctx_idx); + + return 0; +} + +static int +ice_add_rss_cfg_post_gtpu(struct ice_pf *pf, struct ice_hash_gtpu_ctx *ctx, + u32 hdr, u64 fld, bool symm, u8 ctx_idx) +{ + int ret; + + if (ctx_idx < ICE_HASH_GTPU_CTX_MAX) { + ctx->ctx[ctx_idx].addl_hdrs = hdr; + ctx->ctx[ctx_idx].hash_flds = fld; + ctx->ctx[ctx_idx].hash_func = symm; + } + + switch (ctx_idx) { + case ICE_HASH_GTPU_CTX_EH_IP: + break; + case ICE_HASH_GTPU_CTX_EH_IP_UDP: + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_EH_IP_TCP: + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_UP_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_DW_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + case ICE_HASH_GTPU_CTX_UP_IP: + case ICE_HASH_GTPU_CTX_UP_IP_UDP: + case ICE_HASH_GTPU_CTX_UP_IP_TCP: + case ICE_HASH_GTPU_CTX_DW_IP: + case ICE_HASH_GTPU_CTX_DW_IP_UDP: + case ICE_HASH_GTPU_CTX_DW_IP_TCP: + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_UDP]); + if (ret && (ret != -ENOENT)) + return ret; + + ret = ice_hash_moveback(pf, + &ctx->ctx[ICE_HASH_GTPU_CTX_EH_IP_TCP]); + if (ret && (ret != -ENOENT)) + return ret; + + break; + default: + break; + } + + return 0; +} + +static int +ice_add_rss_cfg_post(struct ice_pf *pf, uint32_t hdr, uint64_t fld, bool symm) +{ + u8 gtpu_ctx_idx = calc_gtpu_ctx_idx(hdr); + + if (hdr & ICE_FLOW_SEG_HDR_IPV4) + return ice_add_rss_cfg_post_gtpu(pf, &pf->hash_ctx.gtpu4, hdr, + fld, symm, gtpu_ctx_idx); + else if (hdr & ICE_FLOW_SEG_HDR_IPV6) + return ice_add_rss_cfg_post_gtpu(pf, &pf->hash_ctx.gtpu6, hdr, + fld, symm, gtpu_ctx_idx); + + return 0; +} + +static void +ice_rem_rss_cfg_post(struct ice_pf *pf, uint32_t hdr) +{ + u8 gtpu_ctx_idx = calc_gtpu_ctx_idx(hdr); + + if (gtpu_ctx_idx >= ICE_HASH_GTPU_CTX_MAX) + return; + + if (hdr & ICE_FLOW_SEG_HDR_IPV4) + hash_cfg_reset(&pf->hash_ctx.gtpu4.ctx[gtpu_ctx_idx]); + else if (hdr & ICE_FLOW_SEG_HDR_IPV6) + hash_cfg_reset(&pf->hash_ctx.gtpu6.ctx[gtpu_ctx_idx]); +} + +int +ice_rem_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id, + uint64_t fld, uint32_t hdr) +{ + struct ice_hw *hw = ICE_PF_TO_HW(pf); + int ret; + + ret = ice_rem_rss_cfg(hw, vsi_id, fld, hdr); + if (ret && ret != ICE_ERR_DOES_NOT_EXIST) + PMD_DRV_LOG(ERR, "remove rss cfg failed\n"); + + ice_rem_rss_cfg_post(pf, hdr); + + return 0; +} + +int +ice_add_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id, + uint64_t fld, uint32_t hdr, bool symm) +{ + struct ice_hw *hw = ICE_PF_TO_HW(pf); + int ret; + + ret = ice_add_rss_cfg_pre(pf, hdr); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg pre failed\n"); + + ret = ice_add_rss_cfg(hw, vsi_id, fld, hdr, symm); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg failed\n"); + + ret = ice_add_rss_cfg_post(pf, hdr, fld, symm); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg post failed\n"); + + return 0; +} + +static void +ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) +{ + struct ice_vsi *vsi = pf->main_vsi; + int ret; + + /* Configure RSS for IPv4 with src/dst addr as input set */ + if (rss_hf & ETH_RSS_IPV4) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for IPv6 with src/dst addr as input set */ + if (rss_hf & ETH_RSS_IPV6) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for udp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for udp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for tcp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for tcp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for sctp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for sctp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_IPV4) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_IPV6) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_UDP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_UDP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_TCP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_TCP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_SCTP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_SCTP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_SCTP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_SCTP rss flow fail %d", + __func__, ret); + } +} + static int ice_init_rss(struct ice_pf *pf) { struct ice_hw *hw = ICE_PF_TO_HW(pf); @@ -2382,13 +3240,24 @@ static int ice_init_rss(struct ice_pf *pf) return 0; } - if (!vsi->rss_key) + if (!vsi->rss_key) { vsi->rss_key = rte_zmalloc(NULL, vsi->rss_key_size, 0); - if (!vsi->rss_lut) + if (vsi->rss_key == NULL) { + PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key"); + return -ENOMEM; + } + } + if (!vsi->rss_lut) { vsi->rss_lut = rte_zmalloc(NULL, vsi->rss_lut_size, 0); - + if (vsi->rss_lut == NULL) { + PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key"); + rte_free(vsi->rss_key); + vsi->rss_key = NULL; + return -ENOMEM; + } + } /* configure RSS key */ if (!rss_conf->rss_key) { /* Calculate the default hash key */ @@ -2402,7 +3271,7 @@ static int ice_init_rss(struct ice_pf *pf) rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size); ret = ice_aq_set_rss_key(hw, vsi->idx, &key); if (ret) - return -EINVAL; + goto out; /* init RSS LUT table */ for (i = 0; i < vsi->rss_lut_size; i++) @@ -2412,7 +3281,7 @@ static int ice_init_rss(struct ice_pf *pf) ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF, vsi->rss_lut, vsi->rss_lut_size); if (ret) - return -EINVAL; + goto out; /* Enable registers for symmetric_toeplitz function. */ reg = ICE_READ_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id)); @@ -2420,72 +3289,40 @@ static int ice_init_rss(struct ice_pf *pf) (1 << VSIQF_HASH_CTL_HASH_SCHEME_S); ICE_WRITE_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id), reg); - /* configure RSS for IPv4 with input set IPv4 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret); - - /* configure RSS for IPv6 with input set IPv6 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret); - - /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret); - - /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret); - - /* configure RSS for sctp6 with input set IPv6 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", - __func__, ret); + /* RSS hash configuration */ + ice_rss_hash_set(pf, rss_conf->rss_hf); - /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret); + return 0; +out: + rte_free(vsi->rss_key); + vsi->rss_key = NULL; + rte_free(vsi->rss_lut); + vsi->rss_lut = NULL; + return -EINVAL; +} - /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret); +static int +ice_dev_configure(struct rte_eth_dev *dev) +{ + struct ice_adapter *ad = + ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); + int ret; - /* configure RSS for sctp4 with input set IP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", - __func__, ret); + /* Initialize to TRUE. If any of Rx queues doesn't meet the + * bulk allocation or vector Rx preconditions we will reset it. + */ + ad->rx_bulk_alloc_allowed = true; + ad->tx_simple_allowed = true; - /* configure RSS for gtpu with input set TEID */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_GTP_U_IPV4_TEID, - ICE_FLOW_SEG_HDR_GTPU_IP, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s GTPU_TEID rss flow fail %d", - __func__, ret); + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; - /** - * configure RSS for pppoe/pppod with input set - * Source MAC and Session ID - */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_PPPOE_SESS_ID_ETH, - ICE_FLOW_SEG_HDR_PPPOE, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s PPPoE/PPPoD_SessionID rss flow fail %d", - __func__, ret); + ret = ice_init_rss(pf); + if (ret) { + PMD_DRV_LOG(ERR, "Failed to enable rss for PF"); + return ret; + } return 0; } @@ -2501,9 +3338,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect, for (i = 0; i < nb_queue; i++) { /*do actual bind*/ val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) | - (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M; + (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M; val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) | - (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M; + (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M; PMD_DRV_LOG(INFO, "queue %d is binding to vect %d", base_queue + i, msix_vect); @@ -2514,7 +3351,7 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect, } } -static void +void ice_vsi_queues_bind_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2567,7 +3404,7 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi) } } -static void +void ice_vsi_enable_queues_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2637,17 +3474,32 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev) /* Enable interrupts for all the queues */ ice_vsi_enable_queues_intr(vsi); - /* Enable FDIR MSIX interrupt */ - if (pf->fdir.fdir_vsi) { - ice_vsi_queues_bind_intr(pf->fdir.fdir_vsi); - ice_vsi_enable_queues_intr(pf->fdir.fdir_vsi); - } - rte_intr_enable(intr_handle); return 0; } +static void +ice_get_init_link_status(struct rte_eth_dev *dev) +{ + struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); + bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false; + struct ice_link_status link_status; + int ret; + + ret = ice_aq_get_link_info(hw->port_info, enable_lse, + &link_status, NULL); + if (ret != ICE_SUCCESS) { + PMD_DRV_LOG(ERR, "Failed to get link info"); + pf->init_link_up = false; + return; + } + + if (link_status.link_info & ICE_AQ_LINK_UP) + pf->init_link_up = true; +} + static int ice_dev_start(struct rte_eth_dev *dev) { @@ -2678,12 +3530,6 @@ ice_dev_start(struct rte_eth_dev *dev) } } - ret = ice_init_rss(pf); - if (ret) { - PMD_DRV_LOG(ERR, "Failed to enable rss for PF"); - goto rx_err; - } - ice_set_rx_function(dev); ice_set_tx_function(dev); @@ -2718,6 +3564,8 @@ ice_dev_start(struct rte_eth_dev *dev) if (ret != ICE_SUCCESS) PMD_DRV_LOG(WARNING, "Fail to set phy mask"); + ice_get_init_link_status(dev); + ice_dev_set_link_up(dev); /* Call get_link_info aq commond to enable/disable LSE */ @@ -2809,7 +3657,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_QINQ_STRIP | DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_VLAN_EXTEND; + DEV_RX_OFFLOAD_VLAN_EXTEND | + DEV_RX_OFFLOAD_RSS_HASH; dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | @@ -2998,8 +3847,11 @@ ice_link_update(struct rte_eth_dev *dev, int wait_to_complete) link.link_speed = ETH_SPEED_NUM_100G; break; case ICE_AQ_LINK_SPEED_UNKNOWN: - default: PMD_DRV_LOG(ERR, "Unknown link speed"); + link.link_speed = ETH_SPEED_NUM_UNKNOWN; + break; + default: + PMD_DRV_LOG(ERR, "None link speed"); link.link_speed = ETH_SPEED_NUM_NONE; break; } @@ -3051,7 +3903,7 @@ ice_force_phys_link_state(struct ice_hw *hw, bool link_up) cfg.phy_type_low = pcaps->phy_type_low; cfg.phy_type_high = pcaps->phy_type_high; cfg.caps = pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; - cfg.low_power_ctrl = pcaps->low_power_ctrl; + cfg.low_power_ctrl_an = pcaps->low_power_ctrl_an; cfg.eee_cap = pcaps->eee_cap; cfg.eeer_value = pcaps->eeer_value; cfg.link_fec_opt = pcaps->link_fec_options; @@ -3149,7 +4001,7 @@ static int ice_macaddr_set(struct rte_eth_dev *dev, PMD_DRV_LOG(ERR, "Failed to add mac filter"); return -EIO; } - memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN); + rte_ether_addr_copy(mac_addr, &pf->dev_addr); flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL; ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL); @@ -3327,78 +4179,28 @@ ice_vlan_offload_set(struct rte_eth_dev *dev, int mask) rxmode = &dev->data->dev_conf.rxmode; if (mask & ETH_VLAN_FILTER_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) - ice_vsi_config_vlan_filter(vsi, TRUE); + ice_vsi_config_vlan_filter(vsi, true); else - ice_vsi_config_vlan_filter(vsi, FALSE); + ice_vsi_config_vlan_filter(vsi, false); } if (mask & ETH_VLAN_STRIP_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) - ice_vsi_config_vlan_stripping(vsi, TRUE); + ice_vsi_config_vlan_stripping(vsi, true); else - ice_vsi_config_vlan_stripping(vsi, FALSE); + ice_vsi_config_vlan_stripping(vsi, false); } if (mask & ETH_VLAN_EXTEND_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) - ice_vsi_config_double_vlan(vsi, TRUE); + ice_vsi_config_double_vlan(vsi, true); else - ice_vsi_config_double_vlan(vsi, FALSE); + ice_vsi_config_double_vlan(vsi, false); } return 0; } -static int -ice_vlan_tpid_set(struct rte_eth_dev *dev, - enum rte_vlan_type vlan_type, - uint16_t tpid) -{ - struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint64_t reg_r = 0, reg_w = 0; - uint16_t reg_id = 0; - int ret = 0; - int qinq = dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_EXTEND; - - switch (vlan_type) { - case ETH_VLAN_TYPE_OUTER: - if (qinq) - reg_id = 3; - else - reg_id = 5; - break; - case ETH_VLAN_TYPE_INNER: - if (qinq) { - reg_id = 5; - } else { - PMD_DRV_LOG(ERR, - "Unsupported vlan type in single vlan."); - return -EINVAL; - } - break; - default: - PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type); - return -EINVAL; - } - reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id)); - PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: " - "0x%08"PRIx64"", reg_id, reg_r); - - reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M)); - reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S); - if (reg_r == reg_w) { - PMD_DRV_LOG(DEBUG, "No need to write"); - return 0; - } - - ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w); - PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to " - "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id); - - return ret; -} - static int ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size) { @@ -3618,7 +4420,12 @@ ice_rss_hash_update(struct rte_eth_dev *dev, if (status) return status; - /* TODO: hash enable config, ice_add_rss_cfg */ + if (rss_conf->rss_hf == 0) + return 0; + + /* RSS hash configuration */ + ice_rss_hash_set(pf, rss_conf->rss_hf); + return 0; } @@ -3777,21 +4584,19 @@ static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - u32 full_ver; u8 ver, patch; u16 build; int ret; - full_ver = hw->nvm.oem_ver; - ver = (u8)(full_ver >> 24); - build = (u16)((full_ver >> 8) & 0xffff); - patch = (u8)(full_ver & 0xff); + ver = hw->flash.orom.major; + patch = hw->flash.orom.patch; + build = hw->flash.orom.build; ret = snprintf(fw_version, fw_size, - "%d.%d%d 0x%08x %d.%d.%d", - ((hw->nvm.ver >> 12) & 0xf), - ((hw->nvm.ver >> 4) & 0xff), - (hw->nvm.ver & 0xf), hw->nvm.eetrack, + "%x.%02x 0x%08x %d.%d.%d", + hw->flash.nvm.major, + hw->flash.nvm.minor, + hw->flash.nvm.eetrack, ver, build, patch); /* add the size of '\0' */ @@ -3889,8 +4694,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - /* Convert word count to byte count */ - return hw->nvm.sr_words << 1; + return hw->flash.flash_size; } static int @@ -3898,26 +4702,24 @@ ice_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint16_t *data = eeprom->data; - uint16_t first_word, last_word, nwords; enum ice_status status = ICE_SUCCESS; + uint8_t *data = eeprom->data; - first_word = eeprom->offset >> 1; - last_word = (eeprom->offset + eeprom->length - 1) >> 1; - nwords = last_word - first_word + 1; + eeprom->magic = hw->vendor_id | (hw->device_id << 16); - if (first_word >= hw->nvm.sr_words || - last_word >= hw->nvm.sr_words) { - PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range."); - return -EINVAL; + status = ice_acquire_nvm(hw, ICE_RES_READ); + if (status) { + PMD_DRV_LOG(ERR, "acquire nvm failed."); + return -EIO; } - eeprom->magic = hw->vendor_id | (hw->device_id << 16); + status = ice_read_flat_nvm(hw, eeprom->offset, &eeprom->length, + data, false); + + ice_release_nvm(hw); - status = ice_read_sr_buf(hw, first_word, &nwords, data); if (status) { PMD_DRV_LOG(ERR, "EEPROM read failed."); - eeprom->length = sizeof(uint16_t) * nwords; return -EIO; } @@ -3993,6 +4795,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi) ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx), vsi->offset_loaded, &oes->rx_broadcast, &nes->rx_broadcast); + /* enlarge the limitation when rx_bytes overflowed */ + if (vsi->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes) + nes->rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + nes->rx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_rx_bytes); + } + vsi->old_rx_bytes = nes->rx_bytes; /* exclude CRC bytes */ nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast + nes->rx_broadcast) * RTE_ETHER_CRC_LEN; @@ -4019,6 +4828,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi) /* GLV_TDPC not supported */ ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded, &oes->tx_errors, &nes->tx_errors); + /* enlarge the limitation when tx_bytes overflowed */ + if (vsi->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes) + nes->tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + nes->tx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_tx_bytes); + } + vsi->old_tx_bytes = nes->tx_bytes; vsi->offset_loaded = true; PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************", @@ -4066,6 +4882,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw) ice_stat_update_32(hw, PRTRPB_RDPC, pf->offset_loaded, &os->eth.rx_discards, &ns->eth.rx_discards); + /* enlarge the limitation when rx_bytes overflowed */ + if (pf->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes) + ns->eth.rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + ns->eth.rx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_rx_bytes); + } + pf->old_rx_bytes = ns->eth.rx_bytes; /* Workaround: CRC size should not be included in byte statistics, * so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx @@ -4096,6 +4919,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw) GLPRT_BPTCL(hw->port_info->lport), pf->offset_loaded, &os->eth.tx_broadcast, &ns->eth.tx_broadcast); + /* enlarge the limitation when tx_bytes overflowed */ + if (pf->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes) + ns->eth.tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + ns->eth.tx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_tx_bytes); + } + pf->old_tx_bytes = ns->eth.tx_bytes; ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast + ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN; @@ -4504,34 +5334,18 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map); RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice, - ICE_PROTO_XTR_ARG "=[queue:]" + ICE_PROTO_XTR_ARG "=[queue:]" ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>" ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>"); -RTE_INIT(ice_init_log) -{ - ice_logtype_init = rte_log_register("pmd.net.ice.init"); - if (ice_logtype_init >= 0) - rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE); - ice_logtype_driver = rte_log_register("pmd.net.ice.driver"); - if (ice_logtype_driver >= 0) - rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE); - +RTE_LOG_REGISTER(ice_logtype_init, pmd.net.ice.init, NOTICE); +RTE_LOG_REGISTER(ice_logtype_driver, pmd.net.ice.driver, NOTICE); #ifdef RTE_LIBRTE_ICE_DEBUG_RX - ice_logtype_rx = rte_log_register("pmd.net.ice.rx"); - if (ice_logtype_rx >= 0) - rte_log_set_level(ice_logtype_rx, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_rx, pmd.net.ice.rx, DEBUG); #endif - #ifdef RTE_LIBRTE_ICE_DEBUG_TX - ice_logtype_tx = rte_log_register("pmd.net.ice.tx"); - if (ice_logtype_tx >= 0) - rte_log_set_level(ice_logtype_tx, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_tx, pmd.net.ice.tx, DEBUG); #endif - #ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE - ice_logtype_tx_free = rte_log_register("pmd.net.ice.tx_free"); - if (ice_logtype_tx_free >= 0) - rte_log_set_level(ice_logtype_tx_free, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_tx_free, pmd.net.ice.tx_free, DEBUG); #endif -}