X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fice%2Fice_ethdev.c;h=5f7b58a787b7e5f0b7ce62e01abc8133ff427b0b;hb=30410493759f4bae3f65497737661e27b93c2d0e;hp=4763770f5a398ec6990d3942cb0b5f90319b7607;hpb=eb433cb20d53c2fbfb2e4ee2a1e648ea7427386e;p=dpdk.git

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 4763770f5a..5f7b58a787 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -23,13 +23,11 @@
 /* devargs */
 #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
 #define ICE_PIPELINE_MODE_SUPPORT_ARG  "pipeline-mode-support"
-#define ICE_FLOW_MARK_SUPPORT_ARG	"flow-mark-support"
 #define ICE_PROTO_XTR_ARG         "proto_xtr"
 
 static const char * const ice_valid_args[] = {
 	ICE_SAFE_MODE_SUPPORT_ARG,
 	ICE_PIPELINE_MODE_SUPPORT_ARG,
-	ICE_FLOW_MARK_SUPPORT_ARG,
 	ICE_PROTO_XTR_ARG,
 	NULL
 };
@@ -47,6 +45,8 @@ struct proto_xtr_ol_flag {
 	bool required;
 };
 
+static bool ice_proto_xtr_hw_support[PROTO_XTR_MAX];
+
 static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = {
 	[PROTO_XTR_VLAN] = {
 		.param = { .name = "ice_dynflag_proto_xtr_vlan" },
@@ -63,37 +63,21 @@ static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = {
 	[PROTO_XTR_TCP] = {
 		.param = { .name = "ice_dynflag_proto_xtr_tcp" },
 		.ol_flag = &rte_net_ice_dynflag_proto_xtr_tcp_mask },
+	[PROTO_XTR_IP_OFFSET] = {
+		.param = { .name = "ice_dynflag_proto_xtr_ip_offset" },
+		.ol_flag = &rte_net_ice_dynflag_proto_xtr_ip_offset_mask },
 };
 
 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
 
-/* DDP package search path */
-#define ICE_PKG_FILE_DEFAULT "/lib/firmware/intel/ice/ddp/ice.pkg"
-#define ICE_PKG_FILE_UPDATES "/lib/firmware/updates/intel/ice/ddp/ice.pkg"
-#define ICE_PKG_FILE_SEARCH_PATH_DEFAULT "/lib/firmware/intel/ice/ddp/"
-#define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/"
-
 #define ICE_OS_DEFAULT_PKG_NAME		"ICE OS Default Package"
 #define ICE_COMMS_PKG_NAME			"ICE COMMS Package"
-#define ICE_MAX_PKG_FILENAME_SIZE   256
 #define ICE_MAX_RES_DESC_NUM        1024
 
-int ice_logtype_init;
-int ice_logtype_driver;
-#ifdef RTE_LIBRTE_ICE_DEBUG_RX
-int ice_logtype_rx;
-#endif
-#ifdef RTE_LIBRTE_ICE_DEBUG_TX
-int ice_logtype_tx;
-#endif
-#ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE
-int ice_logtype_tx_free;
-#endif
-
 static int ice_dev_configure(struct rte_eth_dev *dev);
 static int ice_dev_start(struct rte_eth_dev *dev);
 static void ice_dev_stop(struct rte_eth_dev *dev);
-static void ice_dev_close(struct rte_eth_dev *dev);
+static int ice_dev_close(struct rte_eth_dev *dev);
 static int ice_dev_reset(struct rte_eth_dev *dev);
 static int ice_dev_info_get(struct rte_eth_dev *dev,
 			    struct rte_eth_dev_info *dev_info);
@@ -157,6 +141,11 @@ static int ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
 			struct rte_eth_udp_tunnel *udp_tunnel);
 
 static const struct rte_pci_id pci_id_ice_map[] = {
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
@@ -168,6 +157,10 @@ static const struct rte_pci_id pci_id_ice_map[] = {
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_BACKPLANE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SFP) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_10G_BASE_T) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SGMII) },
 	{ .vendor_id = 0, /* sentinel */ },
 };
 
@@ -214,9 +207,6 @@ static const struct eth_dev_ops ice_eth_dev_ops = {
 	.tx_burst_mode_get            = ice_tx_burst_mode_get,
 	.get_eeprom_length            = ice_get_eeprom_length,
 	.get_eeprom                   = ice_get_eeprom,
-	.rx_queue_count               = ice_rx_queue_count,
-	.rx_descriptor_status         = ice_rx_descriptor_status,
-	.tx_descriptor_status         = ice_tx_descriptor_status,
 	.stats_get                    = ice_stats_get,
 	.stats_reset                  = ice_stats_reset,
 	.xstats_get                   = ice_xstats_get,
@@ -335,6 +325,7 @@ lookup_proto_xtr_type(const char *xtr_name)
 		{ "ipv6",      PROTO_XTR_IPV6      },
 		{ "ipv6_flow", PROTO_XTR_IPV6_FLOW },
 		{ "tcp",       PROTO_XTR_TCP       },
+		{ "ip_offset", PROTO_XTR_IP_OFFSET },
 	};
 	uint32_t i;
 
@@ -550,25 +541,40 @@ handle_proto_xtr_arg(__rte_unused const char *key, const char *value,
 	return 0;
 }
 
-static bool
-ice_proto_xtr_support(struct ice_hw *hw)
+static void
+ice_check_proto_xtr_support(struct ice_hw *hw)
 {
 #define FLX_REG(val, fld, idx) \
 	(((val) & GLFLXP_RXDID_FLX_WRD_##idx##_##fld##_M) >> \
 	 GLFLXP_RXDID_FLX_WRD_##idx##_##fld##_S)
 	static struct {
 		uint32_t rxdid;
-		uint16_t protid_0;
-		uint16_t protid_1;
+		uint8_t opcode;
+		uint8_t protid_0;
+		uint8_t protid_1;
 	} xtr_sets[] = {
-		{ ICE_RXDID_COMMS_AUX_VLAN, ICE_PROT_EVLAN_O, ICE_PROT_VLAN_O },
-		{ ICE_RXDID_COMMS_AUX_IPV4, ICE_PROT_IPV4_OF_OR_S,
-		  ICE_PROT_IPV4_OF_OR_S },
-		{ ICE_RXDID_COMMS_AUX_IPV6, ICE_PROT_IPV6_OF_OR_S,
-		  ICE_PROT_IPV6_OF_OR_S },
-		{ ICE_RXDID_COMMS_AUX_IPV6_FLOW, ICE_PROT_IPV6_OF_OR_S,
-		  ICE_PROT_IPV6_OF_OR_S },
-		{ ICE_RXDID_COMMS_AUX_TCP, ICE_PROT_TCP_IL, ICE_PROT_ID_INVAL },
+		[PROTO_XTR_VLAN] = { ICE_RXDID_COMMS_AUX_VLAN,
+				     ICE_RX_OPC_EXTRACT,
+				     ICE_PROT_EVLAN_O, ICE_PROT_VLAN_O},
+		[PROTO_XTR_IPV4] = { ICE_RXDID_COMMS_AUX_IPV4,
+				     ICE_RX_OPC_EXTRACT,
+				     ICE_PROT_IPV4_OF_OR_S,
+				     ICE_PROT_IPV4_OF_OR_S },
+		[PROTO_XTR_IPV6] = { ICE_RXDID_COMMS_AUX_IPV6,
+				     ICE_RX_OPC_EXTRACT,
+				     ICE_PROT_IPV6_OF_OR_S,
+				     ICE_PROT_IPV6_OF_OR_S },
+		[PROTO_XTR_IPV6_FLOW] = { ICE_RXDID_COMMS_AUX_IPV6_FLOW,
+					  ICE_RX_OPC_EXTRACT,
+					  ICE_PROT_IPV6_OF_OR_S,
+					  ICE_PROT_IPV6_OF_OR_S },
+		[PROTO_XTR_TCP] = { ICE_RXDID_COMMS_AUX_TCP,
+				    ICE_RX_OPC_EXTRACT,
+				    ICE_PROT_TCP_IL, ICE_PROT_ID_INVAL },
+		[PROTO_XTR_IP_OFFSET] = { ICE_RXDID_COMMS_AUX_IP_OFFSET,
+					  ICE_RX_OPC_PROTID,
+					  ICE_PROT_IPV4_OF_OR_S,
+					  ICE_PROT_IPV6_OF_OR_S },
 	};
 	uint32_t i;
 
@@ -579,21 +585,19 @@ ice_proto_xtr_support(struct ice_hw *hw)
 		if (xtr_sets[i].protid_0 != ICE_PROT_ID_INVAL) {
 			v = ICE_READ_REG(hw, GLFLXP_RXDID_FLX_WRD_4(rxdid));
 
-			if (FLX_REG(v, PROT_MDID, 4) != xtr_sets[i].protid_0 ||
-			    FLX_REG(v, RXDID_OPCODE, 4) != ICE_RX_OPC_EXTRACT)
-				return false;
+			if (FLX_REG(v, PROT_MDID, 4) == xtr_sets[i].protid_0 &&
+			    FLX_REG(v, RXDID_OPCODE, 4) == xtr_sets[i].opcode)
+				ice_proto_xtr_hw_support[i] = true;
 		}
 
 		if (xtr_sets[i].protid_1 != ICE_PROT_ID_INVAL) {
 			v = ICE_READ_REG(hw, GLFLXP_RXDID_FLX_WRD_5(rxdid));
 
-			if (FLX_REG(v, PROT_MDID, 5) != xtr_sets[i].protid_1 ||
-			    FLX_REG(v, RXDID_OPCODE, 5) != ICE_RX_OPC_EXTRACT)
-				return false;
+			if (FLX_REG(v, PROT_MDID, 5) == xtr_sets[i].protid_1 &&
+			    FLX_REG(v, RXDID_OPCODE, 5) == xtr_sets[i].opcode)
+				ice_proto_xtr_hw_support[i] = true;
 		}
 	}
-
-	return true;
 }
 
 static int
@@ -1312,7 +1316,7 @@ ice_handle_aq_msg(struct rte_eth_dev *dev)
 		case ice_aqc_opc_get_link_status:
 			ret = ice_link_update(dev, 0);
 			if (!ret)
-				_rte_eth_dev_callback_process
+				rte_eth_dev_callback_process
 					(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 			break;
 		default:
@@ -1377,7 +1381,7 @@ ice_interrupt_handler(void *param)
 		PMD_DRV_LOG(INFO, "OICR: link state change event");
 		ret = ice_link_update(dev, 0);
 		if (!ret)
-			_rte_eth_dev_callback_process
+			rte_eth_dev_callback_process
 				(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 	}
 #endif
@@ -1430,11 +1434,6 @@ ice_init_proto_xtr(struct rte_eth_dev *dev)
 	int offset;
 	uint16_t i;
 
-	if (!ice_proto_xtr_support(hw)) {
-		PMD_DRV_LOG(NOTICE, "Protocol extraction is not supported");
-		return;
-	}
-
 	pf->proto_xtr = rte_zmalloc(NULL, pf->lan_nb_qps, 0);
 	if (unlikely(pf->proto_xtr == NULL)) {
 		PMD_DRV_LOG(ERR, "No memory for setting up protocol extraction table");
@@ -1457,6 +1456,8 @@ ice_init_proto_xtr(struct rte_eth_dev *dev)
 	if (likely(!proto_xtr_enable))
 		return;
 
+	ice_check_proto_xtr_support(hw);
+
 	offset = rte_mbuf_dynfield_register(&ice_proto_xtr_metadata_param);
 	if (unlikely(offset == -1)) {
 		PMD_DRV_LOG(ERR,
@@ -1476,6 +1477,14 @@ ice_init_proto_xtr(struct rte_eth_dev *dev)
 		if (!ol_flag->required)
 			continue;
 
+		if (!ice_proto_xtr_hw_support[i]) {
+			PMD_DRV_LOG(ERR,
+				    "Protocol extraction type %u is not supported in hardware",
+				    i);
+			rte_net_ice_dynfield_proto_xtr_metadata_offs = -1;
+			break;
+		}
+
 		offset = rte_mbuf_dynflag_register(&ol_flag->param);
 		if (unlikely(offset == -1)) {
 			PMD_DRV_LOG(ERR,
@@ -1744,53 +1753,6 @@ ice_pf_setup(struct ice_pf *pf)
 	return 0;
 }
 
-/* PCIe configuration space setting */
-#define PCI_CFG_SPACE_SIZE          256
-#define PCI_CFG_SPACE_EXP_SIZE      4096
-#define PCI_EXT_CAP_ID(header)      (int)((header) & 0x0000ffff)
-#define PCI_EXT_CAP_NEXT(header)    (((header) >> 20) & 0xffc)
-#define PCI_EXT_CAP_ID_DSN          0x03
-
-static int
-ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap)
-{
-	uint32_t header;
-	int ttl;
-	int pos = PCI_CFG_SPACE_SIZE;
-
-	/* minimum 8 bytes per capability */
-	ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
-
-	if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
-		PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
-		return -1;
-	}
-
-	/*
-	 * If we have no capabilities, this is indicated by cap ID,
-	 * cap version and next pointer all being 0.
-	 */
-	if (header == 0)
-		return 0;
-
-	while (ttl-- > 0) {
-		if (PCI_EXT_CAP_ID(header) == cap)
-			return pos;
-
-		pos = PCI_EXT_CAP_NEXT(header);
-
-		if (pos < PCI_CFG_SPACE_SIZE)
-			break;
-
-		if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
-			PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
-			return -1;
-		}
-	}
-
-	return 0;
-}
-
 /*
  * Extract device serial number from PCIe Configuration Space and
  * determine the pkg file path according to the DSN.
@@ -1798,12 +1760,12 @@ ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap)
 static int
 ice_pkg_file_search_path(struct rte_pci_device *pci_dev, char *pkg_file)
 {
-	int pos;
+	off_t pos;
 	char opt_ddp_filename[ICE_MAX_PKG_FILENAME_SIZE];
 	uint32_t dsn_low, dsn_high;
 	memset(opt_ddp_filename, 0, ICE_MAX_PKG_FILENAME_SIZE);
 
-	pos = ice_pci_find_next_ext_capability(pci_dev, PCI_EXT_CAP_ID_DSN);
+	pos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN);
 
 	if (pos) {
 		rte_pci_read_config(pci_dev, &dsn_low, 4, pos + 4);
@@ -1833,7 +1795,7 @@ fail_dsn:
 	return 0;
 }
 
-static enum ice_pkg_type
+enum ice_pkg_type
 ice_load_pkg_type(struct ice_hw *hw)
 {
 	enum ice_pkg_type package_type;
@@ -1999,11 +1961,6 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)
 	if (ret)
 		goto bail;
 
-	ret = rte_kvargs_process(kvlist, ICE_FLOW_MARK_SUPPORT_ARG,
-				 &parse_bool, &ad->devargs.flow_mark_support);
-	if (ret)
-		goto bail;
-
 bail:
 	rte_kvargs_free(kvlist);
 	return ret;
@@ -2046,7 +2003,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 		uint16_t num, uint16_t desc_id,
 		uint16_t *prof_buf, uint16_t *num_prof)
 {
-	struct ice_aqc_get_allocd_res_desc_resp *resp_buf;
+	struct ice_aqc_res_elem *resp_buf;
 	int ret;
 	uint16_t buf_len;
 	bool res_shared = 1;
@@ -2055,7 +2012,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	struct ice_aqc_get_allocd_res_desc *cmd =
 			&aq_desc.params.get_res_desc;
 
-	buf_len = sizeof(resp_buf->elem) * num;
+	buf_len = sizeof(*resp_buf) * num;
 	resp_buf = ice_malloc(hw, buf_len);
 	if (!resp_buf)
 		return -ENOMEM;
@@ -2074,7 +2031,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	else
 		goto exit;
 
-	ice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) *
+	ice_memcpy(prof_buf, resp_buf, sizeof(*resp_buf) *
 			(*num_prof), ICE_NONDMA_TO_NONDMA);
 
 exit:
@@ -2127,6 +2084,37 @@ ice_reset_fxp_resource(struct ice_hw *hw)
 	return 0;
 }
 
+static void
+ice_rss_ctx_init(struct ice_pf *pf)
+{
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4);
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6);
+
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp);
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp);
+
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp);
+	ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
+}
+
+static uint64_t
+ice_get_supported_rxdid(struct ice_hw *hw)
+{
+	uint64_t supported_rxdid = 0; /* bitmap for supported RXDID */
+	uint32_t regval;
+	int i;
+
+	supported_rxdid |= BIT(ICE_RXDID_LEGACY_1);
+
+	for (i = ICE_RXDID_FLEX_NIC; i < ICE_FLEX_DESC_RXDID_MAX_NUM; i++) {
+		regval = ICE_READ_REG(hw, GLFLXP_RXDID_FLAGS(i, 0));
+		if ((regval >> GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S)
+			& GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M)
+			supported_rxdid |= BIT(i);
+	}
+	return supported_rxdid;
+}
+
 static int
 ice_dev_init(struct rte_eth_dev *dev)
 {
@@ -2140,6 +2128,9 @@ ice_dev_init(struct rte_eth_dev *dev)
 	int ret;
 
 	dev->dev_ops = &ice_eth_dev_ops;
+	dev->rx_queue_count = ice_rx_queue_count;
+	dev->rx_descriptor_status = ice_rx_descriptor_status;
+	dev->tx_descriptor_status = ice_tx_descriptor_status;
 	dev->rx_pkt_burst = ice_recv_pkts;
 	dev->tx_pkt_burst = ice_xmit_pkts;
 	dev->tx_pkt_prepare = ice_prep_pkts;
@@ -2207,11 +2198,6 @@ ice_dev_init(struct rte_eth_dev *dev)
 		goto err_init_mac;
 	}
 
-	/* Pass the information to the rte_eth_dev_close() that it should also
-	 * release the private port resources.
-	 */
-	dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
-
 	ret = ice_res_pool_init(&pf->msix_pool, 1,
 				hw->func_caps.common_cap.num_msix_vectors - 1);
 	if (ret) {
@@ -2258,6 +2244,9 @@ ice_dev_init(struct rte_eth_dev *dev)
 	/* get base queue pairs index  in the device */
 	ice_base_queue_get(pf);
 
+	/* Initialize RSS context for gtpu_eh */
+	ice_rss_ctx_init(pf);
+
 	if (!ad->is_safe_mode) {
 		ret = ice_flow_init(ad);
 		if (ret) {
@@ -2272,6 +2261,8 @@ ice_dev_init(struct rte_eth_dev *dev)
 		return ret;
 	}
 
+	pf->supported_rxdid = ice_get_supported_rxdid(hw);
+
 	return 0;
 
 err_pf_setup:
@@ -2294,9 +2285,10 @@ ice_release_vsi(struct ice_vsi *vsi)
 	struct ice_hw *hw;
 	struct ice_vsi_ctx vsi_ctx;
 	enum ice_status ret;
+	int error = 0;
 
 	if (!vsi)
-		return 0;
+		return error;
 
 	hw = ICE_VSI_TO_HW(vsi);
 
@@ -2309,12 +2301,13 @@ ice_release_vsi(struct ice_vsi *vsi)
 	ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
 	if (ret != ICE_SUCCESS) {
 		PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
-		rte_free(vsi);
-		return -1;
+		error = -1;
 	}
 
+	rte_free(vsi->rss_lut);
+	rte_free(vsi->rss_key);
 	rte_free(vsi);
-	return 0;
+	return error;
 }
 
 void
@@ -2385,7 +2378,7 @@ ice_dev_stop(struct rte_eth_dev *dev)
 	pf->adapter_stopped = true;
 }
 
-static void
+static int
 ice_dev_close(struct rte_eth_dev *dev)
 {
 	struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
@@ -2395,6 +2388,9 @@ ice_dev_close(struct rte_eth_dev *dev)
 	struct ice_adapter *ad =
 		ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
 	/* Since stop will make link down, then the link event will be
 	 * triggered, disable the irq firstly to avoid the port_infoe etc
 	 * resources deallocation causing the interrupt service thread
@@ -2433,6 +2429,8 @@ ice_dev_close(struct rte_eth_dev *dev)
 	/* unregister callback func from eal lib */
 	rte_intr_callback_unregister(intr_handle,
 				     ice_interrupt_handler, dev);
+
+	return 0;
 }
 
 static int
@@ -2444,23 +2442,574 @@ ice_dev_uninit(struct rte_eth_dev *dev)
 }
 
 static int
-ice_dev_configure(struct rte_eth_dev *dev)
+ice_add_rss_cfg_post(struct ice_pf *pf, uint32_t hdr, uint64_t fld, bool symm)
 {
-	struct ice_adapter *ad =
-		ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+	struct ice_hw *hw = ICE_PF_TO_HW(pf);
+	struct ice_vsi *vsi = pf->main_vsi;
 
-	/* Initialize to TRUE. If any of Rx queues doesn't meet the
-	 * bulk allocation or vector Rx preconditions we will reset it.
-	 */
-	ad->rx_bulk_alloc_allowed = true;
-	ad->tx_simple_allowed = true;
+	if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
+		if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv4_udp.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv4_udp.symm = symm;
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv6_udp.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv6_udp.symm = symm;
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv4_tcp.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv4_tcp.symm = symm;
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv6_tcp.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv6_tcp.symm = symm;
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV4) {
+			pf->gtpu_hash_ctx.ipv4.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv4.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv4.symm = symm;
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp);
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp);
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV6) {
+			pf->gtpu_hash_ctx.ipv6.pkt_hdr = hdr;
+			pf->gtpu_hash_ctx.ipv6.hash_fld = fld;
+			pf->gtpu_hash_ctx.ipv6.symm = symm;
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp);
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
+		}
+	}
 
-	if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
-		dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+	if (hdr & (ICE_FLOW_SEG_HDR_GTPU_DWN |
+	    ICE_FLOW_SEG_HDR_GTPU_UP)) {
+		if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv4)) {
+				ice_add_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4.hash_fld,
+					pf->gtpu_hash_ctx.ipv4.pkt_hdr,
+					pf->gtpu_hash_ctx.ipv4.symm);
+				ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv4);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv6)) {
+				ice_add_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6.hash_fld,
+					pf->gtpu_hash_ctx.ipv6.pkt_hdr,
+					pf->gtpu_hash_ctx.ipv6.symm);
+				ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv6);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv4)) {
+				ice_add_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4.hash_fld,
+					pf->gtpu_hash_ctx.ipv4.pkt_hdr,
+					pf->gtpu_hash_ctx.ipv4.symm);
+				ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv4);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv6)) {
+				ice_add_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6.hash_fld,
+					pf->gtpu_hash_ctx.ipv6.pkt_hdr,
+					pf->gtpu_hash_ctx.ipv6.symm);
+				ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv6);
+			}
+		}
+	}
 
 	return 0;
 }
 
+static int
+ice_add_rss_cfg_pre(struct ice_pf *pf, uint32_t hdr)
+{
+	struct ice_hw *hw = ICE_PF_TO_HW(pf);
+	struct ice_vsi *vsi = pf->main_vsi;
+
+	if (hdr & (ICE_FLOW_SEG_HDR_GTPU_DWN |
+	    ICE_FLOW_SEG_HDR_GTPU_UP)) {
+		if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_udp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4_udp.hash_fld,
+					pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4.hash_fld,
+					pf->gtpu_hash_ctx.ipv4.pkt_hdr);
+				ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv4);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_udp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6_udp.hash_fld,
+					pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6.hash_fld,
+					pf->gtpu_hash_ctx.ipv6.pkt_hdr);
+				ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv6);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_tcp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4_tcp.hash_fld,
+					pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4.hash_fld,
+					pf->gtpu_hash_ctx.ipv4.pkt_hdr);
+				ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv4);
+			}
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_tcp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6_tcp.hash_fld,
+					pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6.hash_fld,
+					pf->gtpu_hash_ctx.ipv6.pkt_hdr);
+				ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv6);
+			}
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV4) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4.hash_fld,
+					pf->gtpu_hash_ctx.ipv4.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_udp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4_udp.hash_fld,
+					pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_tcp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv4_tcp.hash_fld,
+					pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp);
+			}
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV6) {
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6.hash_fld,
+					pf->gtpu_hash_ctx.ipv6.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_udp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6_udp.hash_fld,
+					pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp);
+			}
+
+			if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_tcp)) {
+				ice_rem_rss_cfg(hw, vsi->idx,
+					pf->gtpu_hash_ctx.ipv6_tcp.hash_fld,
+					pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr);
+				ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int
+ice_rem_rss_cfg_post(struct ice_pf *pf, uint32_t hdr)
+{
+	if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
+		if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp);
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_UDP)) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp);
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp);
+		} else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdr & ICE_FLOW_SEG_HDR_TCP)) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV4) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4);
+		} else if (hdr & ICE_FLOW_SEG_HDR_IPV6) {
+			ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6);
+		}
+	}
+
+	return 0;
+}
+
+int
+ice_rem_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id,
+		uint64_t fld, uint32_t hdr)
+{
+	struct ice_hw *hw = ICE_PF_TO_HW(pf);
+	int ret;
+
+	ret = ice_rem_rss_cfg(hw, vsi_id, fld, hdr);
+	if (ret && ret != ICE_ERR_DOES_NOT_EXIST)
+		PMD_DRV_LOG(ERR, "remove rss cfg failed\n");
+
+	ret = ice_rem_rss_cfg_post(pf, hdr);
+	if (ret)
+		PMD_DRV_LOG(ERR, "remove rss cfg post failed\n");
+
+	return 0;
+}
+
+int
+ice_add_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id,
+		uint64_t fld, uint32_t hdr, bool symm)
+{
+	struct ice_hw *hw = ICE_PF_TO_HW(pf);
+	int ret;
+
+	ret = ice_add_rss_cfg_pre(pf, hdr);
+	if (ret)
+		PMD_DRV_LOG(ERR, "add rss cfg pre failed\n");
+
+	ret = ice_add_rss_cfg(hw, vsi_id, fld, hdr, symm);
+	if (ret)
+		PMD_DRV_LOG(ERR, "add rss cfg failed\n");
+
+	ret = ice_add_rss_cfg_post(pf, hdr, fld, symm);
+	if (ret)
+		PMD_DRV_LOG(ERR, "add rss cfg post failed\n");
+
+	return 0;
+}
+
+static void
+ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf)
+{
+	struct ice_vsi *vsi = pf->main_vsi;
+	int ret;
+
+	/* Configure RSS for IPv4 with src/dst addr as input set */
+	if (rss_hf & ETH_RSS_IPV4) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4,
+				      ICE_FLOW_SEG_HDR_IPV4 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for IPv6 with src/dst addr as input set */
+	if (rss_hf & ETH_RSS_IPV6) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6,
+				      ICE_FLOW_SEG_HDR_IPV6 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for udp4 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4,
+				      ICE_FLOW_SEG_HDR_UDP |
+				      ICE_FLOW_SEG_HDR_IPV4 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for udp6 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6,
+				      ICE_FLOW_SEG_HDR_UDP |
+				      ICE_FLOW_SEG_HDR_IPV6 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for tcp4 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4,
+				      ICE_FLOW_SEG_HDR_TCP |
+				      ICE_FLOW_SEG_HDR_IPV4 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for tcp6 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6,
+				      ICE_FLOW_SEG_HDR_TCP |
+				      ICE_FLOW_SEG_HDR_IPV6 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for sctp4 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4,
+				      ICE_FLOW_SEG_HDR_SCTP |
+				      ICE_FLOW_SEG_HDR_IPV4 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	/* Configure RSS for sctp6 with src/dst addr and port as input set */
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6,
+				      ICE_FLOW_SEG_HDR_SCTP |
+				      ICE_FLOW_SEG_HDR_IPV6 |
+				      ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_IPV4) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV4 rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4 rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV4 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_IPV6) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV6 rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6 rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV6 rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV4_UDP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_UDP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_UDP rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV6_UDP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_UDP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_UDP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_UDP rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV4_TCP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_TCP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_TCP rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV6_TCP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_TCP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6,
+				ICE_FLOW_SEG_HDR_PPPOE |
+				ICE_FLOW_SEG_HDR_TCP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_TCP rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_SCTP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV4_SCTP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_SCTP |
+				ICE_FLOW_SEG_HDR_IPV4 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_SCTP rss flow fail %d",
+				    __func__, ret);
+	}
+
+	if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) {
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_IP |
+				ICE_FLOW_SEG_HDR_SCTP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_IPV6_SCTP rss flow fail %d",
+				    __func__, ret);
+
+		ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6,
+				ICE_FLOW_SEG_HDR_GTPU_EH |
+				ICE_FLOW_SEG_HDR_SCTP |
+				ICE_FLOW_SEG_HDR_IPV6 |
+				ICE_FLOW_SEG_HDR_IPV_OTHER, 0);
+		if (ret)
+			PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_SCTP rss flow fail %d",
+				    __func__, ret);
+	}
+}
+
 static int ice_init_rss(struct ice_pf *pf)
 {
 	struct ice_hw *hw = ICE_PF_TO_HW(pf);
@@ -2483,13 +3032,24 @@ static int ice_init_rss(struct ice_pf *pf)
 		return 0;
 	}
 
-	if (!vsi->rss_key)
+	if (!vsi->rss_key) {
 		vsi->rss_key = rte_zmalloc(NULL,
 					   vsi->rss_key_size, 0);
-	if (!vsi->rss_lut)
+		if (vsi->rss_key == NULL) {
+			PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key");
+			return -ENOMEM;
+		}
+	}
+	if (!vsi->rss_lut) {
 		vsi->rss_lut = rte_zmalloc(NULL,
 					   vsi->rss_lut_size, 0);
-
+		if (vsi->rss_lut == NULL) {
+			PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key");
+			rte_free(vsi->rss_key);
+			vsi->rss_key = NULL;
+			return -ENOMEM;
+		}
+	}
 	/* configure RSS key */
 	if (!rss_conf->rss_key) {
 		/* Calculate the default hash key */
@@ -2503,7 +3063,7 @@ static int ice_init_rss(struct ice_pf *pf)
 	rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
 	ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
 	if (ret)
-		return -EINVAL;
+		goto out;
 
 	/* init RSS LUT table */
 	for (i = 0; i < vsi->rss_lut_size; i++)
@@ -2513,7 +3073,7 @@ static int ice_init_rss(struct ice_pf *pf)
 				 ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
 				 vsi->rss_lut, vsi->rss_lut_size);
 	if (ret)
-		return -EINVAL;
+		goto out;
 
 	/* Enable registers for symmetric_toeplitz function. */
 	reg = ICE_READ_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id));
@@ -2521,72 +3081,40 @@ static int ice_init_rss(struct ice_pf *pf)
 		(1 << VSIQF_HASH_CTL_HASH_SCHEME_S);
 	ICE_WRITE_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id), reg);
 
-	/* configure RSS for IPv4 with input set IPv4 src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
-			      ICE_FLOW_SEG_HDR_IPV4, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret);
-
-	/* configure RSS for IPv6 with input set IPv6 src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
-			      ICE_FLOW_SEG_HDR_IPV6, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret);
-
-	/* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6,
-			      ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret);
-
-	/* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6,
-			      ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret);
-
-	/* configure RSS for sctp6 with input set IPv6 src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
-			      ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d",
-				__func__, ret);
+	/* RSS hash configuration */
+	ice_rss_hash_set(pf, rss_conf->rss_hf);
 
-	/* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4,
-			      ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret);
+	return 0;
+out:
+	rte_free(vsi->rss_key);
+	vsi->rss_key = NULL;
+	rte_free(vsi->rss_lut);
+	vsi->rss_lut = NULL;
+	return -EINVAL;
+}
 
-	/* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4,
-			      ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret);
+static int
+ice_dev_configure(struct rte_eth_dev *dev)
+{
+	struct ice_adapter *ad =
+		ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+	struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+	int ret;
 
-	/* configure RSS for sctp4 with input set IP src/dst */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
-			      ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d",
-				__func__, ret);
+	/* Initialize to TRUE. If any of Rx queues doesn't meet the
+	 * bulk allocation or vector Rx preconditions we will reset it.
+	 */
+	ad->rx_bulk_alloc_allowed = true;
+	ad->tx_simple_allowed = true;
 
-	/* configure RSS for gtpu with input set TEID */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_GTP_U_IPV4_TEID,
-				ICE_FLOW_SEG_HDR_GTPU_IP, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s GTPU_TEID rss flow fail %d",
-				__func__, ret);
+	if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+		dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 
-	/**
-	 * configure RSS for pppoe/pppod with input set
-	 * Source MAC and Session ID
-	 */
-	ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_PPPOE_SESS_ID_ETH,
-				ICE_FLOW_SEG_HDR_PPPOE, 0);
-	if (ret)
-		PMD_DRV_LOG(ERR, "%s PPPoE/PPPoD_SessionID rss flow fail %d",
-				__func__, ret);
+	ret = ice_init_rss(pf);
+	if (ret) {
+		PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
+		return ret;
+	}
 
 	return 0;
 }
@@ -2794,12 +3322,6 @@ ice_dev_start(struct rte_eth_dev *dev)
 		}
 	}
 
-	ret = ice_init_rss(pf);
-	if (ret) {
-		PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
-		goto rx_err;
-	}
-
 	ice_set_rx_function(dev);
 	ice_set_tx_function(dev);
 
@@ -3117,8 +3639,11 @@ ice_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 		link.link_speed = ETH_SPEED_NUM_100G;
 		break;
 	case ICE_AQ_LINK_SPEED_UNKNOWN:
-	default:
 		PMD_DRV_LOG(ERR, "Unknown link speed");
+		link.link_speed = ETH_SPEED_NUM_UNKNOWN;
+		break;
+	default:
+		PMD_DRV_LOG(ERR, "None link speed");
 		link.link_speed = ETH_SPEED_NUM_NONE;
 		break;
 	}
@@ -3170,7 +3695,7 @@ ice_force_phys_link_state(struct ice_hw *hw, bool link_up)
 	cfg.phy_type_low = pcaps->phy_type_low;
 	cfg.phy_type_high = pcaps->phy_type_high;
 	cfg.caps = pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
-	cfg.low_power_ctrl = pcaps->low_power_ctrl;
+	cfg.low_power_ctrl_an = pcaps->low_power_ctrl_an;
 	cfg.eee_cap = pcaps->eee_cap;
 	cfg.eeer_value = pcaps->eeer_value;
 	cfg.link_fec_opt = pcaps->link_fec_options;
@@ -3687,7 +4212,12 @@ ice_rss_hash_update(struct rte_eth_dev *dev,
 	if (status)
 		return status;
 
-	/* TODO: hash enable config, ice_add_rss_cfg */
+	if (rss_conf->rss_hf == 0)
+		return 0;
+
+	/* RSS hash configuration */
+	ice_rss_hash_set(pf, rss_conf->rss_hf);
+
 	return 0;
 }
 
@@ -3846,21 +4376,19 @@ static int
 ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
 {
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-	u32 full_ver;
 	u8 ver, patch;
 	u16 build;
 	int ret;
 
-	full_ver = hw->nvm.oem_ver;
-	ver = (u8)(full_ver >> 24);
-	build = (u16)((full_ver >> 8) & 0xffff);
-	patch = (u8)(full_ver & 0xff);
+	ver = hw->flash.orom.major;
+	patch = hw->flash.orom.patch;
+	build = hw->flash.orom.build;
 
 	ret = snprintf(fw_version, fw_size,
-			"%d.%d%d 0x%08x %d.%d.%d",
-			((hw->nvm.ver >> 12) & 0xf),
-			((hw->nvm.ver >> 4) & 0xff),
-			(hw->nvm.ver & 0xf), hw->nvm.eetrack,
+			"%x.%02x 0x%08x %d.%d.%d",
+			hw->flash.nvm.major,
+			hw->flash.nvm.minor,
+			hw->flash.nvm.eetrack,
 			ver, build, patch);
 
 	/* add the size of '\0' */
@@ -3958,8 +4486,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev)
 {
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
-	/* Convert word count to byte count */
-	return hw->nvm.sr_words << 1;
+	return hw->flash.flash_size;
 }
 
 static int
@@ -3967,26 +4494,24 @@ ice_get_eeprom(struct rte_eth_dev *dev,
 	       struct rte_dev_eeprom_info *eeprom)
 {
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-	uint16_t *data = eeprom->data;
-	uint16_t first_word, last_word, nwords;
 	enum ice_status status = ICE_SUCCESS;
+	uint8_t *data = eeprom->data;
 
-	first_word = eeprom->offset >> 1;
-	last_word = (eeprom->offset + eeprom->length - 1) >> 1;
-	nwords = last_word - first_word + 1;
+	eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 
-	if (first_word >= hw->nvm.sr_words ||
-	    last_word >= hw->nvm.sr_words) {
-		PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range.");
-		return -EINVAL;
+	status = ice_acquire_nvm(hw, ICE_RES_READ);
+	if (status) {
+		PMD_DRV_LOG(ERR, "acquire nvm failed.");
+		return -EIO;
 	}
 
-	eeprom->magic = hw->vendor_id | (hw->device_id << 16);
+	status = ice_read_flat_nvm(hw, eeprom->offset, &eeprom->length,
+				   data, false);
+
+	ice_release_nvm(hw);
 
-	status = ice_read_sr_buf(hw, first_word, &nwords, data);
 	if (status) {
 		PMD_DRV_LOG(ERR, "EEPROM read failed.");
-		eeprom->length = sizeof(uint16_t) * nwords;
 		return -EIO;
 	}
 
@@ -4062,6 +4587,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi)
 	ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),
 			   vsi->offset_loaded, &oes->rx_broadcast,
 			   &nes->rx_broadcast);
+	/* enlarge the limitation when rx_bytes overflowed */
+	if (vsi->offset_loaded) {
+		if (ICE_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes)
+			nes->rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;
+		nes->rx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_rx_bytes);
+	}
+	vsi->old_rx_bytes = nes->rx_bytes;
 	/* exclude CRC bytes */
 	nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
 			  nes->rx_broadcast) * RTE_ETHER_CRC_LEN;
@@ -4088,6 +4620,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi)
 	/* GLV_TDPC not supported */
 	ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,
 			   &oes->tx_errors, &nes->tx_errors);
+	/* enlarge the limitation when tx_bytes overflowed */
+	if (vsi->offset_loaded) {
+		if (ICE_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes)
+			nes->tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;
+		nes->tx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_tx_bytes);
+	}
+	vsi->old_tx_bytes = nes->tx_bytes;
 	vsi->offset_loaded = true;
 
 	PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************",
@@ -4135,6 +4674,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)
 	ice_stat_update_32(hw, PRTRPB_RDPC,
 			   pf->offset_loaded, &os->eth.rx_discards,
 			   &ns->eth.rx_discards);
+	/* enlarge the limitation when rx_bytes overflowed */
+	if (pf->offset_loaded) {
+		if (ICE_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes)
+			ns->eth.rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;
+		ns->eth.rx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_rx_bytes);
+	}
+	pf->old_rx_bytes = ns->eth.rx_bytes;
 
 	/* Workaround: CRC size should not be included in byte statistics,
 	 * so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx
@@ -4165,6 +4711,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)
 			   GLPRT_BPTCL(hw->port_info->lport),
 			   pf->offset_loaded, &os->eth.tx_broadcast,
 			   &ns->eth.tx_broadcast);
+	/* enlarge the limitation when tx_bytes overflowed */
+	if (pf->offset_loaded) {
+		if (ICE_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes)
+			ns->eth.tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;
+		ns->eth.tx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_tx_bytes);
+	}
+	pf->old_tx_bytes = ns->eth.tx_bytes;
 	ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +
 			     ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN;
 
@@ -4573,35 +5126,18 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
-			      ICE_PROTO_XTR_ARG "=[queue:]<vlan|ipv4|ipv6|ipv6_flow|tcp>"
+			      ICE_PROTO_XTR_ARG "=[queue:]<vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset>"
 			      ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
-			      ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>"
-			      ICE_FLOW_MARK_SUPPORT_ARG "=<0|1>");
-
-RTE_INIT(ice_init_log)
-{
-	ice_logtype_init = rte_log_register("pmd.net.ice.init");
-	if (ice_logtype_init >= 0)
-		rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
-	ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
-	if (ice_logtype_driver >= 0)
-		rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
+			      ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
 
+RTE_LOG_REGISTER(ice_logtype_init, pmd.net.ice.init, NOTICE);
+RTE_LOG_REGISTER(ice_logtype_driver, pmd.net.ice.driver, NOTICE);
 #ifdef RTE_LIBRTE_ICE_DEBUG_RX
-	ice_logtype_rx = rte_log_register("pmd.net.ice.rx");
-	if (ice_logtype_rx >= 0)
-		rte_log_set_level(ice_logtype_rx, RTE_LOG_DEBUG);
+RTE_LOG_REGISTER(ice_logtype_rx, pmd.net.ice.rx, DEBUG);
 #endif
-
 #ifdef RTE_LIBRTE_ICE_DEBUG_TX
-	ice_logtype_tx = rte_log_register("pmd.net.ice.tx");
-	if (ice_logtype_tx >= 0)
-		rte_log_set_level(ice_logtype_tx, RTE_LOG_DEBUG);
+RTE_LOG_REGISTER(ice_logtype_tx, pmd.net.ice.tx, DEBUG);
 #endif
-
 #ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE
-	ice_logtype_tx_free = rte_log_register("pmd.net.ice.tx_free");
-	if (ice_logtype_tx_free >= 0)
-		rte_log_set_level(ice_logtype_tx_free, RTE_LOG_DEBUG);
+RTE_LOG_REGISTER(ice_logtype_tx_free, pmd.net.ice.tx_free, DEBUG);
 #endif
-}