X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fice%2Fice_ethdev.c;h=eaf602485505ac1a2518ea6a4158de05e6121052;hb=8bdcabf4c193f9d8ec74b656eb618e4e964384f9;hp=d80c0a94b5ea737b5fc7f2fdaa97450d668390d7;hpb=0607dadf98c71bdc96ea7b54eda26f1b667be1f6;p=dpdk.git diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index d80c0a94b5..eaf6024855 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -76,7 +76,7 @@ static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = { static int ice_dev_configure(struct rte_eth_dev *dev); static int ice_dev_start(struct rte_eth_dev *dev); -static void ice_dev_stop(struct rte_eth_dev *dev); +static int ice_dev_stop(struct rte_eth_dev *dev); static int ice_dev_close(struct rte_eth_dev *dev); static int ice_dev_reset(struct rte_eth_dev *dev); static int ice_dev_info_get(struct rte_eth_dev *dev, @@ -2137,6 +2137,8 @@ ice_dev_init(struct rte_eth_dev *dev) return 0; } + dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + ice_set_default_ptype_table(dev); pci_dev = RTE_DEV_TO_PCI(dev->device); intr_handle = &pci_dev->intr_handle; @@ -2331,7 +2333,7 @@ ice_vsi_disable_queues_intr(struct ice_vsi *vsi) ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M); } -static void +static int ice_dev_stop(struct rte_eth_dev *dev) { struct rte_eth_dev_data *data = dev->data; @@ -2343,7 +2345,7 @@ ice_dev_stop(struct rte_eth_dev *dev) /* avoid stopping again */ if (pf->adapter_stopped) - return; + return 0; /* stop and clear all Rx queues */ for (i = 0; i < data->nb_rx_queues; i++) @@ -2370,6 +2372,8 @@ ice_dev_stop(struct rte_eth_dev *dev) pf->adapter_stopped = true; dev->data->dev_started = 0; + + return 0; } static int @@ -2381,6 +2385,7 @@ ice_dev_close(struct rte_eth_dev *dev) struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; struct ice_adapter *ad = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; @@ -2392,7 +2397,7 @@ ice_dev_close(struct rte_eth_dev *dev) */ ice_pf_disable_irq0(hw); - ice_dev_stop(dev); + ret = ice_dev_stop(dev); if (!ad->is_safe_mode) ice_flow_uninit(ad); @@ -2417,7 +2422,7 @@ ice_dev_close(struct rte_eth_dev *dev) rte_intr_callback_unregister(intr_handle, ice_interrupt_handler, dev); - return 0; + return ret; } static int @@ -2918,6 +2923,16 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) struct ice_vsi *vsi = pf->main_vsi; int ret; +#define ICE_RSS_HF_ALL ( \ + ETH_RSS_IPV4 | \ + ETH_RSS_IPV6 | \ + ETH_RSS_NONFRAG_IPV4_UDP | \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + ETH_RSS_NONFRAG_IPV4_TCP | \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + ETH_RSS_NONFRAG_IPV4_SCTP | \ + ETH_RSS_NONFRAG_IPV6_SCTP) + /* Configure RSS for IPv4 with src/dst addr as input set */ if (rss_hf & ETH_RSS_IPV4) { ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, @@ -2984,7 +2999,7 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) /* Configure RSS for sctp4 with src/dst addr and port as input set */ if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) { - ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER, 0); @@ -2995,7 +3010,7 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) /* Configure RSS for sctp6 with src/dst addr and port as input set */ if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) { - ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER, 0); @@ -3211,6 +3226,8 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_SCTP rss flow fail %d", __func__, ret); } + + pf->rss_hf = rss_hf & ICE_RSS_HF_ALL; } static int ice_init_rss(struct ice_pf *pf) @@ -3340,7 +3357,7 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect, PMD_DRV_LOG(INFO, "queue %d is binding to vect %d", base_queue + i, msix_vect); /* set ITR0 value */ - ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x10); + ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x2); ICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val); ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx); } @@ -4434,8 +4451,7 @@ ice_rss_hash_conf_get(struct rte_eth_dev *dev, ice_get_rss_key(vsi, rss_conf->rss_key, &rss_conf->rss_key_len); - /* TODO: default set to 0 as hf config is not supported now */ - rss_conf->rss_hf = 0; + rss_conf->rss_hf = pf->rss_hf; return 0; }