X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fionic%2Fionic_dev.c;h=43e9ca3de356a60293b0b45dc7119732ca166927;hb=46c6714ffd4326cd9ea884a9812a459a444f464a;hp=c63709ee8bd307326eb1c89ef8372a5e789ef61d;hpb=669c8de67c88f9d168eeab0fc93b71d63c669a73;p=dpdk.git

diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index c63709ee8b..43e9ca3de3 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -2,9 +2,12 @@
  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
  */
 
+#include <stdbool.h>
+
 #include <rte_malloc.h>
 
 #include "ionic_dev.h"
+#include "ionic_lif.h"
 #include "ionic.h"
 
 int
@@ -15,6 +18,7 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	struct ionic_dev *idev = &adapter->idev;
 	uint32_t sig;
 	u_char *bar0_base;
+	unsigned int i;
 
 	/* BAR0: dev_cmd and interrupts */
 	if (num_bars < 1) {
@@ -46,6 +50,13 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 		return -EFAULT;
 	}
 
+	for (i = 0; i < IONIC_DEVINFO_FWVERS_BUFLEN; i++)
+		adapter->fw_version[i] =
+			ioread8(&idev->dev_info->fw_version[i]);
+	adapter->fw_version[IONIC_DEVINFO_FWVERS_BUFLEN - 1] = '\0';
+
+	IONIC_PRINT(DEBUG, "Firmware version: %s", adapter->fw_version);
+
 	/* BAR1: doorbells */
 	bar++;
 	if (num_bars < 2) {
@@ -54,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -77,9 +87,8 @@ void
 ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem)
 {
 	union ionic_dev_cmd_comp *comp = mem;
-	unsigned int i;
-	uint32_t comp_size = sizeof(comp->words) /
-		sizeof(comp->words[0]);
+	uint32_t comp_size = RTE_DIM(comp->words);
+	uint32_t i;
 
 	for (i = 0; i < comp_size; i++)
 		comp->words[i] = ioread32(&idev->dev_cmd->comp.words[i]);
@@ -88,9 +97,11 @@ ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem)
 void
 ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
 {
-	unsigned int i;
-	uint32_t cmd_size = sizeof(cmd->words) /
-		sizeof(cmd->words[0]);
+	uint32_t cmd_size = RTE_DIM(cmd->words);
+	uint32_t i;
+
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+		    ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
 
 	for (i = 0; i < cmd_size; i++)
 		iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
@@ -152,7 +163,7 @@ ionic_dev_cmd_port_init(struct ionic_dev *idev)
 	union ionic_dev_cmd cmd = {
 		.port_init.opcode = IONIC_CMD_PORT_INIT,
 		.port_init.index = 0,
-		.port_init.info_pa = idev->port_info_pa,
+		.port_init.info_pa = rte_cpu_to_le_64(idev->port_info_pa),
 	};
 
 	ionic_dev_cmd_go(idev, &cmd);
@@ -189,7 +200,7 @@ ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed)
 		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
 		.port_setattr.index = 0,
 		.port_setattr.attr = IONIC_PORT_ATTR_SPEED,
-		.port_setattr.speed = speed,
+		.port_setattr.speed = rte_cpu_to_le_32(speed),
 	};
 
 	ionic_dev_cmd_go(idev, &cmd);
@@ -202,7 +213,7 @@ ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu)
 		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
 		.port_setattr.index = 0,
 		.port_setattr.attr = IONIC_PORT_ATTR_MTU,
-		.port_setattr.mtu = mtu,
+		.port_setattr.mtu = rte_cpu_to_le_32(mtu),
 	};
 
 	ionic_dev_cmd_go(idev, &cmd);
@@ -262,6 +273,20 @@ ionic_dev_cmd_port_loopback(struct ionic_dev *idev, uint8_t loopback_mode)
 
 /* LIF commands */
 
+void
+ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
+		uint16_t lif_type, uint8_t qtype, uint8_t qver)
+{
+	union ionic_dev_cmd cmd = {
+		.q_identify.opcode = IONIC_CMD_Q_IDENTIFY,
+		.q_identify.lif_type = rte_cpu_to_le_16(lif_type),
+		.q_identify.type = qtype,
+		.q_identify.ver = qver,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
 void
 ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, uint8_t ver)
 {
@@ -275,25 +300,141 @@ ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, uint8_t ver)
 }
 
 void
-ionic_dev_cmd_lif_init(struct ionic_dev *idev, uint16_t lif_index,
-		       rte_iova_t info_pa)
+ionic_dev_cmd_lif_init(struct ionic_dev *idev, rte_iova_t info_pa)
 {
 	union ionic_dev_cmd cmd = {
 		.lif_init.opcode = IONIC_CMD_LIF_INIT,
-		.lif_init.index = lif_index,
-		.lif_init.info_pa = info_pa,
+		.lif_init.info_pa = rte_cpu_to_le_64(info_pa),
 	};
 
 	ionic_dev_cmd_go(idev, &cmd);
 }
 
 void
-ionic_dev_cmd_lif_reset(struct ionic_dev *idev, uint16_t lif_index)
+ionic_dev_cmd_lif_reset(struct ionic_dev *idev)
 {
 	union ionic_dev_cmd cmd = {
 		.lif_init.opcode = IONIC_CMD_LIF_RESET,
-		.lif_init.index = lif_index,
 	};
 
 	ionic_dev_cmd_go(idev, &cmd);
 }
+
+struct ionic_doorbell *
+ionic_db_map(struct ionic_lif *lif, struct ionic_queue *q)
+{
+	return lif->kern_dbpage + q->hw_type;
+}
+
+void
+ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
+		unsigned long index)
+{
+	ionic_intr_clean(idev->intr_ctrl, index);
+	intr->index = index;
+}
+
+void
+ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq)
+{
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_cq *cq = &qcq->cq;
+
+	union ionic_dev_cmd cmd = {
+		.q_init.opcode = IONIC_CMD_Q_INIT,
+		.q_init.type = q->type,
+		.q_init.ver = qcq->lif->qtype_info[q->type].version,
+		.q_init.index = rte_cpu_to_le_32(q->index),
+		.q_init.flags = rte_cpu_to_le_16(IONIC_QINIT_F_ENA),
+		.q_init.intr_index = rte_cpu_to_le_16(IONIC_INTR_NONE),
+		.q_init.ring_size = rte_log2_u32(q->num_descs),
+		.q_init.ring_base = rte_cpu_to_le_64(q->base_pa),
+		.q_init.cq_ring_base = rte_cpu_to_le_64(cq->base_pa),
+	};
+
+	IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+int
+ionic_cq_init(struct ionic_cq *cq, uint16_t num_descs)
+{
+	if (!rte_is_power_of_2(num_descs) ||
+	    num_descs < IONIC_MIN_RING_DESC ||
+	    num_descs > IONIC_MAX_RING_DESC) {
+		IONIC_PRINT(ERR, "%u descriptors (min: %u max: %u)",
+			num_descs, IONIC_MIN_RING_DESC, IONIC_MAX_RING_DESC);
+		return -EINVAL;
+	}
+
+	cq->num_descs = num_descs;
+	cq->size_mask = num_descs - 1;
+	cq->tail_idx = 0;
+	cq->done_color = 1;
+
+	return 0;
+}
+
+void
+ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa)
+{
+	cq->base = base;
+	cq->base_pa = base_pa;
+}
+
+uint32_t
+ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
+		 ionic_cq_cb cb, void *cb_arg)
+{
+	uint32_t work_done = 0;
+
+	if (work_to_do == 0)
+		return 0;
+
+	while (cb(cq, cq->tail_idx, cb_arg)) {
+		cq->tail_idx = Q_NEXT_TO_SRVC(cq, 1);
+		if (cq->tail_idx == 0)
+			cq->done_color = !cq->done_color;
+
+		if (++work_done == work_to_do)
+			break;
+	}
+
+	return work_done;
+}
+
+int
+ionic_q_init(struct ionic_queue *q, uint32_t index, uint16_t num_descs)
+{
+	uint32_t ring_size;
+
+	if (!rte_is_power_of_2(num_descs))
+		return -EINVAL;
+
+	ring_size = rte_log2_u32(num_descs);
+	if (ring_size < 2 || ring_size > 16)
+		return -EINVAL;
+
+	q->index = index;
+	q->num_descs = num_descs;
+	q->size_mask = num_descs - 1;
+	q->head_idx = 0;
+	q->tail_idx = 0;
+
+	return 0;
+}
+
+void
+ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa)
+{
+	q->base = base;
+	q->base_pa = base_pa;
+}
+
+void
+ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa)
+{
+	q->sg_base = base;
+	q->sg_base_pa = base_pa;
+}