X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fionic%2Fionic_dev.h;h=2f27e636465e1ee6618e3c1a94ae0eb91780bffb;hb=8ec5ad7f8028830ef46c0d57315a32d0032af9c3;hp=82a3cdb706eb876e58bd273904c61b15ab100c76;hpb=5ef518098ec6cbed87e84fe3b2d748aa6fda52c1;p=dpdk.git diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h index 82a3cdb706..2f27e63646 100644 --- a/drivers/net/ionic/ionic_dev.h +++ b/drivers/net/ionic/ionic_dev.h @@ -5,11 +5,25 @@ #ifndef _IONIC_DEV_H_ #define _IONIC_DEV_H_ +#include + #include "ionic_osdep.h" #include "ionic_if.h" #include "ionic_regs.h" -#define IONIC_DEVCMD_TIMEOUT 30 /* devcmd_timeout */ +#define IONIC_MIN_MTU RTE_ETHER_MIN_MTU +#define IONIC_MAX_MTU 9194 + +#define IONIC_MAX_RING_DESC 32768 +#define IONIC_MIN_RING_DESC 16 +#define IONIC_DEF_TXRX_DESC 4096 + +#define IONIC_LIFS_MAX 1024 + +#define IONIC_DEVCMD_TIMEOUT 5 /* devcmd_timeout */ +#define IONIC_DEVCMD_CHECK_PERIOD_US 10 /* devcmd status chk period */ + +#define IONIC_ALIGN 4096 struct ionic_adapter; @@ -76,7 +90,6 @@ static inline void ionic_struct_size_checks(void) RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64); RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64); RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16); - RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_del_cmd) != 64); /* RDMA commands */ RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64); @@ -93,7 +106,7 @@ static inline void ionic_struct_size_checks(void) /* I/O */ RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16); - RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128); + RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc_v1) != 256); RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16); RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16); @@ -106,13 +119,65 @@ struct ionic_dev { union ionic_dev_cmd_regs __iomem *dev_cmd; struct ionic_doorbell __iomem *db_pages; - rte_iova_t phy_db_pages; - struct ionic_intr __iomem *intr_ctrl; - struct ionic_intr_status __iomem *intr_status; + + struct ionic_port_info *port_info; + const struct rte_memzone *port_info_z; + rte_iova_t port_info_pa; + uint32_t port_info_sz; +}; + +#define Q_NEXT_TO_POST(_q, _n) (((_q)->head_idx + (_n)) & ((_q)->size_mask)) +#define Q_NEXT_TO_SRVC(_q, _n) (((_q)->tail_idx + (_n)) & ((_q)->size_mask)) + +#define IONIC_INFO_IDX(_q, _i) (_i) +#define IONIC_INFO_PTR(_q, _i) (&(_q)->info[IONIC_INFO_IDX((_q), _i)]) + +struct ionic_queue { + uint16_t num_descs; + uint16_t head_idx; + uint16_t tail_idx; + uint16_t size_mask; + uint8_t type; + uint8_t hw_type; + void *base; + void *sg_base; + struct ionic_doorbell __iomem *db; + void **info; + + uint32_t index; + uint32_t hw_index; + rte_iova_t base_pa; + rte_iova_t sg_base_pa; +}; + +#define IONIC_INTR_NONE (-1) + +struct ionic_intr_info { + int index; + uint32_t vector; + struct ionic_intr __iomem *ctrl; +}; + +struct ionic_cq { + uint16_t tail_idx; + uint16_t num_descs; + uint16_t size_mask; + bool done_color; + void *base; + rte_iova_t base_pa; }; +struct ionic_lif; +struct ionic_adapter; +struct ionic_qcq; + +void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr, + unsigned long index); + +const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode); + int ionic_dev_setup(struct ionic_adapter *adapter); void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); @@ -124,4 +189,62 @@ void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver); void ionic_dev_cmd_init(struct ionic_dev *idev); void ionic_dev_cmd_reset(struct ionic_dev *idev); +void ionic_dev_cmd_port_identify(struct ionic_dev *idev); +void ionic_dev_cmd_port_init(struct ionic_dev *idev); +void ionic_dev_cmd_port_reset(struct ionic_dev *idev); +void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state); +void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed); +void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu); +void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable); +void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type); +void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type); +void ionic_dev_cmd_port_loopback(struct ionic_dev *idev, + uint8_t loopback_mode); + +void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, + uint16_t lif_type, uint8_t qtype, uint8_t qver); + +void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, + uint8_t ver); +void ionic_dev_cmd_lif_init(struct ionic_dev *idev, rte_iova_t addr); +void ionic_dev_cmd_lif_reset(struct ionic_dev *idev); + +void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq); + +struct ionic_doorbell __iomem *ionic_db_map(struct ionic_lif *lif, + struct ionic_queue *q); + +int ionic_cq_init(struct ionic_cq *cq, uint16_t num_descs); +void ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa); +typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint16_t cq_desc_index, + void *cb_arg); +uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do, + ionic_cq_cb cb, void *cb_arg); + +int ionic_q_init(struct ionic_queue *q, uint32_t index, uint16_t num_descs); +void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); +void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); +void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, void *cb_arg); + +static inline uint16_t +ionic_q_space_avail(struct ionic_queue *q) +{ + uint16_t avail = q->tail_idx; + + if (q->head_idx >= avail) + avail += q->num_descs - q->head_idx - 1; + else + avail -= q->head_idx + 1; + + return avail; +} + +static inline void +ionic_q_flush(struct ionic_queue *q) +{ + uint64_t val = IONIC_DBELL_QID(q->hw_index) | q->head_idx; + + rte_write64(rte_cpu_to_le_64(val), q->db); +} + #endif /* _IONIC_DEV_H_ */