X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fionic%2Fionic_lif.c;h=c1a95ca7c25876ae6a19d2d212214abba16b5342;hb=be63459e0bdd00fcb679999dc171e50a1486b91f;hp=69830cd6330d92c151bff0049bc05a6f66948c84;hpb=a27d901331da7a0d6959cb2b3a90a017f2463103;p=dpdk.git diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c index 69830cd633..c1a95ca7c2 100644 --- a/drivers/net/ionic/ionic_lif.c +++ b/drivers/net/ionic/ionic_lif.c @@ -25,7 +25,6 @@ ionic_qcq_enable(struct ionic_qcq *qcq) .pending_work = true, .cmd.q_control = { .opcode = IONIC_CMD_Q_CONTROL, - .lif_index = lif->index, .type = q->type, .index = q->index, .oper = IONIC_Q_ENABLE, @@ -50,7 +49,6 @@ ionic_qcq_disable(struct ionic_qcq *qcq) .pending_work = true, .cmd.q_control = { .opcode = IONIC_CMD_Q_CONTROL, - .lif_index = lif->index, .type = q->type, .index = q->index, .oper = IONIC_Q_DISABLE, @@ -65,23 +63,173 @@ ionic_qcq_disable(struct ionic_qcq *qcq) return ionic_adminq_post_wait(lif, &ctx); } -int -ionic_lif_stop(struct ionic_lif *lif __rte_unused) +void +ionic_lif_stop(struct ionic_lif *lif) { - /* Carrier OFF here */ + IONIC_PRINT_CALL(); - return 0; + lif->state &= ~IONIC_LIF_F_UP; } void ionic_lif_reset(struct ionic_lif *lif) { struct ionic_dev *idev = &lif->adapter->idev; + int err; IONIC_PRINT_CALL(); - ionic_dev_cmd_lif_reset(idev, lif->index); - ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + ionic_dev_cmd_lif_reset(idev); + err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + if (err) + IONIC_PRINT(WARNING, "Failed to reset %s", lif->name); +} + +static void +ionic_lif_get_abs_stats(const struct ionic_lif *lif, struct rte_eth_stats *stats) +{ + struct ionic_lif_stats *ls = &lif->info->stats; + uint32_t i; + uint32_t num_rx_q_counters = RTE_MIN(lif->nrxqcqs, (uint32_t) + RTE_ETHDEV_QUEUE_STAT_CNTRS); + uint32_t num_tx_q_counters = RTE_MIN(lif->ntxqcqs, (uint32_t) + RTE_ETHDEV_QUEUE_STAT_CNTRS); + + memset(stats, 0, sizeof(*stats)); + + if (ls == NULL) { + IONIC_PRINT(DEBUG, "Stats on port %u not yet initialized", + lif->port_id); + return; + } + + /* RX */ + + stats->ipackets = ls->rx_ucast_packets + + ls->rx_mcast_packets + + ls->rx_bcast_packets; + + stats->ibytes = ls->rx_ucast_bytes + + ls->rx_mcast_bytes + + ls->rx_bcast_bytes; + + for (i = 0; i < lif->nrxqcqs; i++) { + struct ionic_rx_stats *rx_stats = &lif->rxqcqs[i]->stats.rx; + stats->imissed += + rx_stats->no_cb_arg + + rx_stats->bad_cq_status + + rx_stats->no_room + + rx_stats->bad_len; + } + + stats->imissed += + ls->rx_ucast_drop_packets + + ls->rx_mcast_drop_packets + + ls->rx_bcast_drop_packets; + + stats->imissed += + ls->rx_queue_empty + + ls->rx_dma_error + + ls->rx_queue_disabled + + ls->rx_desc_fetch_error + + ls->rx_desc_data_error; + + for (i = 0; i < num_rx_q_counters; i++) { + struct ionic_rx_stats *rx_stats = &lif->rxqcqs[i]->stats.rx; + stats->q_ipackets[i] = rx_stats->packets; + stats->q_ibytes[i] = rx_stats->bytes; + stats->q_errors[i] = + rx_stats->no_cb_arg + + rx_stats->bad_cq_status + + rx_stats->no_room + + rx_stats->bad_len; + } + + /* TX */ + + stats->opackets = ls->tx_ucast_packets + + ls->tx_mcast_packets + + ls->tx_bcast_packets; + + stats->obytes = ls->tx_ucast_bytes + + ls->tx_mcast_bytes + + ls->tx_bcast_bytes; + + for (i = 0; i < lif->ntxqcqs; i++) { + struct ionic_tx_stats *tx_stats = &lif->txqcqs[i]->stats.tx; + stats->oerrors += tx_stats->drop; + } + + stats->oerrors += + ls->tx_ucast_drop_packets + + ls->tx_mcast_drop_packets + + ls->tx_bcast_drop_packets; + + stats->oerrors += + ls->tx_dma_error + + ls->tx_queue_disabled + + ls->tx_desc_fetch_error + + ls->tx_desc_data_error; + + for (i = 0; i < num_tx_q_counters; i++) { + struct ionic_tx_stats *tx_stats = &lif->txqcqs[i]->stats.tx; + stats->q_opackets[i] = tx_stats->packets; + stats->q_obytes[i] = tx_stats->bytes; + } +} + +void +ionic_lif_get_stats(const struct ionic_lif *lif, + struct rte_eth_stats *stats) +{ + ionic_lif_get_abs_stats(lif, stats); + + stats->ipackets -= lif->stats_base.ipackets; + stats->opackets -= lif->stats_base.opackets; + stats->ibytes -= lif->stats_base.ibytes; + stats->obytes -= lif->stats_base.obytes; + stats->imissed -= lif->stats_base.imissed; + stats->ierrors -= lif->stats_base.ierrors; + stats->oerrors -= lif->stats_base.oerrors; + stats->rx_nombuf -= lif->stats_base.rx_nombuf; +} + +void +ionic_lif_reset_stats(struct ionic_lif *lif) +{ + uint32_t i; + + for (i = 0; i < lif->nrxqcqs; i++) { + memset(&lif->rxqcqs[i]->stats.rx, 0, + sizeof(struct ionic_rx_stats)); + memset(&lif->txqcqs[i]->stats.tx, 0, + sizeof(struct ionic_tx_stats)); + } + + ionic_lif_get_abs_stats(lif, &lif->stats_base); +} + +void +ionic_lif_get_hw_stats(struct ionic_lif *lif, struct ionic_lif_stats *stats) +{ + uint16_t i, count = sizeof(struct ionic_lif_stats) / sizeof(uint64_t); + uint64_t *stats64 = (uint64_t *)stats; + uint64_t *lif_stats64 = (uint64_t *)&lif->info->stats; + uint64_t *lif_stats64_base = (uint64_t *)&lif->lif_stats_base; + + for (i = 0; i < count; i++) + stats64[i] = lif_stats64[i] - lif_stats64_base[i]; +} + +void +ionic_lif_reset_hw_stats(struct ionic_lif *lif) +{ + uint16_t i, count = sizeof(struct ionic_lif_stats) / sizeof(uint64_t); + uint64_t *lif_stats64 = (uint64_t *)&lif->info->stats; + uint64_t *lif_stats64_base = (uint64_t *)&lif->lif_stats_base; + + for (i = 0; i < count; i++) + lif_stats64_base[i] = lif_stats64[i]; } static int @@ -158,10 +306,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev, } void -ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused) +ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index) { struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); struct ionic_adapter *adapter = lif->adapter; + struct rte_ether_addr *mac_addr; IONIC_PRINT_CALL(); @@ -172,11 +321,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused) return; } - if (!rte_is_valid_assigned_ether_addr(ð_dev->data->mac_addrs[index])) + mac_addr = ð_dev->data->mac_addrs[index]; + + if (!rte_is_valid_assigned_ether_addr(mac_addr)) return; - ionic_lif_addr_del(lif, (const uint8_t *) - ð_dev->data->mac_addrs[index]); + ionic_lif_addr_del(lif, (const uint8_t *)mac_addr); } int @@ -286,7 +436,6 @@ ionic_lif_rx_mode(struct ionic_lif *lif, uint32_t rx_mode) .pending_work = true, .cmd.rx_mode_set = { .opcode = IONIC_CMD_RX_MODE_SET, - .lif_index = lif->index, .rx_mode = rx_mode, }, }; @@ -378,7 +527,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu) .pending_work = true, .cmd.lif_setattr = { .opcode = IONIC_CMD_LIF_SETATTR, - .index = lif->index, .attr = IONIC_LIF_ATTR_MTU, .mtu = new_mtu, }, @@ -389,8 +537,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu) if (err) return err; - lif->mtu = new_mtu; - return 0; } @@ -404,7 +550,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr) /* * Note: interrupt handler is called for index = 0 only * (we use interrupts for the notifyq only anyway, - * which hash index = 0) + * which has index = 0) */ for (index = 0; index < adapter->nintrs; index++) @@ -436,7 +582,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type, uint32_t desc_size, uint32_t cq_desc_size, uint32_t sg_desc_size, - uint32_t pid, struct ionic_qcq **qcq) + struct ionic_qcq **qcq) { struct ionic_dev *idev = &lif->adapter->idev; struct ionic_qcq *new; @@ -486,7 +632,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type, new->q.type = type; err = ionic_q_init(lif, idev, &new->q, index, num_descs, - desc_size, sg_desc_size, pid); + desc_size, sg_desc_size); if (err) { IONIC_PRINT(ERR, "Queue initialization failed"); return err; @@ -537,8 +683,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type, ionic_q_sg_map(&new->q, sg_base, sg_base_pa); } - IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju " - "SG-base-PA = %ju", + IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx " + "SG-base-PA = %#jx", q_base_pa, cq_base_pa, sg_base_pa); ionic_q_map(&new->q, q_base, q_base_pa); @@ -587,7 +733,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs, sizeof(struct ionic_rxq_desc), sizeof(struct ionic_rxq_comp), sizeof(struct ionic_rxq_sg_desc), - lif->kern_pid, &lif->rxqcqs[index]); + &lif->rxqcqs[index]); if (err) return err; @@ -609,7 +755,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs, sizeof(struct ionic_txq_desc), sizeof(struct ionic_txq_comp), sizeof(struct ionic_txq_sg_desc), - lif->kern_pid, &lif->txqcqs[index]); + &lif->txqcqs[index]); if (err) return err; @@ -630,7 +776,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif) sizeof(struct ionic_admin_cmd), sizeof(struct ionic_admin_comp), 0, - lif->kern_pid, &lif->adminqcq); + &lif->adminqcq); if (err) return err; @@ -651,7 +797,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif) sizeof(struct ionic_notifyq_cmd), sizeof(union ionic_notifyq_comp), 0, - lif->kern_pid, &lif->notifyqcq); + &lif->notifyqcq); if (err) return err; @@ -674,21 +820,22 @@ ionic_lif_alloc(struct ionic_lif *lif) { struct ionic_adapter *adapter = lif->adapter; uint32_t socket_id = rte_socket_id(); - int dbpage_num; int err; - snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index); + /* + * lif->name was zeroed on allocation. + * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated. + */ + memcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1); + + IONIC_PRINT(DEBUG, "LIF: %s", lif->name); IONIC_PRINT(DEBUG, "Allocating Lif Info"); rte_spinlock_init(&lif->adminq_lock); rte_spinlock_init(&lif->adminq_service_lock); - lif->kern_pid = 0; - - dbpage_num = ionic_db_page_num(lif, 0); - - lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num); + lif->kern_dbpage = ionic_bus_map_dbpage(adapter, 0); if (!lif->kern_dbpage) { IONIC_PRINT(ERR, "Cannot map dbpage, aborting"); return -ENOMEM; @@ -720,8 +867,6 @@ ionic_lif_alloc(struct ionic_lif *lif) IONIC_PRINT(DEBUG, "Allocating Admin Queue"); - IONIC_PRINT(DEBUG, "Allocating Admin Queue"); - err = ionic_admin_qcq_alloc(lif); if (err) { IONIC_PRINT(ERR, "Cannot allocate admin queue"); @@ -775,6 +920,111 @@ ionic_lif_free(struct ionic_lif *lif) } } +void +ionic_lif_free_queues(struct ionic_lif *lif) +{ + uint32_t i; + + for (i = 0; i < lif->ntxqcqs; i++) { + ionic_dev_tx_queue_release(lif->eth_dev->data->tx_queues[i]); + lif->eth_dev->data->tx_queues[i] = NULL; + } + for (i = 0; i < lif->nrxqcqs; i++) { + ionic_dev_rx_queue_release(lif->eth_dev->data->rx_queues[i]); + lif->eth_dev->data->rx_queues[i] = NULL; + } +} + +int +ionic_lif_rss_config(struct ionic_lif *lif, + const uint16_t types, const uint8_t *key, const uint32_t *indir) +{ + struct ionic_admin_ctx ctx = { + .pending_work = true, + .cmd.lif_setattr = { + .opcode = IONIC_CMD_LIF_SETATTR, + .attr = IONIC_LIF_ATTR_RSS, + .rss.types = types, + .rss.addr = lif->rss_ind_tbl_pa, + }, + }; + unsigned int i; + + IONIC_PRINT_CALL(); + + lif->rss_types = types; + + if (key) + memcpy(lif->rss_hash_key, key, IONIC_RSS_HASH_KEY_SIZE); + + if (indir) + for (i = 0; i < lif->adapter->ident.lif.eth.rss_ind_tbl_sz; i++) + lif->rss_ind_tbl[i] = indir[i]; + + memcpy(ctx.cmd.lif_setattr.rss.key, lif->rss_hash_key, + IONIC_RSS_HASH_KEY_SIZE); + + return ionic_adminq_post_wait(lif, &ctx); +} + +static int +ionic_lif_rss_setup(struct ionic_lif *lif) +{ + static const uint8_t toeplitz_symmetric_key[] = { + 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, + 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, + 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, + 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, + 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, + }; + uint32_t i; + uint16_t tbl_sz = lif->adapter->ident.lif.eth.rss_ind_tbl_sz; + + IONIC_PRINT_CALL(); + + if (!lif->rss_ind_tbl_z) { + lif->rss_ind_tbl_z = rte_eth_dma_zone_reserve(lif->eth_dev, + "rss_ind_tbl", 0 /* queue_idx */, + sizeof(*lif->rss_ind_tbl) * tbl_sz, + IONIC_ALIGN, rte_socket_id()); + if (!lif->rss_ind_tbl_z) { + IONIC_PRINT(ERR, "OOM"); + return -ENOMEM; + } + + lif->rss_ind_tbl = lif->rss_ind_tbl_z->addr; + lif->rss_ind_tbl_pa = lif->rss_ind_tbl_z->iova; + } + + if (lif->rss_ind_tbl_nrxqcqs != lif->nrxqcqs) { + lif->rss_ind_tbl_nrxqcqs = lif->nrxqcqs; + + /* Fill indirection table with 'default' values */ + for (i = 0; i < tbl_sz; i++) + lif->rss_ind_tbl[i] = i % lif->nrxqcqs; + } + + return ionic_lif_rss_config(lif, IONIC_RSS_OFFLOAD_ALL, + toeplitz_symmetric_key, NULL); +} + +static void +ionic_lif_rss_teardown(struct ionic_lif *lif) +{ + if (!lif->rss_ind_tbl) + return; + + if (lif->rss_ind_tbl_z) { + /* Disable RSS on the NIC */ + ionic_lif_rss_config(lif, 0x0, NULL, NULL); + + lif->rss_ind_tbl = NULL; + lif->rss_ind_tbl_pa = 0; + rte_memzone_free(lif->rss_ind_tbl_z); + lif->rss_ind_tbl_z = NULL; + } +} + static void ionic_lif_qcq_deinit(struct ionic_lif *lif, struct ionic_qcq *qcq) { @@ -848,14 +1098,32 @@ ionic_link_status_check(struct ionic_lif *lif) return; if (link_up) { - IONIC_PRINT(DEBUG, "Link up - %d Gbps", - lif->info->status.link_speed); adapter->link_speed = lif->info->status.link_speed; + IONIC_PRINT(DEBUG, "Link up - %d Gbps", + adapter->link_speed); } else { IONIC_PRINT(DEBUG, "Link down"); } adapter->link_up = link_up; + ionic_dev_link_update(lif->eth_dev, 0); +} + +static void +ionic_lif_handle_fw_down(struct ionic_lif *lif) +{ + if (lif->state & IONIC_LIF_F_FW_RESET) + return; + + lif->state |= IONIC_LIF_F_FW_RESET; + + if (lif->state & IONIC_LIF_F_UP) { + IONIC_PRINT(NOTICE, + "Surprise FW stop, stopping %s\n", lif->name); + ionic_lif_stop(lif); + } + + IONIC_PRINT(NOTICE, "FW down, %s stopped", lif->name); } static bool @@ -877,14 +1145,27 @@ ionic_notifyq_cb(struct ionic_cq *cq, uint32_t cq_desc_index, void *cb_arg) switch (cq_desc->event.ecode) { case IONIC_EVENT_LINK_CHANGE: IONIC_PRINT(DEBUG, - "Notifyq IONIC_EVENT_LINK_CHANGE eid=%jd link_status=%d link_speed=%d", + "Notifyq IONIC_EVENT_LINK_CHANGE %s " + "eid=%jd link_status=%d link_speed=%d", + lif->name, cq_desc->event.eid, cq_desc->link_change.link_status, cq_desc->link_change.link_speed); lif->state |= IONIC_LIF_F_LINK_CHECK_NEEDED; + break; + case IONIC_EVENT_RESET: + IONIC_PRINT(NOTICE, + "Notifyq IONIC_EVENT_RESET %s " + "eid=%jd, reset_code=%d state=%d", + lif->name, + cq_desc->event.eid, + cq_desc->reset.reset_code, + cq_desc->reset.state); + ionic_lif_handle_fw_down(lif); break; + default: IONIC_PRINT(WARNING, "Notifyq bad event ecode=%d eid=%jd", cq_desc->event.ecode, cq_desc->event.eid); @@ -932,7 +1213,7 @@ ionic_lif_adminq_init(struct ionic_lif *lif) struct ionic_q_init_comp comp; int err; - ionic_dev_cmd_adminq_init(idev, qcq, lif->index, qcq->intr.index); + ionic_dev_cmd_adminq_init(idev, qcq, qcq->intr.index); err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); if (err) return err; @@ -968,24 +1249,22 @@ ionic_lif_notifyq_init(struct ionic_lif *lif) .pending_work = true, .cmd.q_init = { .opcode = IONIC_CMD_Q_INIT, - .lif_index = lif->index, .type = q->type, .index = q->index, .flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA), .intr_index = qcq->intr.index, - .pid = q->pid, .ring_size = rte_log2_u32(q->num_descs), .ring_base = q->base_pa, } }; - IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid); IONIC_PRINT(DEBUG, "notifyq_init.index %d", ctx.cmd.q_init.index); IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "", ctx.cmd.q_init.ring_base); IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(lif, &ctx); if (err) @@ -1015,7 +1294,6 @@ ionic_lif_set_features(struct ionic_lif *lif) .pending_work = true, .cmd.lif_setattr = { .opcode = IONIC_CMD_LIF_SETATTR, - .index = lif->index, .attr = IONIC_LIF_ATTR_FEATURES, .features = lif->features, }, @@ -1077,12 +1355,10 @@ ionic_lif_txq_init(struct ionic_qcq *qcq) .pending_work = true, .cmd.q_init = { .opcode = IONIC_CMD_Q_INIT, - .lif_index = lif->index, .type = q->type, .index = q->index, .flags = IONIC_QINIT_F_SG, .intr_index = cq->bound_intr->index, - .pid = q->pid, .ring_size = rte_log2_u32(q->num_descs), .ring_base = q->base_pa, .cq_ring_base = cq->base_pa, @@ -1091,12 +1367,12 @@ ionic_lif_txq_init(struct ionic_qcq *qcq) }; int err; - IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid); IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index); IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "", ctx.cmd.q_init.ring_base); IONIC_PRINT(DEBUG, "txq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(qcq->lif, &ctx); if (err) @@ -1125,12 +1401,10 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq) .pending_work = true, .cmd.q_init = { .opcode = IONIC_CMD_Q_INIT, - .lif_index = lif->index, .type = q->type, .index = q->index, .flags = IONIC_QINIT_F_SG, .intr_index = cq->bound_intr->index, - .pid = q->pid, .ring_size = rte_log2_u32(q->num_descs), .ring_base = q->base_pa, .cq_ring_base = cq->base_pa, @@ -1139,12 +1413,12 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq) }; int err; - IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid); IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index); IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "", ctx.cmd.q_init.ring_base); IONIC_PRINT(DEBUG, "rxq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(qcq->lif, &ctx); if (err) @@ -1170,7 +1444,6 @@ ionic_station_set(struct ionic_lif *lif) .pending_work = true, .cmd.lif_getattr = { .opcode = IONIC_CMD_LIF_GETATTR, - .index = lif->index, .attr = IONIC_LIF_ATTR_MAC, }, }; @@ -1210,13 +1483,12 @@ ionic_lif_set_name(struct ionic_lif *lif) .pending_work = true, .cmd.lif_setattr = { .opcode = IONIC_CMD_LIF_SETATTR, - .index = lif->index, .attr = IONIC_LIF_ATTR_NAME, }, }; - snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name), - "%d", lif->port_id); + memcpy(ctx.cmd.lif_setattr.name, lif->name, + sizeof(ctx.cmd.lif_setattr.name) - 1); ionic_adminq_post_wait(lif, &ctx); } @@ -1228,7 +1500,9 @@ ionic_lif_init(struct ionic_lif *lif) struct ionic_q_init_comp comp; int err; - ionic_dev_cmd_lif_init(idev, lif->index, lif->info_pa); + memset(&lif->stats_base, 0, sizeof(lif->stats_base)); + + ionic_dev_cmd_lif_init(idev, lif->info_pa); err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); ionic_dev_cmd_comp(idev, &comp); if (err) @@ -1251,6 +1525,7 @@ ionic_lif_init(struct ionic_lif *lif) | IONIC_ETH_HW_RX_HASH | IONIC_ETH_HW_TX_SG | IONIC_ETH_HW_RX_SG + | IONIC_ETH_HW_TX_CSUM | IONIC_ETH_HW_RX_CSUM | IONIC_ETH_HW_TSO | IONIC_ETH_HW_TSO_IPV6 @@ -1293,6 +1568,7 @@ ionic_lif_deinit(struct ionic_lif *lif) return; ionic_rx_filters_deinit(lif); + ionic_lif_rss_teardown(lif); ionic_lif_qcq_deinit(lif, lif->notifyqcq); ionic_lif_qcq_deinit(lif, lif->adminqcq); @@ -1302,10 +1578,27 @@ ionic_lif_deinit(struct ionic_lif *lif) int ionic_lif_configure(struct ionic_lif *lif) { + struct ionic_identity *ident = &lif->adapter->ident; + uint32_t ntxqs_per_lif = + ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ]; + uint32_t nrxqs_per_lif = + ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]; + uint32_t nrxqs = lif->eth_dev->data->nb_rx_queues; + uint32_t ntxqs = lif->eth_dev->data->nb_tx_queues; + lif->port_id = lif->eth_dev->data->port_id; - lif->nrxqcqs = 1; - lif->ntxqcqs = 1; + IONIC_PRINT(DEBUG, "Configuring LIF on port %u", + lif->port_id); + + if (nrxqs > 0) + nrxqs_per_lif = RTE_MIN(nrxqs_per_lif, nrxqs); + + if (ntxqs > 0) + ntxqs_per_lif = RTE_MIN(ntxqs_per_lif, ntxqs); + + lif->nrxqcqs = nrxqs_per_lif; + lif->ntxqcqs = ntxqs_per_lif; return 0; } @@ -1313,20 +1606,24 @@ ionic_lif_configure(struct ionic_lif *lif) int ionic_lif_start(struct ionic_lif *lif) { - uint32_t rx_mode = 0; + uint32_t rx_mode; uint32_t i; int err; - IONIC_PRINT(DEBUG, "Setting RX mode on port %u", - lif->port_id); + err = ionic_lif_rss_setup(lif); + if (err) + return err; - rx_mode |= IONIC_RX_MODE_F_UNICAST; - rx_mode |= IONIC_RX_MODE_F_MULTICAST; - rx_mode |= IONIC_RX_MODE_F_BROADCAST; + if (!lif->rx_mode) { + IONIC_PRINT(DEBUG, "Setting RX mode on %s", + lif->name); - lif->rx_mode = 0; /* set by ionic_set_rx_mode */ + rx_mode = IONIC_RX_MODE_F_UNICAST; + rx_mode |= IONIC_RX_MODE_F_MULTICAST; + rx_mode |= IONIC_RX_MODE_F_BROADCAST; - ionic_set_rx_mode(lif, rx_mode); + ionic_set_rx_mode(lif, rx_mode); + } IONIC_PRINT(DEBUG, "Starting %u RX queues and %u TX queues " "on port %u", @@ -1334,7 +1631,7 @@ ionic_lif_start(struct ionic_lif *lif) for (i = 0; i < lif->nrxqcqs; i++) { struct ionic_qcq *rxq = lif->rxqcqs[i]; - if (!rxq->deferred_start) { + if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) { err = ionic_dev_rx_queue_start(lif->eth_dev, i); if (err) @@ -1344,7 +1641,7 @@ ionic_lif_start(struct ionic_lif *lif) for (i = 0; i < lif->ntxqcqs; i++) { struct ionic_qcq *txq = lif->txqcqs[i]; - if (!txq->deferred_start) { + if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) { err = ionic_dev_tx_queue_start(lif->eth_dev, i); if (err) @@ -1352,9 +1649,10 @@ ionic_lif_start(struct ionic_lif *lif) } } - ionic_link_status_check(lif); - /* Carrier ON here */ + lif->state |= IONIC_LIF_F_UP; + + ionic_link_status_check(lif); return 0; } @@ -1408,7 +1706,6 @@ int ionic_lifs_size(struct ionic_adapter *adapter) { struct ionic_identity *ident = &adapter->ident; - uint32_t nlifs = ident->dev.nlifs; uint32_t nintrs, dev_nintrs = ident->dev.nintrs; adapter->max_ntxqs_per_lif = @@ -1416,10 +1713,11 @@ ionic_lifs_size(struct ionic_adapter *adapter) adapter->max_nrxqs_per_lif = ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]; - nintrs = nlifs * 1 /* notifyq */; + nintrs = 1 /* notifyq */; if (nintrs > dev_nintrs) { - IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u", + IONIC_PRINT(ERR, + "At most %d intr supported, minimum req'd is %u", dev_nintrs, nintrs); return -ENOSPC; }