X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Flinux%2Fmlx5_os.c;h=0dcf5000e91e2fce1da5f5911a2117255d6338e3;hb=ff4e52efb39517f75eccba261c87b48cb464b246;hp=4db5d339d4ce5d67502e7ee7b3c6c4a8677ee702;hpb=e69a59227db0f2dd6ccc9f618d0ff7e6f0dd03aa;p=dpdk.git diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 4db5d339d4..0dcf5000e9 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -16,10 +16,11 @@ #include #include -#include -#include +#include +#include #include #include +#include #include #include #include @@ -40,6 +41,8 @@ #include "mlx5_common_os.h" #include "mlx5_utils.h" #include "mlx5_rxtx.h" +#include "mlx5_rx.h" +#include "mlx5_tx.h" #include "mlx5_autoconf.h" #include "mlx5_mr.h" #include "mlx5_flow.h" @@ -48,8 +51,6 @@ #include "mlx5_nl.h" #include "mlx5_devx.h" -#define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 - #ifndef HAVE_IBV_MLX5_MOD_MPW #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) @@ -67,6 +68,44 @@ static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; /* Process local data for secondary processes. */ static struct mlx5_local_data mlx5_local_data; +/* rte flow indexed pool configuration. */ +static struct mlx5_indexed_pool_config icfg[] = { + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 0, + .type = "ctl_flow_ipool", + }, + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .grow_trunk = 3, + .grow_shift = 2, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 1 << 14, + .type = "rte_flow_ipool", + }, + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .grow_trunk = 3, + .grow_shift = 2, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 0, + .type = "mcp_flow_ipool", + }, +}; + /** * Set the completion channel file descriptor interrupt as non-blocking. * @@ -116,7 +155,12 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; device_attr->max_sge = attr_ex.orig_attr.max_sge; device_attr->max_cq = attr_ex.orig_attr.max_cq; + device_attr->max_cqe = attr_ex.orig_attr.max_cqe; + device_attr->max_mr = attr_ex.orig_attr.max_mr; + device_attr->max_pd = attr_ex.orig_attr.max_pd; device_attr->max_qp = attr_ex.orig_attr.max_qp; + device_attr->max_srq = attr_ex.orig_attr.max_srq; + device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr; device_attr->raw_packet_caps = attr_ex.raw_packet_caps; device_attr->max_rwq_indirection_table_size = attr_ex.rss_caps.max_rwq_indirection_table_size; @@ -147,6 +191,8 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; #endif + strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver, + sizeof(device_attr->fw_ver)); return err; } @@ -168,9 +214,8 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) static void * mlx5_alloc_verbs_buf(size_t size, void *data) { - struct mlx5_priv *priv = data; + struct mlx5_dev_ctx_shared *sh = data; void *ret; - unsigned int socket = SOCKET_ID_ANY; size_t alignment = rte_mem_page_size(); if (alignment == (size_t)-1) { DRV_LOG(ERR, "Failed to get mem page size"); @@ -178,23 +223,86 @@ mlx5_alloc_verbs_buf(size_t size, void *data) return NULL; } - if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { - const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; - - socket = ctrl->socket; - } else if (priv->verbs_alloc_ctx.type == - MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { - const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; - - socket = ctrl->socket; - } MLX5_ASSERT(data != NULL); - ret = mlx5_malloc(0, size, alignment, socket); + ret = mlx5_malloc(0, size, alignment, sh->numa_node); if (!ret && size) rte_errno = ENOMEM; return ret; } +/** + * Detect misc5 support or not + * + * @param[in] priv + * Device private data pointer + */ +#ifdef HAVE_MLX5DV_DR +static void +__mlx5_discovery_misc5_cap(struct mlx5_priv *priv) +{ +#ifdef HAVE_IBV_FLOW_DV_SUPPORT + /* Dummy VxLAN matcher to detect rdma-core misc5 cap + * Case: IPv4--->UDP--->VxLAN--->vni + */ + void *tbl; + struct mlx5_flow_dv_match_params matcher_mask; + void *match_m; + void *matcher; + void *headers_m; + void *misc5_m; + uint32_t *tunnel_header_m; + struct mlx5dv_flow_matcher_attr dv_attr; + + memset(&matcher_mask, 0, sizeof(matcher_mask)); + matcher_mask.size = sizeof(matcher_mask.buf); + match_m = matcher_mask.buf; + headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); + misc5_m = MLX5_ADDR_OF(fte_match_param, + match_m, misc_parameters_5); + tunnel_header_m = (uint32_t *) + MLX5_ADDR_OF(fte_match_set_misc5, + misc5_m, tunnel_header_1); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); + *tunnel_header_m = 0xffffff; + + tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); + if (!tbl) { + DRV_LOG(INFO, "No SW steering support"); + return; + } + dv_attr.type = IBV_FLOW_ATTR_NORMAL, + dv_attr.match_mask = (void *)&matcher_mask, + dv_attr.match_criteria_enable = + (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | + (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); + dv_attr.priority = 3; +#ifdef HAVE_MLX5DV_DR_ESWITCH + void *misc2_m; + if (priv->config.dv_esw_en) { + /* FDB enabled reg_c_0 */ + dv_attr.match_criteria_enable |= + (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); + misc2_m = MLX5_ADDR_OF(fte_match_param, + match_m, misc_parameters_2); + MLX5_SET(fte_match_set_misc2, misc2_m, + metadata_reg_c_0, 0xffff); + } +#endif + matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx, + &dv_attr, tbl); + if (matcher) { + priv->sh->misc5_cap = 1; + mlx5_glue->dv_destroy_flow_matcher(matcher); + } + mlx5_glue->dr_destroy_flow_tbl(tbl); +#else + RTE_SET_USED(priv); +#endif +} +#endif + /** * Verbs callback to free a memory. * @@ -225,7 +333,7 @@ static int mlx5_alloc_shared_dr(struct mlx5_priv *priv) { struct mlx5_dev_ctx_shared *sh = priv->sh; - char s[MLX5_HLIST_NAMESIZE]; + char s[MLX5_NAME_SIZE] __rte_unused; int err; MLX5_ASSERT(sh && sh->refcnt); @@ -233,33 +341,50 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) return 0; err = mlx5_alloc_table_hash_list(priv); if (err) - return err; - /* Create tags hash list table. */ - snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); - sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0, - 0, NULL, NULL, NULL); - if (!sh->tag_table) { - DRV_LOG(ERR, "tags with hash creation failed."); - err = ENOMEM; goto error; - } - snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); - sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ, - 0, 0, NULL, NULL, NULL); - if (!sh->modify_cmds) { - DRV_LOG(ERR, "hdr modify hash creation failed"); - err = ENOMEM; + /* The resources below are only valid with DV support. */ +#ifdef HAVE_IBV_FLOW_DV_SUPPORT + /* Init port id action list. */ + snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); + sh->port_id_action_list = mlx5_list_create(s, sh, true, + flow_dv_port_id_create_cb, + flow_dv_port_id_match_cb, + flow_dv_port_id_remove_cb, + flow_dv_port_id_clone_cb, + flow_dv_port_id_clone_free_cb); + if (!sh->port_id_action_list) goto error; - } - snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); - sh->encaps_decaps = mlx5_hlist_create(s, - MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ, - 0, 0, NULL, NULL, NULL); - if (!sh->encaps_decaps) { - DRV_LOG(ERR, "encap decap hash creation failed"); - err = ENOMEM; + /* Init push vlan action list. */ + snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); + sh->push_vlan_action_list = mlx5_list_create(s, sh, true, + flow_dv_push_vlan_create_cb, + flow_dv_push_vlan_match_cb, + flow_dv_push_vlan_remove_cb, + flow_dv_push_vlan_clone_cb, + flow_dv_push_vlan_clone_free_cb); + if (!sh->push_vlan_action_list) goto error; - } + /* Init sample action list. */ + snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); + sh->sample_action_list = mlx5_list_create(s, sh, true, + flow_dv_sample_create_cb, + flow_dv_sample_match_cb, + flow_dv_sample_remove_cb, + flow_dv_sample_clone_cb, + flow_dv_sample_clone_free_cb); + if (!sh->sample_action_list) + goto error; + /* Init dest array action list. */ + snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); + sh->dest_array_list = mlx5_list_create(s, sh, true, + flow_dv_dest_array_create_cb, + flow_dv_dest_array_match_cb, + flow_dv_dest_array_remove_cb, + flow_dv_dest_array_clone_cb, + flow_dv_dest_array_clone_free_cb); + if (!sh->dest_array_list) + goto error; +#endif #ifdef HAVE_MLX5DV_DR void *domain; @@ -279,7 +404,6 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) err = errno; goto error; } - pthread_mutex_init(&sh->dv_mutex, NULL); sh->tx_domain = domain; #ifdef HAVE_MLX5DV_DR_ESWITCH if (priv->config.dv_esw_en) { @@ -291,10 +415,20 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) goto error; } sh->fdb_domain = domain; - sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); + } + /* + * The drop action is just some dummy placeholder in rdma-core. It + * does not belong to domains and has no any attributes, and, can be + * shared by the entire device. + */ + sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); + if (!sh->dr_drop_action) { + DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); + err = errno; + goto error; } #endif - if (!sh->tunnel_hub) + if (!sh->tunnel_hub && priv->config.dv_miss_info) err = mlx5_alloc_tunnel_hub(sh); if (err) { DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); @@ -307,6 +441,17 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); } sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); + if (!priv->config.allow_duplicate_pattern) { +#ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE + DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); +#endif + mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); + mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); + if (sh->fdb_domain) + mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); + } + + __mlx5_discovery_misc5_cap(priv); #endif /* HAVE_MLX5DV_DR */ sh->default_miss_action = mlx5_glue->dr_create_flow_action_default_miss(); @@ -327,9 +472,9 @@ error: mlx5_glue->dr_destroy_domain(sh->fdb_domain); sh->fdb_domain = NULL; } - if (sh->esw_drop_action) { - mlx5_glue->destroy_flow_action(sh->esw_drop_action); - sh->esw_drop_action = NULL; + if (sh->dr_drop_action) { + mlx5_glue->destroy_flow_action(sh->dr_drop_action); + sh->dr_drop_action = NULL; } if (sh->pop_vlan_action) { mlx5_glue->destroy_flow_action(sh->pop_vlan_action); @@ -353,6 +498,22 @@ error: sh->tunnel_hub = NULL; } mlx5_free_table_hash_list(priv); + if (sh->port_id_action_list) { + mlx5_list_destroy(sh->port_id_action_list); + sh->port_id_action_list = NULL; + } + if (sh->push_vlan_action_list) { + mlx5_list_destroy(sh->push_vlan_action_list); + sh->push_vlan_action_list = NULL; + } + if (sh->sample_action_list) { + mlx5_list_destroy(sh->sample_action_list); + sh->sample_action_list = NULL; + } + if (sh->dest_array_list) { + mlx5_list_destroy(sh->dest_array_list); + sh->dest_array_list = NULL; + } return err; } @@ -384,16 +545,15 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv) mlx5_glue->dr_destroy_domain(sh->fdb_domain); sh->fdb_domain = NULL; } - if (sh->esw_drop_action) { - mlx5_glue->destroy_flow_action(sh->esw_drop_action); - sh->esw_drop_action = NULL; + if (sh->dr_drop_action) { + mlx5_glue->destroy_flow_action(sh->dr_drop_action); + sh->dr_drop_action = NULL; } #endif if (sh->pop_vlan_action) { mlx5_glue->destroy_flow_action(sh->pop_vlan_action); sh->pop_vlan_action = NULL; } - pthread_mutex_destroy(&sh->dv_mutex); #endif /* HAVE_MLX5DV_DR */ if (sh->default_miss_action) mlx5_glue->destroy_flow_action @@ -416,6 +576,22 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv) sh->tunnel_hub = NULL; } mlx5_free_table_hash_list(priv); + if (sh->port_id_action_list) { + mlx5_list_destroy(sh->port_id_action_list); + sh->port_id_action_list = NULL; + } + if (sh->push_vlan_action_list) { + mlx5_list_destroy(sh->push_vlan_action_list); + sh->push_vlan_action_list = NULL; + } + if (sh->sample_action_list) { + mlx5_list_destroy(sh->sample_action_list); + sh->sample_action_list = NULL; + } + if (sh->dest_array_list) { + mlx5_list_destroy(sh->dest_array_list); + sh->dest_array_list = NULL; + } } /** @@ -610,6 +786,149 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) #endif } +/** + * DR flow drop action support detect. + * + * @param dev + * Pointer to rte_eth_dev structure. + * + */ +static void +mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) +{ +#ifdef HAVE_MLX5DV_DR + struct mlx5_priv *priv = dev->data->dev_private; + + if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action) + return; + /** + * DR supports drop action placeholder when it is supported; + * otherwise, use the queue drop action. + */ + if (mlx5_flow_discover_dr_action_support(dev)) + priv->root_drop_action = priv->drop_queue.hrxq->action; + else + priv->root_drop_action = priv->sh->dr_drop_action; +#endif +} + +static void +mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + void *ctx = priv->sh->ctx; + + priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); + if (!priv->q_counters) { + struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); + struct ibv_wq *wq; + + DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " + "by DevX - fall-back to use the kernel driver global " + "queue counter.", dev->data->port_id); + /* Create WQ by kernel and query its queue counter ID. */ + if (cq) { + wq = mlx5_glue->create_wq(ctx, + &(struct ibv_wq_init_attr){ + .wq_type = IBV_WQT_RQ, + .max_wr = 1, + .max_sge = 1, + .pd = priv->sh->pd, + .cq = cq, + }); + if (wq) { + /* Counter is assigned only on RDY state. */ + int ret = mlx5_glue->modify_wq(wq, + &(struct ibv_wq_attr){ + .attr_mask = IBV_WQ_ATTR_STATE, + .wq_state = IBV_WQS_RDY, + }); + + if (ret == 0) + mlx5_devx_cmd_wq_query(wq, + &priv->counter_set_id); + claim_zero(mlx5_glue->destroy_wq(wq)); + } + claim_zero(mlx5_glue->destroy_cq(cq)); + } + } else { + priv->counter_set_id = priv->q_counters->id; + } + if (priv->counter_set_id == 0) + DRV_LOG(INFO, "Part of the port %d statistics will not be " + "available.", dev->data->port_id); +} + +/** + * Check if representor spawn info match devargs. + * + * @param spawn + * Verbs device parameters (name, port, switch_info) to spawn. + * @param eth_da + * Device devargs to probe. + * + * @return + * Match result. + */ +static bool +mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, + struct rte_eth_devargs *eth_da) +{ + struct mlx5_switch_info *switch_info = &spawn->info; + unsigned int p, f; + uint16_t id; + uint16_t repr_id = mlx5_representor_id_encode(switch_info, + eth_da->type); + + switch (eth_da->type) { + case RTE_ETH_REPRESENTOR_SF: + if (!(spawn->info.port_name == -1 && + switch_info->name_type == + MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && + switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { + rte_errno = EBUSY; + return false; + } + break; + case RTE_ETH_REPRESENTOR_VF: + /* Allows HPF representor index -1 as exception. */ + if (!(spawn->info.port_name == -1 && + switch_info->name_type == + MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && + switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { + rte_errno = EBUSY; + return false; + } + break; + case RTE_ETH_REPRESENTOR_NONE: + rte_errno = EBUSY; + return false; + default: + rte_errno = ENOTSUP; + DRV_LOG(ERR, "unsupported representor type"); + return false; + } + /* Check representor ID: */ + for (p = 0; p < eth_da->nb_ports; ++p) { + if (spawn->pf_bond < 0) { + /* For non-LAG mode, allow and ignore pf. */ + switch_info->pf_num = eth_da->ports[p]; + repr_id = mlx5_representor_id_encode(switch_info, + eth_da->type); + } + for (f = 0; f < eth_da->nb_representor_ports; ++f) { + id = MLX5_REPRESENTOR_ID + (eth_da->ports[p], eth_da->type, + eth_da->representor_ports[f]); + if (repr_id == id) + return true; + } + } + rte_errno = EBUSY; + return false; +} + + /** * Spawn an Ethernet device from Verbs information. * @@ -619,6 +938,8 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) * Verbs device parameters (name, port, switch_info) to spawn. * @param config * Device configuration parameters. + * @param config + * Device arguments. * * @return * A valid Ethernet device object on success, NULL otherwise and rte_errno @@ -630,7 +951,8 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) static struct rte_eth_dev * mlx5_dev_spawn(struct rte_device *dpdk_dev, struct mlx5_dev_spawn_data *spawn, - struct mlx5_dev_config *config) + struct mlx5_dev_config *config, + struct rte_eth_devargs *eth_da) { const struct mlx5_switch_info *switch_info = &spawn->info; struct mlx5_dev_ctx_shared *sh = NULL; @@ -641,8 +963,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, int err = 0; unsigned int hw_padding = 0; unsigned int mps; - unsigned int cqe_comp; - unsigned int cqe_pad = 0; unsigned int tunnel_en = 0; unsigned int mpls_en = 0; unsigned int swp = 0; @@ -655,51 +975,43 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, char name[RTE_ETH_NAME_MAX_LEN]; int own_domain_id = 0; uint16_t port_id; - unsigned int i; -#ifdef HAVE_MLX5DV_DR_DEVX_PORT - struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; -#endif + struct mlx5_port_info vport_info = { .query_flags = 0 }; + int i; /* Determine if this port representor is supposed to be spawned. */ - if (switch_info->representor && dpdk_dev->devargs) { - struct rte_eth_devargs eth_da; - - err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); - if (err) { - rte_errno = -err; - DRV_LOG(ERR, "failed to process device arguments: %s", - strerror(rte_errno)); - return NULL; - } - for (i = 0; i < eth_da.nb_representor_ports; ++i) - if (eth_da.representor_ports[i] == - (uint16_t)switch_info->port_name) - break; - if (i == eth_da.nb_representor_ports) { - rte_errno = EBUSY; - return NULL; - } - } + if (switch_info->representor && dpdk_dev->devargs && + !mlx5_representor_match(spawn, eth_da)) + return NULL; /* Build device name. */ - if (spawn->pf_bond < 0) { + if (spawn->pf_bond < 0) { /* Single device. */ if (!switch_info->representor) strlcpy(name, dpdk_dev->name, sizeof(name)); else - snprintf(name, sizeof(name), "%s_representor_%u", - dpdk_dev->name, switch_info->port_name); + err = snprintf(name, sizeof(name), "%s_representor_%s%u", + dpdk_dev->name, + switch_info->name_type == + MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", + switch_info->port_name); } else { /* Bonding device. */ - if (!switch_info->representor) - snprintf(name, sizeof(name), "%s_%s", + if (!switch_info->representor) { + err = snprintf(name, sizeof(name), "%s_%s", dpdk_dev->name, mlx5_os_get_dev_device_name(spawn->phys_dev)); - else - snprintf(name, sizeof(name), "%s_%s_representor_%u", - dpdk_dev->name, - mlx5_os_get_dev_device_name(spawn->phys_dev), - switch_info->port_name); + } else { + err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", + dpdk_dev->name, + mlx5_os_get_dev_device_name(spawn->phys_dev), + switch_info->ctrl_num, + switch_info->pf_num, + switch_info->name_type == + MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", + switch_info->port_name); + } } + if (err >= (int)sizeof(name)) + DRV_LOG(WARNING, "device name overflow %s", name); /* check if the device is already spawned */ if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { rte_errno = EEXIST; @@ -716,14 +1028,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, return NULL; } eth_dev->device = dpdk_dev; - eth_dev->dev_ops = &mlx5_os_dev_sec_ops; + eth_dev->dev_ops = &mlx5_dev_sec_ops; eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; err = mlx5_proc_priv_init(eth_dev); if (err) return NULL; - mp_id.port_id = eth_dev->data->port_id; - strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); + mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); /* Receive command fd from primary process */ err = mlx5_mp_req_verbs_cmd_fd(&mp_id); if (err < 0) @@ -828,17 +1139,8 @@ err_secondary: mprq_caps.max_single_wqe_log_num_of_strides; } #endif - if (RTE_CACHE_LINE_SIZE == 128 && - !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) - cqe_comp = 0; - else - cqe_comp = 1; - config->cqe_comp = cqe_comp; -#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD - /* Whether device supports 128B Rx CQE padding. */ - cqe_pad = RTE_CACHE_LINE_SIZE == 128 && - (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); -#endif + /* Rx CQE compression is enabled by default. */ + config->cqe_comp = 1; #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { tunnel_en = ((dv_attr.tunnel_offloads_caps & @@ -895,8 +1197,6 @@ err_secondary: priv->dev_port = spawn->phys_port; priv->pci_dev = spawn->pci_dev; priv->mtu = RTE_ETHER_MTU; - priv->mp_id.port_id = port_id; - strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); /* Some internal functions rely on Netlink sockets, open them now. */ priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); @@ -906,29 +1206,34 @@ err_secondary: priv->vport_meta_tag = 0; priv->vport_meta_mask = 0; priv->pf_bond = spawn->pf_bond; -#ifdef HAVE_MLX5DV_DR_DEVX_PORT + + DRV_LOG(DEBUG, + "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", + priv->dev_port, dpdk_dev->bus->name, + priv->pci_dev ? priv->pci_dev->name : "NONE", + priv->master, priv->representor, priv->pf_bond); + /* - * The DevX port query API is implemented. E-Switch may use - * either vport or reg_c[0] metadata register to match on - * vport index. The engaged part of metadata register is - * defined by mask. + * If we have E-Switch we should determine the vport attributes. + * E-Switch may use either source vport field or reg_c[0] metadata + * register to match on vport index. The engaged part of metadata + * register is defined by mask. */ if (switch_info->representor || switch_info->master) { - devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | - MLX5DV_DEVX_PORT_MATCH_REG_C_0; - err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, - &devx_port); + err = mlx5_glue->devx_port_query(sh->ctx, + spawn->phys_port, + &vport_info); if (err) { DRV_LOG(WARNING, "can't query devx port %d on device %s", spawn->phys_port, mlx5_os_get_dev_device_name(spawn->phys_dev)); - devx_port.comp_mask = 0; + vport_info.query_flags = 0; } } - if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { - priv->vport_meta_tag = devx_port.reg_c_0.value; - priv->vport_meta_mask = devx_port.reg_c_0.mask; + if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { + priv->vport_meta_tag = vport_info.vport_meta_tag; + priv->vport_meta_mask = vport_info.vport_meta_mask; if (!priv->vport_meta_mask) { DRV_LOG(ERR, "vport zero mask for port %d" " on bonding device %s", @@ -948,9 +1253,10 @@ err_secondary: goto error; } } - if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { - priv->vport_id = devx_port.vport_num; - } else if (spawn->pf_bond >= 0) { + if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { + priv->vport_id = vport_info.vport_id; + } else if (spawn->pf_bond >= 0 && + (switch_info->representor || switch_info->master)) { DRV_LOG(ERR, "can't deduce vport index for port %d" " on bonding device %s", spawn->phys_port, @@ -958,33 +1264,28 @@ err_secondary: err = ENOTSUP; goto error; } else { - /* Suppose vport index in compatible way. */ + /* + * Suppose vport index in compatible way. Kernel/rdma_core + * support single E-Switch per PF configurations only and + * vport_id field contains the vport index for associated VF, + * which is deduced from representor port name. + * For example, let's have the IB device port 10, it has + * attached network device eth0, which has port name attribute + * pf0vf2, we can deduce the VF number as 2, and set vport index + * as 3 (2+1). This assigning schema should be changed if the + * multiple E-Switch instances per PF configurations or/and PCI + * subfunctions are added. + */ priv->vport_id = switch_info->representor ? switch_info->port_name + 1 : -1; } -#else - /* - * Kernel/rdma_core support single E-Switch per PF configurations - * only and vport_id field contains the vport index for - * associated VF, which is deduced from representor port name. - * For example, let's have the IB device port 10, it has - * attached network device eth0, which has port name attribute - * pf0vf2, we can deduce the VF number as 2, and set vport index - * as 3 (2+1). This assigning schema should be changed if the - * multiple E-Switch instances per PF configurations or/and PCI - * subfunctions are added. - */ - priv->vport_id = switch_info->representor ? - switch_info->port_name + 1 : -1; -#endif - /* representor_id field keeps the unmodified VF index. */ - priv->representor_id = switch_info->representor ? - switch_info->port_name : -1; + priv->representor_id = mlx5_representor_id_encode(switch_info, + eth_da->type); /* * Look for sibling devices in order to reuse their switch domain * if any, otherwise allocate one. */ - MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { + MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { const struct mlx5_priv *opriv = rte_eth_devices[port_id].data->dev_private; @@ -994,6 +1295,8 @@ err_secondary: RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) continue; priv->domain_id = opriv->domain_id; + DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", + priv->dev_port, priv->domain_id); break; } if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { @@ -1005,10 +1308,12 @@ err_secondary: goto error; } own_domain_id = 1; + DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", + priv->dev_port, priv->domain_id); } /* Override some values set by hardware configuration. */ mlx5_args(config, dpdk_dev->devargs); - err = mlx5_dev_check_sibling_config(priv, config); + err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev); if (err) goto error; config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & @@ -1025,6 +1330,12 @@ err_secondary: config->dv_flow_en = 0; } #endif + if (spawn->max_port > UINT8_MAX) { + /* Verbs can't support ports larger than 255 by design. */ + DRV_LOG(ERR, "can't support IB ports > UINT8_MAX"); + err = EINVAL; + goto error; + } config->ind_table_max_size = sh->device_attr.max_rwq_indirection_table_size; /* @@ -1071,16 +1382,6 @@ err_secondary: config->mps == MLX5_MPW_ENHANCED ? "enhanced " : config->mps == MLX5_MPW ? "legacy " : "", config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); - if (config->cqe_comp && !cqe_comp) { - DRV_LOG(WARNING, "Rx CQE compression isn't supported"); - config->cqe_comp = 0; - } - if (config->cqe_pad && !cqe_pad) { - DRV_LOG(WARNING, "Rx CQE padding isn't supported"); - config->cqe_pad = 0; - } else if (config->cqe_pad) { - DRV_LOG(INFO, "Rx CQE padding is enabled"); - } if (config->devx) { err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); if (err) { @@ -1088,10 +1389,20 @@ err_secondary: goto error; } /* Check relax ordering support. */ - if (config->hca_attr.relaxed_ordering_write && - config->hca_attr.relaxed_ordering_read && - !haswell_broadwell_cpu) - sh->cmng.relaxed_ordering = 1; + if (!haswell_broadwell_cpu) { + sh->cmng.relaxed_ordering_write = + config->hca_attr.relaxed_ordering_write; + sh->cmng.relaxed_ordering_read = + config->hca_attr.relaxed_ordering_read; + } else { + sh->cmng.relaxed_ordering_read = 0; + sh->cmng.relaxed_ordering_write = 0; + } + sh->rq_ts_format = config->hca_attr.rq_ts_format; + sh->sq_ts_format = config->hca_attr.sq_ts_format; + sh->steering_format_version = + config->hca_attr.steering_format_version; + sh->qp_ts_format = config->hca_attr.qp_ts_format; /* Check for LRO support. */ if (config->dest_tir && config->hca_attr.lro_cap && config->dv_flow_en) { @@ -1111,9 +1422,11 @@ err_secondary: "required for coalescing is %d bytes", config->hca_attr.lro_min_mss_size); } -#if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) +#if defined(HAVE_MLX5DV_DR) && \ + (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ + defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) if (config->hca_attr.qos.sup && - config->hca_attr.qos.srtcm_sup && + config->hca_attr.qos.flow_meter_old && config->dv_flow_en) { uint8_t reg_c_mask = config->hca_attr.qos.flow_meter_reg_c_ids; @@ -1128,31 +1441,103 @@ err_secondary: DRV_LOG(WARNING, "No available register for" " meter."); } else { - priv->mtr_color_reg = ffs(reg_c_mask) - 1 + - REG_C_0; + /* + * The meter color register is used by the + * flow-hit feature as well. + * The flow-hit feature must use REG_C_3 + * Prefer REG_C_3 if it is available. + */ + if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) + priv->mtr_color_reg = REG_C_3; + else + priv->mtr_color_reg = ffs(reg_c_mask) + - 1 + REG_C_0; priv->mtr_en = 1; priv->mtr_reg_share = - config->hca_attr.qos.flow_meter_reg_share; + config->hca_attr.qos.flow_meter; DRV_LOG(DEBUG, "The REG_C meter uses is %d", priv->mtr_color_reg); } } + if (config->hca_attr.qos.sup && + config->hca_attr.qos.flow_meter_aso_sup) { + uint32_t log_obj_size = + rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); + if (log_obj_size >= + config->hca_attr.qos.log_meter_aso_granularity && + log_obj_size <= + config->hca_attr.qos.log_meter_aso_max_alloc) + sh->meter_aso_en = 1; + } + if (priv->mtr_en) { + err = mlx5_aso_flow_mtrs_mng_init(priv->sh); + if (err) { + err = -err; + goto error; + } + } + if (config->hca_attr.flow.tunnel_header_0_1) + sh->tunnel_header_0_1 = 1; #endif +#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO + if (config->hca_attr.flow_hit_aso && + priv->mtr_color_reg == REG_C_3) { + sh->flow_hit_aso_en = 1; + err = mlx5_flow_aso_age_mng_init(sh); + if (err) { + err = -err; + goto error; + } + DRV_LOG(DEBUG, "Flow Hit ASO is supported."); + } +#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ +#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ + defined(HAVE_MLX5_DR_ACTION_ASO_CT) + if (config->hca_attr.ct_offload && + priv->mtr_color_reg == REG_C_3) { + err = mlx5_flow_aso_ct_mng_init(sh); + if (err) { + err = -err; + goto error; + } + DRV_LOG(DEBUG, "CT ASO is supported."); + sh->ct_aso_en = 1; + } +#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) if (config->hca_attr.log_max_ft_sampler_num > 0 && config->dv_flow_en) { priv->sampler_en = 1; - DRV_LOG(DEBUG, "The Sampler enabled!\n"); + DRV_LOG(DEBUG, "Sampler enabled!"); } else { priv->sampler_en = 0; if (!config->hca_attr.log_max_ft_sampler_num) - DRV_LOG(WARNING, "No available register for" - " Sampler."); + DRV_LOG(WARNING, + "No available register for sampler."); else - DRV_LOG(DEBUG, "DV flow is not supported!\n"); + DRV_LOG(DEBUG, "DV flow is not supported!"); } #endif } + if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 && + !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) { + DRV_LOG(WARNING, "Rx CQE 128B compression is not supported"); + config->cqe_comp = 0; + } + if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX && + (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) { + DRV_LOG(WARNING, "Flow Tag CQE compression" + " format isn't supported."); + config->cqe_comp = 0; + } + if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX && + (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) { + DRV_LOG(WARNING, "L3/L4 Header CQE compression" + " format isn't supported."); + config->cqe_comp = 0; + } + DRV_LOG(DEBUG, "Rx CQE compression is %ssupported", + config->cqe_comp ? "" : "not "); if (config->tx_pp) { DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", config->hca_attr.dev_freq_khz); @@ -1291,7 +1676,22 @@ err_secondary: if (priv->representor) { eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; eth_dev->data->representor_id = priv->representor_id; + MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { + struct mlx5_priv *opriv = + rte_eth_devices[port_id].data->dev_private; + if (opriv && + opriv->master && + opriv->domain_id == priv->domain_id && + opriv->sh == priv->sh) { + eth_dev->data->backer_port_id = port_id; + break; + } + } + if (port_id >= RTE_MAX_ETHPORTS) + eth_dev->data->backer_port_id = eth_dev->data->port_id; } + priv->mp_id.port_id = eth_dev->data->port_id; + strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); /* * Store associated network device interface index. This index * is permanent throughout the lifetime of device. So, we may store @@ -1299,19 +1699,6 @@ err_secondary: */ MLX5_ASSERT(spawn->ifindex); priv->if_index = spawn->ifindex; - if (priv->pf_bond >= 0 && priv->master) { - /* Get bond interface info */ - err = mlx5_sysfs_bond_info(priv->if_index, - &priv->bond_ifindex, - priv->bond_name); - if (err) - DRV_LOG(ERR, "unable to get bond info: %s", - strerror(rte_errno)); - else - DRV_LOG(INFO, "PF device %u, bond device %u(%s)", - priv->if_index, priv->bond_ifindex, - priv->bond_name); - } eth_dev->data->dev_private = priv; priv->dev_data = eth_dev->data; eth_dev->data->mac_addrs = priv->mac; @@ -1327,14 +1714,11 @@ err_secondary: goto error; } DRV_LOG(INFO, - "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", - eth_dev->data->port_id, - mac.addr_bytes[0], mac.addr_bytes[1], - mac.addr_bytes[2], mac.addr_bytes[3], - mac.addr_bytes[4], mac.addr_bytes[5]); + "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, + eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); #ifdef RTE_LIBRTE_MLX5_DEBUG { - char ifname[IF_NAMESIZE]; + char ifname[MLX5_NAMESIZE]; if (mlx5_get_ifname(eth_dev, &ifname) == 0) DRV_LOG(DEBUG, "port %u ifname is \"%s\"", @@ -1355,7 +1739,7 @@ err_secondary: /* Initialize burst functions to prevent crashes before link-up. */ eth_dev->rx_pkt_burst = removed_rx_burst; eth_dev->tx_pkt_burst = removed_tx_burst; - eth_dev->dev_ops = &mlx5_os_dev_ops; + eth_dev->dev_ops = &mlx5_dev_ops; eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; eth_dev->rx_queue_count = mlx5_rx_queue_count; @@ -1366,18 +1750,19 @@ err_secondary: mlx5_ifindex(eth_dev), eth_dev->data->mac_addrs, MLX5_MAX_MAC_ADDRESSES); - priv->flows = 0; priv->ctrl_flows = 0; rte_spinlock_init(&priv->flow_list_lock); TAILQ_INIT(&priv->flow_meters); - TAILQ_INIT(&priv->flow_meter_profiles); + priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); + if (!priv->mtr_profile_tbl) + goto error; /* Hint libmlx5 to use PMD allocator for data plane resources */ mlx5_glue->dv_set_context_attr(sh->ctx, MLX5DV_CTX_ATTR_BUF_ALLOCATORS, (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ .alloc = &mlx5_alloc_verbs_buf, .free = &mlx5_free_verbs_buf, - .data = priv, + .data = sh, })); /* Bring Ethernet device up. */ DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", @@ -1400,6 +1785,14 @@ err_secondary: mlx5_set_min_inline(spawn, config); /* Store device configuration on private structure. */ priv->config = *config; + for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { + icfg[i].release_mem_en = !!config->reclaim_mode; + if (config->reclaim_mode) + icfg[i].per_core_cache = 0; + priv->flows[i] = mlx5_ipool_create(&icfg[i]); + if (!priv->flows[i]) + goto error; + } /* Create context for virtual machine VLAN workaround. */ priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); if (config->dv_flow_en) { @@ -1423,10 +1816,29 @@ err_secondary: /* Use specific wrappers for Tx object. */ priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; - + mlx5_queue_counter_id_prepare(eth_dev); + priv->obj_ops.lb_dummy_queue_create = + mlx5_rxq_ibv_obj_dummy_lb_create; + priv->obj_ops.lb_dummy_queue_release = + mlx5_rxq_ibv_obj_dummy_lb_release; } else { priv->obj_ops = ibv_obj_ops; } + if (config->tx_pp && + (priv->config.dv_esw_en || + priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) { + /* + * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support + * packet pacing and already checked above. + * Hence, we should only make sure the SQs will be created + * with DevX, not with Verbs. + * Verbs allocates the SQ UAR on its own and it can't be shared + * with Clock Queue UAR as required for Tx scheduling. + */ + DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); + err = ENODEV; + goto error; + } priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); if (!priv->drop_queue.hrxq) goto error; @@ -1452,6 +1864,15 @@ err_secondary: err = ENOTSUP; goto error; } + priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, + mlx5_hrxq_create_cb, + mlx5_hrxq_match_cb, + mlx5_hrxq_remove_cb, + mlx5_hrxq_clone_cb, + mlx5_hrxq_clone_free_cb); + if (!priv->hrxqs) + goto error; + rte_rwlock_init(&priv->ind_tbls_lock); /* Query availability of metadata reg_c's. */ err = mlx5_flow_discover_mreg_c(eth_dev); if (err < 0) { @@ -1476,14 +1897,22 @@ err_secondary: priv->sh->dv_regc0_mask) { priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, MLX5_FLOW_MREG_HTABLE_SZ, - 0, 0, - NULL, NULL, NULL); + false, true, eth_dev, + flow_dv_mreg_create_cb, + flow_dv_mreg_match_cb, + flow_dv_mreg_remove_cb, + flow_dv_mreg_clone_cb, + flow_dv_mreg_clone_free_cb); if (!priv->mreg_cp_tbl) { err = ENOMEM; goto error; } } + rte_spinlock_init(&priv->shared_act_sl); mlx5_flow_counter_mode_config(eth_dev); + mlx5_flow_drop_action_config(eth_dev); + if (priv->config.dv_flow_en) + eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; return eth_dev; error: if (priv) { @@ -1499,8 +1928,12 @@ error: mlx5_vlan_vmwa_exit(priv->vmwa_context); if (eth_dev && priv->drop_queue.hrxq) mlx5_drop_action_destroy(eth_dev); + if (priv->mtr_profile_tbl) + mlx5_l3t_destroy(priv->mtr_profile_tbl); if (own_domain_id) claim_zero(rte_eth_switch_domain_free(priv->domain_id)); + if (priv->hrxqs) + mlx5_list_destroy(priv->hrxqs); mlx5_free(priv); if (eth_dev != NULL) eth_dev->data->dev_private = NULL; @@ -1563,9 +1996,13 @@ mlx5_dev_spawn_data_cmp(const void *a, const void *b) * @param[in] ibv_dev * Pointer to Infiniband device structure. * @param[in] pci_dev - * Pointer to PCI device structure to match PCI address. + * Pointer to primary PCI address structure to match. * @param[in] nl_rdma * Netlink RDMA group socket handle. + * @param[in] owner + * Rerepsentor owner PF index. + * @param[out] bond_info + * Pointer to bonding information. * * @return * negative value if no bonding device found, otherwise @@ -1573,20 +2010,23 @@ mlx5_dev_spawn_data_cmp(const void *a, const void *b) */ static int mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, - const struct rte_pci_device *pci_dev, - int nl_rdma) + const struct rte_pci_addr *pci_dev, + int nl_rdma, uint16_t owner, + struct mlx5_bond_info *bond_info) { char ifname[IF_NAMESIZE + 1]; unsigned int ifindex; unsigned int np, i; - FILE *file = NULL; + FILE *bond_file = NULL, *file; int pf = -1; + int ret; /* * Try to get master device name. If something goes * wrong suppose the lack of kernel support and no * bonding devices. */ + memset(bond_info, 0, sizeof(*bond_info)); if (nl_rdma < 0) return -1; if (!strstr(ibv_dev->name, "bond")) @@ -1610,15 +2050,15 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, /* Try to read bonding slave names from sysfs. */ MKSTR(slaves, "/sys/class/net/%s/master/bonding/slaves", ifname); - file = fopen(slaves, "r"); - if (file) + bond_file = fopen(slaves, "r"); + if (bond_file) break; } - if (!file) + if (!bond_file) return -1; /* Use safe format to check maximal buffer length. */ MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); - while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { + while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { char tmp_str[IF_NAMESIZE + 32]; struct rte_pci_addr pci_addr; struct mlx5_switch_info info; @@ -1626,18 +2066,12 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, /* Process slave interface names in the loop. */ snprintf(tmp_str, sizeof(tmp_str), "/sys/class/net/%s", ifname); - if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { + if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { DRV_LOG(WARNING, "can not get PCI address" " for netdev \"%s\"", ifname); continue; } - if (pci_dev->addr.domain != pci_addr.domain || - pci_dev->addr.bus != pci_addr.bus || - pci_dev->addr.devid != pci_addr.devid || - pci_dev->addr.function != pci_addr.function) - continue; /* Slave interface PCI address match found. */ - fclose(file); snprintf(tmp_str, sizeof(tmp_str), "/sys/class/net/%s/phys_port_name", ifname); file = fopen(tmp_str, "rb"); @@ -1646,32 +2080,101 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; if (fscanf(file, "%32s", tmp_str) == 1) mlx5_translate_port_name(tmp_str, &info); - if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || - info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) + fclose(file); + /* Only process PF ports. */ + if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && + info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) + continue; + /* Check max bonding member. */ + if (info.port_name >= MLX5_BOND_MAX_PORTS) { + DRV_LOG(WARNING, "bonding index out of range, " + "please increase MLX5_BOND_MAX_PORTS: %s", + tmp_str); + break; + } + /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */ + if (pci_dev->domain == pci_addr.domain && + pci_dev->bus == pci_addr.bus && + pci_dev->devid == pci_addr.devid && + ((pci_dev->function == 0 && + pci_dev->function + owner == pci_addr.function) || + (pci_dev->function == owner && + pci_addr.function == owner))) pf = info.port_name; - break; - } - if (file) + /* Get ifindex. */ + snprintf(tmp_str, sizeof(tmp_str), + "/sys/class/net/%s/ifindex", ifname); + file = fopen(tmp_str, "rb"); + if (!file) + break; + ret = fscanf(file, "%u", &ifindex); fclose(file); + if (ret != 1) + break; + /* Save bonding info. */ + strncpy(bond_info->ports[info.port_name].ifname, ifname, + sizeof(bond_info->ports[0].ifname)); + bond_info->ports[info.port_name].pci_addr = pci_addr; + bond_info->ports[info.port_name].ifindex = ifindex; + bond_info->n_port++; + } + if (pf >= 0) { + /* Get bond interface info */ + ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, + bond_info->ifname); + if (ret) + DRV_LOG(ERR, "unable to get bond info: %s", + strerror(rte_errno)); + else + DRV_LOG(INFO, "PF device %u, bond device %u(%s)", + ifindex, bond_info->ifindex, bond_info->ifname); + } return pf; } +static void +mlx5_os_config_default(struct mlx5_dev_config *config) +{ + memset(config, 0, sizeof(*config)); + config->mps = MLX5_ARG_UNSET; + config->dbnc = MLX5_ARG_UNSET; + config->rx_vec_en = 1; + config->txq_inline_max = MLX5_ARG_UNSET; + config->txq_inline_min = MLX5_ARG_UNSET; + config->txq_inline_mpw = MLX5_ARG_UNSET; + config->txqs_inline = MLX5_ARG_UNSET; + config->vf_nl_en = 1; + config->mr_ext_memseg_en = 1; + config->mr_mempool_reg_en = 1; + config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; + config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; + config->dv_esw_en = 1; + config->dv_flow_en = 1; + config->decap_en = 1; + config->log_hp_size = MLX5_ARG_UNSET; + config->allow_duplicate_pattern = 1; +} + /** - * DPDK callback to register a PCI device. + * Register a PCI device within bonding. * - * This function spawns Ethernet devices out of a given PCI device. + * This function spawns Ethernet devices out of a given PCI device and + * bonding owner PF index. * - * @param[in] pci_drv - * PCI driver structure (mlx5_driver). * @param[in] pci_dev * PCI device information. + * @param[in] req_eth_da + * Requested ethdev device argument. + * @param[in] owner_id + * Requested owner PF port ID within bonding device, default to 0. * * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ -int -mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, - struct rte_pci_device *pci_dev) +static int +mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, + struct rte_eth_devargs *req_eth_da, + uint16_t owner_id) { struct ibv_device **ibv_list; /* @@ -1701,16 +2204,11 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct mlx5_dev_spawn_data *list = NULL; struct mlx5_dev_config dev_config; unsigned int dev_config_vf; - int ret; + struct rte_eth_devargs eth_da = *req_eth_da; + struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ + struct mlx5_bond_info bond_info; + int ret = -1; - if (rte_eal_process_type() == RTE_PROC_PRIMARY) - mlx5_pmd_socket_init(); - ret = mlx5_init_once(); - if (ret) { - DRV_LOG(ERR, "unable to init PMD global data: %s", - strerror(rte_errno)); - return -rte_errno; - } errno = 0; ibv_list = mlx5_glue->get_device_list(&ret); if (!ibv_list) { @@ -1732,7 +2230,8 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); bd = mlx5_device_bond_pci_match - (ibv_list[ret], pci_dev, nl_rdma); + (ibv_list[ret], &owner_pci, nl_rdma, owner_id, + &bond_info); if (bd >= 0) { /* * Bonding device detected. Only one match is allowed, @@ -1749,23 +2248,28 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, ret = -rte_errno; goto exit; } + /* Amend owner pci address if owner PF ID specified. */ + if (eth_da.nb_representor_ports) + owner_pci.function += owner_id; DRV_LOG(INFO, "PCI information matches for" " slave %d bonding device \"%s\"", bd, ibv_list[ret]->name); ibv_match[nd++] = ibv_list[ret]; break; + } else { + /* Bonding device not found. */ + if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, + &pci_addr)) + continue; + if (owner_pci.domain != pci_addr.domain || + owner_pci.bus != pci_addr.bus || + owner_pci.devid != pci_addr.devid || + owner_pci.function != pci_addr.function) + continue; + DRV_LOG(INFO, "PCI information matches for device \"%s\"", + ibv_list[ret]->name); + ibv_match[nd++] = ibv_list[ret]; } - if (mlx5_dev_to_pci_addr - (ibv_list[ret]->ibdev_path, &pci_addr)) - continue; - if (pci_dev->addr.domain != pci_addr.domain || - pci_dev->addr.bus != pci_addr.bus || - pci_dev->addr.devid != pci_addr.devid || - pci_dev->addr.function != pci_addr.function) - continue; - DRV_LOG(INFO, "PCI information matches for device \"%s\"", - ibv_list[ret]->name); - ibv_match[nd++] = ibv_list[ret]; } ibv_match[nd] = NULL; if (!nd) { @@ -1773,8 +2277,8 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, DRV_LOG(WARNING, "no Verbs device matches PCI device " PCI_PRI_FMT "," " are kernel drivers loaded?", - pci_dev->addr.domain, pci_dev->addr.bus, - pci_dev->addr.devid, pci_dev->addr.function); + owner_pci.domain, owner_pci.bus, + owner_pci.devid, owner_pci.function); rte_errno = ENOENT; ret = -rte_errno; goto exit; @@ -1798,19 +2302,6 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, goto exit; } } -#ifndef HAVE_MLX5DV_DR_DEVX_PORT - if (bd >= 0) { - /* - * This may happen if there is VF LAG kernel support and - * application is compiled with older rdma_core library. - */ - DRV_LOG(ERR, - "No kernel/verbs support for VF LAG bonding found."); - rte_errno = ENOTSUP; - ret = -rte_errno; - goto exit; - } -#endif /* * Now we can determine the maximal * amount of devices to be spawned. @@ -1836,6 +2327,7 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, MLX5_ASSERT(nd == 1); MLX5_ASSERT(np); for (i = 1; i <= np; ++i) { + list[ns].bond_info = &bond_info; list[ns].max_port = np; list[ns].phys_port = i; list[ns].phys_dev = ibv_match[0]; @@ -1876,12 +2368,23 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, if (!ret && bd >= 0) { switch (list[ns].info.name_type) { case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: + if (np == 1) { + /* + * Force standalone bonding + * device for ROCE LAG + * confgiurations. + */ + list[ns].info.master = 0; + list[ns].info.representor = 0; + } if (list[ns].info.port_name == bd) ns++; break; case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: /* Fallthrough */ case MLX5_PHYS_PORT_NAME_TYPE_PFVF: + /* Fallthrough */ + case MLX5_PHYS_PORT_NAME_TYPE_PFSF: if (list[ns].info.pf_num == bd) ns++; break; @@ -1922,6 +2425,7 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, */ for (i = 0; i != nd; ++i) { memset(&list[ns].info, 0, sizeof(list[ns].info)); + list[ns].bond_info = NULL; list[ns].max_port = 1; list[ns].phys_port = 1; list[ns].phys_dev = ibv_match[i]; @@ -2013,6 +2517,18 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, ret = -rte_errno; goto exit; } + /* + * New kernels may add the switch_id attribute for the case + * there is no E-Switch and we wrongly recognized the + * only device as master. Override this if there is the + * single device with single port and new device name + * format present. + */ + if (nd == 1 && + list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { + list[0].info.master = 0; + list[0].info.representor = 0; + } } MLX5_ASSERT(ns); /* @@ -2028,37 +2544,42 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: + case PCI_DEVICE_ID_MELLANOX_CONNECTXVF: dev_config_vf = 1; break; default: dev_config_vf = 0; break; } + if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { + /* Set devargs default values. */ + if (eth_da.nb_mh_controllers == 0) { + eth_da.nb_mh_controllers = 1; + eth_da.mh_controllers[0] = 0; + } + if (eth_da.nb_ports == 0 && ns > 0) { + if (list[0].pf_bond >= 0 && list[0].info.representor) + DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", + pci_dev->device.devargs->args); + eth_da.nb_ports = 1; + eth_da.ports[0] = list[0].info.pf_num; + } + if (eth_da.nb_representor_ports == 0) { + eth_da.nb_representor_ports = 1; + eth_da.representor_ports[0] = 0; + } + } for (i = 0; i != ns; ++i) { uint32_t restore; /* Default configuration. */ - memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); + mlx5_os_config_default(&dev_config); dev_config.vf = dev_config_vf; - dev_config.mps = MLX5_ARG_UNSET; - dev_config.dbnc = MLX5_ARG_UNSET; - dev_config.rx_vec_en = 1; - dev_config.txq_inline_max = MLX5_ARG_UNSET; - dev_config.txq_inline_min = MLX5_ARG_UNSET; - dev_config.txq_inline_mpw = MLX5_ARG_UNSET; - dev_config.txqs_inline = MLX5_ARG_UNSET; - dev_config.vf_nl_en = 1; - dev_config.mr_ext_memseg_en = 1; - dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; - dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; - dev_config.dv_esw_en = 1; - dev_config.dv_flow_en = 1; - dev_config.decap_en = 1; - dev_config.log_hp_size = MLX5_ARG_UNSET; + list[i].numa_node = pci_dev->device.numa_node; list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, &list[i], - &dev_config); + &dev_config, + ð_da); if (!list[i].eth_dev) { if (rte_errno != EBUSY && rte_errno != EEXIST) break; @@ -2067,6 +2588,31 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, } restore = list[i].eth_dev->data->dev_flags; rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); + /** + * Each representor has a dedicated interrupts vector. + * rte_eth_copy_pci_info() assigns PF interrupts handle to + * representor eth_dev object because representor and PF + * share the same PCI address. + * Override representor device with a dedicated + * interrupts handle here. + * Representor interrupts handle is released in mlx5_dev_stop(). + */ + if (list[i].info.representor) { + struct rte_intr_handle *intr_handle; + intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, + sizeof(*intr_handle), 0, + SOCKET_ID_ANY); + if (!intr_handle) { + DRV_LOG(ERR, + "port %u failed to allocate memory for interrupt handler " + "Rx interrupts will not be supported", + i); + rte_errno = ENOMEM; + ret = -rte_errno; + goto exit; + } + list[i].eth_dev->intr_handle = intr_handle; + } /* Restore non-PCI flags cleared by the above call. */ list[i].eth_dev->data->dev_flags |= restore; rte_eth_dev_probing_finish(list[i].eth_dev); @@ -2075,8 +2621,8 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, DRV_LOG(ERR, "probe of PCI device " PCI_PRI_FMT " aborted after" " encountering an error: %s", - pci_dev->addr.domain, pci_dev->addr.bus, - pci_dev->addr.devid, pci_dev->addr.function, + owner_pci.domain, owner_pci.bus, + owner_pci.devid, owner_pci.function, strerror(rte_errno)); ret = -rte_errno; /* Roll back. */ @@ -2111,6 +2657,155 @@ exit: return ret; } +static int +mlx5_os_parse_eth_devargs(struct rte_device *dev, + struct rte_eth_devargs *eth_da) +{ + int ret = 0; + + if (dev->devargs == NULL) + return 0; + memset(eth_da, 0, sizeof(*eth_da)); + /* Parse representor information first from class argument. */ + if (dev->devargs->cls_str) + ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); + if (ret != 0) { + DRV_LOG(ERR, "failed to parse device arguments: %s", + dev->devargs->cls_str); + return -rte_errno; + } + if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { + /* Parse legacy device argument */ + ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); + if (ret) { + DRV_LOG(ERR, "failed to parse device arguments: %s", + dev->devargs->args); + return -rte_errno; + } + } + return 0; +} + +/** + * Callback to register a PCI device. + * + * This function spawns Ethernet devices out of a given PCI device. + * + * @param[in] pci_dev + * PCI device information. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +mlx5_os_pci_probe(struct rte_pci_device *pci_dev) +{ + struct rte_eth_devargs eth_da = { .nb_ports = 0 }; + int ret = 0; + uint16_t p; + + ret = mlx5_os_parse_eth_devargs(&pci_dev->device, ð_da); + if (ret != 0) + return ret; + + if (eth_da.nb_ports > 0) { + /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ + for (p = 0; p < eth_da.nb_ports; p++) { + ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, + eth_da.ports[p]); + if (ret) + break; + } + if (ret) { + DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " " + "aborted due to proding failure of PF %u", + pci_dev->addr.domain, pci_dev->addr.bus, + pci_dev->addr.devid, pci_dev->addr.function, + eth_da.ports[p]); + mlx5_net_remove(&pci_dev->device); + } + } else { + ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, 0); + } + return ret; +} + +/* Probe a single SF device on auxiliary bus, no representor support. */ +static int +mlx5_os_auxiliary_probe(struct rte_device *dev) +{ + struct rte_eth_devargs eth_da = { .nb_ports = 0 }; + struct mlx5_dev_config config; + struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; + struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); + struct rte_eth_dev *eth_dev; + int ret = 0; + + /* Parse ethdev devargs. */ + ret = mlx5_os_parse_eth_devargs(dev, ð_da); + if (ret != 0) + return ret; + /* Set default config data. */ + mlx5_os_config_default(&config); + config.sf = 1; + /* Init spawn data. */ + spawn.max_port = 1; + spawn.phys_port = 1; + spawn.phys_dev = mlx5_os_get_ibv_dev(dev); + if (spawn.phys_dev == NULL) + return -rte_errno; + ret = mlx5_auxiliary_get_ifindex(dev->name); + if (ret < 0) { + DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); + return ret; + } + spawn.ifindex = ret; + spawn.numa_node = dev->numa_node; + /* Spawn device. */ + eth_dev = mlx5_dev_spawn(dev, &spawn, &config, ð_da); + if (eth_dev == NULL) + return -rte_errno; + /* Post create. */ + eth_dev->intr_handle = &adev->intr_handle; + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; + eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; + eth_dev->data->numa_node = dev->numa_node; + } + rte_eth_dev_probing_finish(eth_dev); + return 0; +} + +/** + * Net class driver callback to probe a device. + * + * This function probe PCI bus device(s) or a single SF on auxiliary bus. + * + * @param[in] dev + * Pointer to the generic device. + * + * @return + * 0 on success, the function cannot fail. + */ +int +mlx5_os_net_probe(struct rte_device *dev) +{ + int ret; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + mlx5_pmd_socket_init(); + ret = mlx5_init_once(); + if (ret) { + DRV_LOG(ERR, "unable to init PMD global data: %s", + strerror(rte_errno)); + return -rte_errno; + } + if (mlx5_dev_is_pci(dev)) + return mlx5_os_pci_probe(RTE_DEV_TO_PCI(dev)); + else + return mlx5_os_auxiliary_probe(dev); +} + static int mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) { @@ -2198,7 +2893,6 @@ mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, int dbmap_env; int err = 0; - sh->numa_node = spawn->pci_dev->device.numa_node; pthread_mutex_init(&sh->txpp.mutex, NULL); /* * Configure environment variable "MLX5_BF_SHUT_UP" @@ -2229,6 +2923,16 @@ mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, DRV_LOG(DEBUG, "DevX is NOT supported"); err = 0; } + if (!err && sh->ctx) { + /* Hint libmlx5 to use PMD allocator for data plane resources */ + mlx5_glue->dv_set_context_attr(sh->ctx, + MLX5DV_CTX_ATTR_BUF_ALLOCATORS, + (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ + .alloc = &mlx5_alloc_verbs_buf, + .free = &mlx5_free_verbs_buf, + .data = sh, + })); + } return err; } @@ -2335,6 +3039,10 @@ mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, int fd; if (priv->sh) { + if (priv->q_counters != NULL && + strcmp(ctr_name, "out_of_buffer") == 0) + return mlx5_devx_cmd_queue_counter_query + (priv->q_counters, 0, (uint32_t *)stat); MKSTR(path, "%s/ports/%d/hw_counters/%s", priv->sh->ibdev_path, priv->dev_port, @@ -2378,8 +3086,8 @@ void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb) { - *reg_mr_cb = mlx5_verbs_ops.reg_mr; - *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; + *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr; + *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr; } /** @@ -2511,153 +3219,3 @@ mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) dev->data->mac_addrs, MLX5_MAX_MAC_ADDRESSES, priv->mac_own); } - -const struct eth_dev_ops mlx5_os_dev_ops = { - .dev_configure = mlx5_dev_configure, - .dev_start = mlx5_dev_start, - .dev_stop = mlx5_dev_stop, - .dev_set_link_down = mlx5_set_link_down, - .dev_set_link_up = mlx5_set_link_up, - .dev_close = mlx5_dev_close, - .promiscuous_enable = mlx5_promiscuous_enable, - .promiscuous_disable = mlx5_promiscuous_disable, - .allmulticast_enable = mlx5_allmulticast_enable, - .allmulticast_disable = mlx5_allmulticast_disable, - .link_update = mlx5_link_update, - .stats_get = mlx5_stats_get, - .stats_reset = mlx5_stats_reset, - .xstats_get = mlx5_xstats_get, - .xstats_reset = mlx5_xstats_reset, - .xstats_get_names = mlx5_xstats_get_names, - .fw_version_get = mlx5_fw_version_get, - .dev_infos_get = mlx5_dev_infos_get, - .read_clock = mlx5_txpp_read_clock, - .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, - .vlan_filter_set = mlx5_vlan_filter_set, - .rx_queue_setup = mlx5_rx_queue_setup, - .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, - .tx_queue_setup = mlx5_tx_queue_setup, - .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, - .rx_queue_release = mlx5_rx_queue_release, - .tx_queue_release = mlx5_tx_queue_release, - .rx_queue_start = mlx5_rx_queue_start, - .rx_queue_stop = mlx5_rx_queue_stop, - .tx_queue_start = mlx5_tx_queue_start, - .tx_queue_stop = mlx5_tx_queue_stop, - .flow_ctrl_get = mlx5_dev_get_flow_ctrl, - .flow_ctrl_set = mlx5_dev_set_flow_ctrl, - .mac_addr_remove = mlx5_mac_addr_remove, - .mac_addr_add = mlx5_mac_addr_add, - .mac_addr_set = mlx5_mac_addr_set, - .set_mc_addr_list = mlx5_set_mc_addr_list, - .mtu_set = mlx5_dev_set_mtu, - .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, - .vlan_offload_set = mlx5_vlan_offload_set, - .reta_update = mlx5_dev_rss_reta_update, - .reta_query = mlx5_dev_rss_reta_query, - .rss_hash_update = mlx5_rss_hash_update, - .rss_hash_conf_get = mlx5_rss_hash_conf_get, - .filter_ctrl = mlx5_dev_filter_ctrl, - .rxq_info_get = mlx5_rxq_info_get, - .txq_info_get = mlx5_txq_info_get, - .rx_burst_mode_get = mlx5_rx_burst_mode_get, - .tx_burst_mode_get = mlx5_tx_burst_mode_get, - .rx_queue_intr_enable = mlx5_rx_intr_enable, - .rx_queue_intr_disable = mlx5_rx_intr_disable, - .is_removed = mlx5_is_removed, - .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, - .get_module_info = mlx5_get_module_info, - .get_module_eeprom = mlx5_get_module_eeprom, - .hairpin_cap_get = mlx5_hairpin_cap_get, - .mtr_ops_get = mlx5_flow_meter_ops_get, - .hairpin_bind = mlx5_hairpin_bind, - .hairpin_unbind = mlx5_hairpin_unbind, - .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports, - .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, - .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, - .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, -}; - -/* Available operations from secondary process. */ -const struct eth_dev_ops mlx5_os_dev_sec_ops = { - .stats_get = mlx5_stats_get, - .stats_reset = mlx5_stats_reset, - .xstats_get = mlx5_xstats_get, - .xstats_reset = mlx5_xstats_reset, - .xstats_get_names = mlx5_xstats_get_names, - .fw_version_get = mlx5_fw_version_get, - .dev_infos_get = mlx5_dev_infos_get, - .read_clock = mlx5_txpp_read_clock, - .rx_queue_start = mlx5_rx_queue_start, - .rx_queue_stop = mlx5_rx_queue_stop, - .tx_queue_start = mlx5_tx_queue_start, - .tx_queue_stop = mlx5_tx_queue_stop, - .rxq_info_get = mlx5_rxq_info_get, - .txq_info_get = mlx5_txq_info_get, - .rx_burst_mode_get = mlx5_rx_burst_mode_get, - .tx_burst_mode_get = mlx5_tx_burst_mode_get, - .get_module_info = mlx5_get_module_info, - .get_module_eeprom = mlx5_get_module_eeprom, -}; - -/* Available operations in flow isolated mode. */ -const struct eth_dev_ops mlx5_os_dev_ops_isolate = { - .dev_configure = mlx5_dev_configure, - .dev_start = mlx5_dev_start, - .dev_stop = mlx5_dev_stop, - .dev_set_link_down = mlx5_set_link_down, - .dev_set_link_up = mlx5_set_link_up, - .dev_close = mlx5_dev_close, - .promiscuous_enable = mlx5_promiscuous_enable, - .promiscuous_disable = mlx5_promiscuous_disable, - .allmulticast_enable = mlx5_allmulticast_enable, - .allmulticast_disable = mlx5_allmulticast_disable, - .link_update = mlx5_link_update, - .stats_get = mlx5_stats_get, - .stats_reset = mlx5_stats_reset, - .xstats_get = mlx5_xstats_get, - .xstats_reset = mlx5_xstats_reset, - .xstats_get_names = mlx5_xstats_get_names, - .fw_version_get = mlx5_fw_version_get, - .dev_infos_get = mlx5_dev_infos_get, - .read_clock = mlx5_txpp_read_clock, - .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, - .vlan_filter_set = mlx5_vlan_filter_set, - .rx_queue_setup = mlx5_rx_queue_setup, - .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, - .tx_queue_setup = mlx5_tx_queue_setup, - .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, - .rx_queue_release = mlx5_rx_queue_release, - .tx_queue_release = mlx5_tx_queue_release, - .rx_queue_start = mlx5_rx_queue_start, - .rx_queue_stop = mlx5_rx_queue_stop, - .tx_queue_start = mlx5_tx_queue_start, - .tx_queue_stop = mlx5_tx_queue_stop, - .flow_ctrl_get = mlx5_dev_get_flow_ctrl, - .flow_ctrl_set = mlx5_dev_set_flow_ctrl, - .mac_addr_remove = mlx5_mac_addr_remove, - .mac_addr_add = mlx5_mac_addr_add, - .mac_addr_set = mlx5_mac_addr_set, - .set_mc_addr_list = mlx5_set_mc_addr_list, - .mtu_set = mlx5_dev_set_mtu, - .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, - .vlan_offload_set = mlx5_vlan_offload_set, - .filter_ctrl = mlx5_dev_filter_ctrl, - .rxq_info_get = mlx5_rxq_info_get, - .txq_info_get = mlx5_txq_info_get, - .rx_burst_mode_get = mlx5_rx_burst_mode_get, - .tx_burst_mode_get = mlx5_tx_burst_mode_get, - .rx_queue_intr_enable = mlx5_rx_intr_enable, - .rx_queue_intr_disable = mlx5_rx_intr_disable, - .is_removed = mlx5_is_removed, - .get_module_info = mlx5_get_module_info, - .get_module_eeprom = mlx5_get_module_eeprom, - .hairpin_cap_get = mlx5_hairpin_cap_get, - .mtr_ops_get = mlx5_flow_meter_ops_get, - .hairpin_bind = mlx5_hairpin_bind, - .hairpin_unbind = mlx5_hairpin_unbind, - .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports, - .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, - .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, - .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, -};