X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Flinux%2Fmlx5_os.c;h=be950955217b4cccb53a8d26f31b823843b24a8c;hb=80f872ee0222e3936856e43a693168425b1c78ae;hp=ad43141e471c399303d965618798bb99d71b165d;hpb=377b69fb50729625eb4eb91bab907d23111d6bd5;p=dpdk.git diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index ad43141e47..be95095521 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -43,15 +44,12 @@ #include "mlx5_rx.h" #include "mlx5_tx.h" #include "mlx5_autoconf.h" -#include "mlx5_mr.h" #include "mlx5_flow.h" #include "rte_pmd_mlx5.h" #include "mlx5_verbs.h" #include "mlx5_nl.h" #include "mlx5_devx.h" -#define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 - #ifndef HAVE_IBV_MLX5_MOD_MPW #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) @@ -69,6 +67,44 @@ static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; /* Process local data for secondary processes. */ static struct mlx5_local_data mlx5_local_data; +/* rte flow indexed pool configuration. */ +static struct mlx5_indexed_pool_config icfg[] = { + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 0, + .type = "ctl_flow_ipool", + }, + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .grow_trunk = 3, + .grow_shift = 2, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 1 << 14, + .type = "rte_flow_ipool", + }, + { + .size = sizeof(struct rte_flow), + .trunk_size = 64, + .grow_trunk = 3, + .grow_shift = 2, + .need_lock = 1, + .release_mem_en = 0, + .malloc = mlx5_malloc, + .free = mlx5_free, + .per_core_cache = 0, + .type = "mcp_flow_ipool", + }, +}; + /** * Set the completion channel file descriptor interrupt as non-blocking. * @@ -76,7 +112,7 @@ static struct mlx5_local_data mlx5_local_data; * Pointer to RQ channel object, which includes the channel fd * * @param[out] fd - * The file descriptor (representing the intetrrupt) used in this channel. + * The file descriptor (representing the interrupt) used in this channel. * * @return * 0 on successfully setting the fd to non-blocking, non-zero otherwise. @@ -95,116 +131,332 @@ mlx5_os_set_nonblock_channel_fd(int fd) * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 * device attributes from the glue out parameter. * - * @param dev - * Pointer to ibv context. - * - * @param device_attr - * Pointer to mlx5 device attributes. + * @param sh + * Pointer to shared device context. * * @return - * 0 on success, non zero error number otherwise + * 0 on success, a negative errno value otherwise and rte_errno is set. */ int -mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) +mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) { int err; - struct ibv_device_attr_ex attr_ex; - memset(device_attr, 0, sizeof(*device_attr)); - err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); - if (err) - return err; - - device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; - device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; - device_attr->max_sge = attr_ex.orig_attr.max_sge; - device_attr->max_cq = attr_ex.orig_attr.max_cq; - device_attr->max_cqe = attr_ex.orig_attr.max_cqe; - device_attr->max_mr = attr_ex.orig_attr.max_mr; - device_attr->max_pd = attr_ex.orig_attr.max_pd; - device_attr->max_qp = attr_ex.orig_attr.max_qp; - device_attr->max_srq = attr_ex.orig_attr.max_srq; - device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr; - device_attr->raw_packet_caps = attr_ex.raw_packet_caps; - device_attr->max_rwq_indirection_table_size = - attr_ex.rss_caps.max_rwq_indirection_table_size; - device_attr->max_tso = attr_ex.tso_caps.max_tso; - device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; - + struct mlx5_common_device *cdev = sh->cdev; + struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; + struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; struct mlx5dv_context dv_attr = { .comp_mask = 0 }; - err = mlx5_glue->dv_query_device(ctx, &dv_attr); - if (err) - return err; - device_attr->flags = dv_attr.flags; - device_attr->comp_mask = dv_attr.comp_mask; + err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); + if (err) { + rte_errno = errno; + return -rte_errno; + } #ifdef HAVE_IBV_MLX5_MOD_SWP - device_attr->sw_parsing_offloads = - dv_attr.sw_parsing_caps.sw_parsing_offloads; + dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; #endif - device_attr->min_single_stride_log_num_of_bytes = - dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; - device_attr->max_single_stride_log_num_of_bytes = - dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; - device_attr->min_single_wqe_log_num_of_strides = - dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; - device_attr->max_single_wqe_log_num_of_strides = - dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; - device_attr->stride_supported_qpts = - dv_attr.striding_rq_caps.supported_qpts; #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT - device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; + dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; #endif - - return err; -} - -/** - * Verbs callback to allocate a memory. This function should allocate the space - * according to the size provided residing inside a huge page. - * Please note that all allocation must respect the alignment from libmlx5 - * (i.e. currently rte_mem_page_size()). - * - * @param[in] size - * The size in bytes of the memory to allocate. - * @param[in] data - * A pointer to the callback data. - * - * @return - * Allocated buffer, NULL otherwise and rte_errno is set. - */ -static void * -mlx5_alloc_verbs_buf(size_t size, void *data) -{ - struct mlx5_dev_ctx_shared *sh = data; - void *ret; - size_t alignment = rte_mem_page_size(); - if (alignment == (size_t)-1) { - DRV_LOG(ERR, "Failed to get mem page size"); - rte_errno = ENOMEM; - return NULL; +#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT + dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; +#endif + err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); + if (err) { + rte_errno = errno; + return -rte_errno; } - - MLX5_ASSERT(data != NULL); - ret = mlx5_malloc(0, size, alignment, sh->numa_node); - if (!ret && size) - rte_errno = ENOMEM; - return ret; + memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); + if (mlx5_dev_is_pci(cdev->dev)) + sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); + else + sh->dev_cap.sf = 1; + sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; + sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; + sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; + sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; +#ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR + sh->dev_cap.dest_tir = 1; +#endif +#if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) + DRV_LOG(DEBUG, "DV flow is supported."); + sh->dev_cap.dv_flow_en = 1; +#endif +#ifdef HAVE_MLX5DV_DR_ESWITCH + if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) + sh->dev_cap.dv_esw_en = 1; +#endif + /* + * Multi-packet send is supported by ConnectX-4 Lx PF as well + * as all ConnectX-5 devices. + */ + if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { + if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { + DRV_LOG(DEBUG, "Enhanced MPW is supported."); + sh->dev_cap.mps = MLX5_MPW_ENHANCED; + } else { + DRV_LOG(DEBUG, "MPW is supported."); + sh->dev_cap.mps = MLX5_MPW; + } + } else { + DRV_LOG(DEBUG, "MPW isn't supported."); + sh->dev_cap.mps = MLX5_MPW_DISABLED; + } +#if (RTE_CACHE_LINE_SIZE == 128) + if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) + sh->dev_cap.cqe_comp = 1; + DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", + sh->dev_cap.cqe_comp ? "" : "not "); +#else + sh->dev_cap.cqe_comp = 1; +#endif +#ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT + sh->dev_cap.mpls_en = + ((dv_attr.tunnel_offloads_caps & + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && + (dv_attr.tunnel_offloads_caps & + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); + DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", + sh->dev_cap.mpls_en ? "" : "not "); +#else + DRV_LOG(WARNING, + "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); +#endif +#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) + sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; +#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) + sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & + IBV_DEVICE_PCI_WRITE_END_PADDING); +#endif + sh->dev_cap.hw_csum = + !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); + DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", + sh->dev_cap.hw_csum ? "" : "not "); + sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & + IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); + DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", + (sh->dev_cap.hw_vlan_strip ? "" : "not ")); + sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & + IBV_RAW_PACKET_CAP_SCATTER_FCS); +#if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ + !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) + DRV_LOG(DEBUG, "Counters are not supported."); +#endif + /* + * DPDK doesn't support larger/variable indirection tables. + * Once DPDK supports it, take max size from device attr. + */ + sh->dev_cap.ind_table_max_size = + RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, + (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); + DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", + sh->dev_cap.ind_table_max_size); + sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && + (attr_ex.tso_caps.supported_qpts & + (1 << IBV_QPT_RAW_PACKET))); + if (sh->dev_cap.tso) + sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; + strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, + sizeof(sh->dev_cap.fw_ver)); +#ifdef HAVE_IBV_MLX5_MOD_SWP + if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) + sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & + (MLX5_SW_PARSING_CAP | + MLX5_SW_PARSING_CSUM_CAP | + MLX5_SW_PARSING_TSO_CAP); + DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); +#endif +#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT + if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { + struct mlx5dv_striding_rq_caps *strd_rq_caps = + &dv_attr.striding_rq_caps; + + sh->dev_cap.mprq.enabled = 1; + sh->dev_cap.mprq.log_min_stride_size = + strd_rq_caps->min_single_stride_log_num_of_bytes; + sh->dev_cap.mprq.log_max_stride_size = + strd_rq_caps->max_single_stride_log_num_of_bytes; + sh->dev_cap.mprq.log_min_stride_num = + strd_rq_caps->min_single_wqe_log_num_of_strides; + sh->dev_cap.mprq.log_max_stride_num = + strd_rq_caps->max_single_wqe_log_num_of_strides; + sh->dev_cap.mprq.log_min_stride_wqe_size = + cdev->config.devx ? + hca_attr->log_min_stride_wqe_sz : + MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; + DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", + sh->dev_cap.mprq.log_min_stride_size); + DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", + sh->dev_cap.mprq.log_max_stride_size); + DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", + sh->dev_cap.mprq.log_min_stride_num); + DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", + sh->dev_cap.mprq.log_max_stride_num); + DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", + sh->dev_cap.mprq.log_min_stride_wqe_size); + DRV_LOG(DEBUG, "\tsupported_qpts: %d", + strd_rq_caps->supported_qpts); + DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); + } +#endif +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { + sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & + (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | + MLX5_TUNNELED_OFFLOADS_GRE_CAP | + MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); + } + if (sh->dev_cap.tunnel_en) { + DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", + sh->dev_cap.tunnel_en & + MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", + sh->dev_cap.tunnel_en & + MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", + sh->dev_cap.tunnel_en & + MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); + } else { + DRV_LOG(DEBUG, "Tunnel offloading is not supported."); + } +#else + DRV_LOG(WARNING, + "Tunnel offloading disabled due to old OFED/rdma-core version"); +#endif + if (!sh->cdev->config.devx) + return 0; + /* Check capabilities for Packet Pacing. */ + DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", + hca_attr->dev_freq_khz); + DRV_LOG(DEBUG, "Packet pacing is %ssupported.", + hca_attr->qos.packet_pacing ? "" : "not "); + DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", + hca_attr->cross_channel ? "" : "not "); + DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", + hca_attr->wqe_index_ignore ? "" : "not "); + DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", + hca_attr->non_wire_sq ? "" : "not "); + DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", + hca_attr->log_max_static_sq_wq ? "" : "not ", + hca_attr->log_max_static_sq_wq); + DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", + hca_attr->qos.wqe_rate_pp ? "" : "not "); + sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; + if (!hca_attr->cross_channel) { + DRV_LOG(DEBUG, + "Cross channel operations are required for packet pacing."); + sh->dev_cap.txpp_en = 0; + } + if (!hca_attr->wqe_index_ignore) { + DRV_LOG(DEBUG, + "WQE index ignore feature is required for packet pacing."); + sh->dev_cap.txpp_en = 0; + } + if (!hca_attr->non_wire_sq) { + DRV_LOG(DEBUG, + "Non-wire SQ feature is required for packet pacing."); + sh->dev_cap.txpp_en = 0; + } + if (!hca_attr->log_max_static_sq_wq) { + DRV_LOG(DEBUG, + "Static WQE SQ feature is required for packet pacing."); + sh->dev_cap.txpp_en = 0; + } + if (!hca_attr->qos.wqe_rate_pp) { + DRV_LOG(DEBUG, + "WQE rate mode is required for packet pacing."); + sh->dev_cap.txpp_en = 0; + } +#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET + DRV_LOG(DEBUG, + "DevX does not provide UAR offset, can't create queues for packet pacing."); + sh->dev_cap.txpp_en = 0; +#endif + /* Check for LRO support. */ + if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) { + /* TBD check tunnel lro caps. */ + sh->dev_cap.lro_supported = 1; + DRV_LOG(DEBUG, "Device supports LRO."); + DRV_LOG(DEBUG, + "LRO minimal size of TCP segment required for coalescing is %d bytes.", + hca_attr->lro_min_mss_size); + } + sh->dev_cap.scatter_fcs_w_decap_disable = + hca_attr->scatter_fcs_w_decap_disable; + sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; + mlx5_rt_timestamp_config(sh, hca_attr); + return 0; } /** - * Verbs callback to free a memory. + * Detect misc5 support or not * - * @param[in] ptr - * A pointer to the memory to free. - * @param[in] data - * A pointer to the callback data. + * @param[in] priv + * Device private data pointer */ +#ifdef HAVE_MLX5DV_DR static void -mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) +__mlx5_discovery_misc5_cap(struct mlx5_priv *priv) { - MLX5_ASSERT(data != NULL); - mlx5_free(ptr); +#ifdef HAVE_IBV_FLOW_DV_SUPPORT + /* Dummy VxLAN matcher to detect rdma-core misc5 cap + * Case: IPv4--->UDP--->VxLAN--->vni + */ + void *tbl; + struct mlx5_flow_dv_match_params matcher_mask; + void *match_m; + void *matcher; + void *headers_m; + void *misc5_m; + uint32_t *tunnel_header_m; + struct mlx5dv_flow_matcher_attr dv_attr; + + memset(&matcher_mask, 0, sizeof(matcher_mask)); + matcher_mask.size = sizeof(matcher_mask.buf); + match_m = matcher_mask.buf; + headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); + misc5_m = MLX5_ADDR_OF(fte_match_param, + match_m, misc_parameters_5); + tunnel_header_m = (uint32_t *) + MLX5_ADDR_OF(fte_match_set_misc5, + misc5_m, tunnel_header_1); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); + *tunnel_header_m = 0xffffff; + + tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); + if (!tbl) { + DRV_LOG(INFO, "No SW steering support"); + return; + } + dv_attr.type = IBV_FLOW_ATTR_NORMAL, + dv_attr.match_mask = (void *)&matcher_mask, + dv_attr.match_criteria_enable = + (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | + (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); + dv_attr.priority = 3; +#ifdef HAVE_MLX5DV_DR_ESWITCH + void *misc2_m; + if (priv->sh->config.dv_esw_en) { + /* FDB enabled reg_c_0 */ + dv_attr.match_criteria_enable |= + (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); + misc2_m = MLX5_ADDR_OF(fte_match_param, + match_m, misc_parameters_2); + MLX5_SET(fte_match_set_misc2, misc2_m, + metadata_reg_c_0, 0xffff); + } +#endif + matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, + &dv_attr, tbl); + if (matcher) { + priv->sh->misc5_cap = 1; + mlx5_glue->dv_destroy_flow_matcher(matcher); + } + mlx5_glue->dr_destroy_flow_tbl(tbl); +#else + RTE_SET_USED(priv); +#endif } +#endif /** * Initialize DR related data within private structure. @@ -221,7 +473,7 @@ static int mlx5_alloc_shared_dr(struct mlx5_priv *priv) { struct mlx5_dev_ctx_shared *sh = priv->sh; - char s[MLX5_HLIST_NAMESIZE] __rte_unused; + char s[MLX5_NAME_SIZE] __rte_unused; int err; MLX5_ASSERT(sh && sh->refcnt); @@ -230,78 +482,66 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) err = mlx5_alloc_table_hash_list(priv); if (err) goto error; + if (priv->sh->config.dv_flow_en == 2) + return 0; /* The resources below are only valid with DV support. */ #ifdef HAVE_IBV_FLOW_DV_SUPPORT - /* Init port id action cache list. */ - snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name); - mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh, - flow_dv_port_id_create_cb, - flow_dv_port_id_match_cb, - flow_dv_port_id_remove_cb); - /* Init push vlan action cache list. */ - snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name); - mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh, - flow_dv_push_vlan_create_cb, - flow_dv_push_vlan_match_cb, - flow_dv_push_vlan_remove_cb); - /* Init sample action cache list. */ - snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name); - mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh, - flow_dv_sample_create_cb, - flow_dv_sample_match_cb, - flow_dv_sample_remove_cb); - /* Init dest array action cache list. */ - snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name); - mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh, - flow_dv_dest_array_create_cb, - flow_dv_dest_array_match_cb, - flow_dv_dest_array_remove_cb); - /* Create tags hash list table. */ - snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); - sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0, - MLX5_HLIST_WRITE_MOST, - flow_dv_tag_create_cb, - flow_dv_tag_match_cb, - flow_dv_tag_remove_cb); - if (!sh->tag_table) { - DRV_LOG(ERR, "tags with hash creation failed."); - err = ENOMEM; + /* Init port id action list. */ + snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); + sh->port_id_action_list = mlx5_list_create(s, sh, true, + flow_dv_port_id_create_cb, + flow_dv_port_id_match_cb, + flow_dv_port_id_remove_cb, + flow_dv_port_id_clone_cb, + flow_dv_port_id_clone_free_cb); + if (!sh->port_id_action_list) goto error; - } - sh->tag_table->ctx = sh; - snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); - sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ, - 0, MLX5_HLIST_WRITE_MOST | - MLX5_HLIST_DIRECT_KEY, - flow_dv_modify_create_cb, - flow_dv_modify_match_cb, - flow_dv_modify_remove_cb); - if (!sh->modify_cmds) { - DRV_LOG(ERR, "hdr modify hash creation failed"); - err = ENOMEM; + /* Init push vlan action list. */ + snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); + sh->push_vlan_action_list = mlx5_list_create(s, sh, true, + flow_dv_push_vlan_create_cb, + flow_dv_push_vlan_match_cb, + flow_dv_push_vlan_remove_cb, + flow_dv_push_vlan_clone_cb, + flow_dv_push_vlan_clone_free_cb); + if (!sh->push_vlan_action_list) goto error; - } - sh->modify_cmds->ctx = sh; - snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); - sh->encaps_decaps = mlx5_hlist_create(s, - MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ, - 0, MLX5_HLIST_DIRECT_KEY | - MLX5_HLIST_WRITE_MOST, - flow_dv_encap_decap_create_cb, - flow_dv_encap_decap_match_cb, - flow_dv_encap_decap_remove_cb); - if (!sh->encaps_decaps) { - DRV_LOG(ERR, "encap decap hash creation failed"); - err = ENOMEM; + /* Init sample action list. */ + snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); + sh->sample_action_list = mlx5_list_create(s, sh, true, + flow_dv_sample_create_cb, + flow_dv_sample_match_cb, + flow_dv_sample_remove_cb, + flow_dv_sample_clone_cb, + flow_dv_sample_clone_free_cb); + if (!sh->sample_action_list) + goto error; + /* Init dest array action list. */ + snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); + sh->dest_array_list = mlx5_list_create(s, sh, true, + flow_dv_dest_array_create_cb, + flow_dv_dest_array_match_cb, + flow_dv_dest_array_remove_cb, + flow_dv_dest_array_clone_cb, + flow_dv_dest_array_clone_free_cb); + if (!sh->dest_array_list) + goto error; + /* Init shared flex parsers list, no need lcore_share */ + snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); + sh->flex_parsers_dv = mlx5_list_create(s, sh, false, + mlx5_flex_parser_create_cb, + mlx5_flex_parser_match_cb, + mlx5_flex_parser_remove_cb, + mlx5_flex_parser_clone_cb, + mlx5_flex_parser_clone_free_cb); + if (!sh->flex_parsers_dv) goto error; - } - sh->encaps_decaps->ctx = sh; #endif #ifdef HAVE_MLX5DV_DR void *domain; /* Reference counter is zero, we should initialize structures. */ - domain = mlx5_glue->dr_create_domain(sh->ctx, + domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, MLX5DV_DR_DOMAIN_TYPE_NIC_RX); if (!domain) { DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); @@ -309,7 +549,7 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) goto error; } sh->rx_domain = domain; - domain = mlx5_glue->dr_create_domain(sh->ctx, + domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, MLX5DV_DR_DOMAIN_TYPE_NIC_TX); if (!domain) { DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); @@ -318,9 +558,9 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) } sh->tx_domain = domain; #ifdef HAVE_MLX5DV_DR_ESWITCH - if (priv->config.dv_esw_en) { - domain = mlx5_glue->dr_create_domain - (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); + if (sh->config.dv_esw_en) { + domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, + MLX5DV_DR_DOMAIN_TYPE_FDB); if (!domain) { DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); err = errno; @@ -340,24 +580,36 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) goto error; } #endif - if (!sh->tunnel_hub) + if (!sh->tunnel_hub && sh->config.dv_miss_info) err = mlx5_alloc_tunnel_hub(sh); if (err) { DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); goto error; } - if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { + if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); if (sh->fdb_domain) mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); } sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); + if (!sh->config.allow_duplicate_pattern) { +#ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE + DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); +#endif + mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); + mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); + if (sh->fdb_domain) + mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); + } + + __mlx5_discovery_misc5_cap(priv); #endif /* HAVE_MLX5DV_DR */ sh->default_miss_action = mlx5_glue->dr_create_flow_action_default_miss(); if (!sh->default_miss_action) DRV_LOG(WARNING, "Default miss action is not supported."); + LIST_INIT(&sh->shared_rxqs); return 0; error: /* Rollback the created objects. */ @@ -399,6 +651,22 @@ error: sh->tunnel_hub = NULL; } mlx5_free_table_hash_list(priv); + if (sh->port_id_action_list) { + mlx5_list_destroy(sh->port_id_action_list); + sh->port_id_action_list = NULL; + } + if (sh->push_vlan_action_list) { + mlx5_list_destroy(sh->push_vlan_action_list); + sh->push_vlan_action_list = NULL; + } + if (sh->sample_action_list) { + mlx5_list_destroy(sh->sample_action_list); + sh->sample_action_list = NULL; + } + if (sh->dest_array_list) { + mlx5_list_destroy(sh->dest_array_list); + sh->dest_array_list = NULL; + } return err; } @@ -416,6 +684,7 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv) MLX5_ASSERT(sh && sh->refcnt); if (sh->refcnt > 1) return; + MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); #ifdef HAVE_MLX5DV_DR if (sh->rx_domain) { mlx5_glue->dr_destroy_domain(sh->rx_domain); @@ -460,9 +729,23 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv) mlx5_release_tunnel_hub(sh, priv->dev_port); sh->tunnel_hub = NULL; } - mlx5_cache_list_destroy(&sh->port_id_action_list); - mlx5_cache_list_destroy(&sh->push_vlan_action_list); mlx5_free_table_hash_list(priv); + if (sh->port_id_action_list) { + mlx5_list_destroy(sh->port_id_action_list); + sh->port_id_action_list = NULL; + } + if (sh->push_vlan_action_list) { + mlx5_list_destroy(sh->push_vlan_action_list); + sh->push_vlan_action_list = NULL; + } + if (sh->sample_action_list) { + mlx5_list_destroy(sh->sample_action_list); + sh->sample_action_list = NULL; + } + if (sh->dest_array_list) { + mlx5_list_destroy(sh->dest_array_list); + sh->dest_array_list = NULL; + } } /** @@ -540,10 +823,6 @@ mlx5_init_once(void) case RTE_PROC_PRIMARY: if (sd->init_done) break; - LIST_INIT(&sd->mem_event_cb_list); - rte_rwlock_init(&sd->mem_event_rwlock); - rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", - mlx5_mr_mem_event_cb, NULL); ret = mlx5_mp_init_primary(MLX5_MP_NAME, mlx5_mp_os_primary_handle); if (ret) @@ -569,91 +848,33 @@ out: } /** - * Create the Tx queue DevX/Verbs object. - * - * @param dev - * Pointer to Ethernet device. - * @param idx - * Queue index in DPDK Tx queue array. - * - * @return - * 0 on success, a negative errno value otherwise and rte_errno is set. - */ -static int -mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx) -{ - struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; - struct mlx5_txq_ctrl *txq_ctrl = - container_of(txq_data, struct mlx5_txq_ctrl, txq); - - if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) - return mlx5_txq_devx_obj_new(dev, idx); -#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET - if (!priv->config.dv_esw_en) - return mlx5_txq_devx_obj_new(dev, idx); -#endif - return mlx5_txq_ibv_obj_new(dev, idx); -} - -/** - * Release an Tx DevX/verbs queue object. - * - * @param txq_obj - * DevX/Verbs Tx queue object. - */ -static void -mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj) -{ - if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) { - mlx5_txq_devx_obj_release(txq_obj); - return; - } -#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET - if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) { - mlx5_txq_devx_obj_release(txq_obj); - return; - } -#endif - mlx5_txq_ibv_obj_release(txq_obj); -} - -/** - * DV flow counter mode detect and config. + * DR flow drop action support detect. * * @param dev * Pointer to rte_eth_dev structure. * */ static void -mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) +mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) { -#ifdef HAVE_IBV_FLOW_DV_SUPPORT +#ifdef HAVE_MLX5DV_DR struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_dev_ctx_shared *sh = priv->sh; - bool fallback; -#ifndef HAVE_IBV_DEVX_ASYNC - fallback = true; -#else - fallback = false; - if (!priv->config.devx || !priv->config.dv_flow_en || - !priv->config.hca_attr.flow_counters_dump || - !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || - (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) - fallback = true; -#endif - if (fallback) - DRV_LOG(INFO, "Use fall-back DV counter management. Flow " - "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", - priv->config.hca_attr.flow_counters_dump, - priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); - /* Initialize fallback mode only on the port initializes sh. */ - if (sh->refcnt == 1) - sh->cmng.counter_fallback = fallback; - else if (fallback != sh->cmng.counter_fallback) - DRV_LOG(WARNING, "Port %d in sh has different fallback mode " - "with others:%d.", PORT_ID(priv), fallback); + if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) + return; + /** + * DR supports drop action placeholder when it is supported; + * otherwise, use the queue drop action. + */ + if (!priv->sh->drop_action_check_flag) { + if (!mlx5_flow_discover_dr_action_support(dev)) + priv->sh->dr_drop_action_en = 1; + priv->sh->drop_action_check_flag = 1; + } + if (priv->sh->dr_drop_action_en) + priv->root_drop_action = priv->sh->dr_drop_action; + else + priv->root_drop_action = priv->drop_queue.hrxq->action; #endif } @@ -661,7 +882,7 @@ static void mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) { struct mlx5_priv *priv = dev->data->dev_private; - void *ctx = priv->sh->ctx; + void *ctx = priv->sh->cdev->ctx; priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); if (!priv->q_counters) { @@ -678,7 +899,7 @@ mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) .wq_type = IBV_WQT_RQ, .max_wr = 1, .max_sge = 1, - .pd = priv->sh->pd, + .pd = priv->sh->cdev->pd, .cq = cq, }); if (wq) { @@ -773,7 +994,6 @@ mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, return false; } - /** * Spawn an Ethernet device from Verbs information. * @@ -781,10 +1001,10 @@ mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, * Backing DPDK device. * @param spawn * Verbs device parameters (name, port, switch_info) to spawn. - * @param config - * Device configuration parameters. - * @param config + * @param eth_da * Device arguments. + * @param mkvlist + * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. * * @return * A valid Ethernet device object on success, NULL otherwise and rte_errno @@ -796,33 +1016,22 @@ mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, static struct rte_eth_dev * mlx5_dev_spawn(struct rte_device *dpdk_dev, struct mlx5_dev_spawn_data *spawn, - struct mlx5_dev_config *config, - struct rte_eth_devargs *eth_da) + struct rte_eth_devargs *eth_da, + struct mlx5_kvargs_ctrl *mkvlist) { const struct mlx5_switch_info *switch_info = &spawn->info; struct mlx5_dev_ctx_shared *sh = NULL; - struct ibv_port_attr port_attr; - struct mlx5dv_context dv_attr = { .comp_mask = 0 }; + struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; struct rte_eth_dev *eth_dev = NULL; struct mlx5_priv *priv = NULL; int err = 0; - unsigned int hw_padding = 0; - unsigned int mps; - unsigned int tunnel_en = 0; - unsigned int mpls_en = 0; - unsigned int swp = 0; - unsigned int mprq = 0; - unsigned int mprq_min_stride_size_n = 0; - unsigned int mprq_max_stride_size_n = 0; - unsigned int mprq_min_stride_num_n = 0; - unsigned int mprq_max_stride_num_n = 0; struct rte_ether_addr mac; char name[RTE_ETH_NAME_MAX_LEN]; int own_domain_id = 0; uint16_t port_id; -#ifdef HAVE_MLX5DV_DR_DEVX_PORT - struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; -#endif + struct mlx5_port_info vport_info = { .query_flags = 0 }; + int nl_rdma; + int i; /* Determine if this port representor is supposed to be spawned. */ if (switch_info->representor && dpdk_dev->devargs && @@ -843,12 +1052,10 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, /* Bonding device. */ if (!switch_info->representor) { err = snprintf(name, sizeof(name), "%s_%s", - dpdk_dev->name, - mlx5_os_get_dev_device_name(spawn->phys_dev)); + dpdk_dev->name, spawn->phys_dev_name); } else { err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", - dpdk_dev->name, - mlx5_os_get_dev_device_name(spawn->phys_dev), + dpdk_dev->name, spawn->phys_dev_name, switch_info->ctrl_num, switch_info->pf_num, switch_info->name_type == @@ -860,6 +1067,12 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, DRV_LOG(WARNING, "device name overflow %s", name); /* check if the device is already spawned */ if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { + /* + * When device is already spawned, its devargs should be set + * as used. otherwise, mlx5_kvargs_validate() will fail. + */ + if (mkvlist) + mlx5_port_args_set_used(name, port_id, mkvlist); rte_errno = EEXIST; return NULL; } @@ -880,8 +1093,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, err = mlx5_proc_priv_init(eth_dev); if (err) return NULL; - mp_id.port_id = eth_dev->data->port_id; - strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); + mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); /* Receive command fd from primary process */ err = mlx5_mp_req_verbs_cmd_fd(&mp_id); if (err < 0) @@ -902,133 +1114,39 @@ err_secondary: mlx5_dev_close(eth_dev); return NULL; } - /* - * Some parameters ("tx_db_nc" in particularly) are needed in - * advance to create dv/verbs device context. We proceed the - * devargs here to get ones, and later proceed devargs again - * to override some hardware settings. - */ - err = mlx5_args(config, dpdk_dev->devargs); - if (err) { - err = rte_errno; - DRV_LOG(ERR, "failed to process device arguments: %s", - strerror(rte_errno)); - goto error; - } - if (config->dv_miss_info) { - if (switch_info->master || switch_info->representor) - config->dv_xmeta_en = MLX5_XMETA_MODE_META16; - } - mlx5_malloc_mem_select(config->sys_mem_en); - sh = mlx5_alloc_shared_dev_ctx(spawn, config); + sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); if (!sh) return NULL; - config->devx = sh->devx; -#ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR - config->dest_tir = 1; -#endif -#ifdef HAVE_IBV_MLX5_MOD_SWP - dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; -#endif - /* - * Multi-packet send is supported by ConnectX-4 Lx PF as well - * as all ConnectX-5 devices. - */ -#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT - dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; -#endif -#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT - dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; -#endif - mlx5_glue->dv_query_device(sh->ctx, &dv_attr); - if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { - if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { - DRV_LOG(DEBUG, "enhanced MPW is supported"); - mps = MLX5_MPW_ENHANCED; - } else { - DRV_LOG(DEBUG, "MPW is supported"); - mps = MLX5_MPW; - } - } else { - DRV_LOG(DEBUG, "MPW isn't supported"); - mps = MLX5_MPW_DISABLED; - } -#ifdef HAVE_IBV_MLX5_MOD_SWP - if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) - swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; - DRV_LOG(DEBUG, "SWP support: %u", swp); -#endif - config->swp = !!swp; -#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT - if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { - struct mlx5dv_striding_rq_caps mprq_caps = - dv_attr.striding_rq_caps; - - DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", - mprq_caps.min_single_stride_log_num_of_bytes); - DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", - mprq_caps.max_single_stride_log_num_of_bytes); - DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", - mprq_caps.min_single_wqe_log_num_of_strides); - DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", - mprq_caps.max_single_wqe_log_num_of_strides); - DRV_LOG(DEBUG, "\tsupported_qpts: %d", - mprq_caps.supported_qpts); - DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); - mprq = 1; - mprq_min_stride_size_n = - mprq_caps.min_single_stride_log_num_of_bytes; - mprq_max_stride_size_n = - mprq_caps.max_single_stride_log_num_of_bytes; - mprq_min_stride_num_n = - mprq_caps.min_single_wqe_log_num_of_strides; - mprq_max_stride_num_n = - mprq_caps.max_single_wqe_log_num_of_strides; - } -#endif - /* Rx CQE compression is enabled by default. */ - config->cqe_comp = 1; -#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT - if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { - tunnel_en = ((dv_attr.tunnel_offloads_caps & - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && - (dv_attr.tunnel_offloads_caps & - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && - (dv_attr.tunnel_offloads_caps & - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); - } - DRV_LOG(DEBUG, "tunnel offloading is %ssupported", - tunnel_en ? "" : "not "); -#else - DRV_LOG(WARNING, - "tunnel offloading disabled due to old OFED/rdma-core version"); -#endif - config->tunnel_en = tunnel_en; -#ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT - mpls_en = ((dv_attr.tunnel_offloads_caps & - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && - (dv_attr.tunnel_offloads_caps & - MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); - DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", - mpls_en ? "" : "not "); -#else - DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" - " old OFED/rdma-core version or firmware configuration"); -#endif - config->mpls_en = mpls_en; + nl_rdma = mlx5_nl_init(NETLINK_RDMA); /* Check port status. */ - err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); - if (err) { - DRV_LOG(ERR, "port query failed: %s", strerror(err)); - goto error; - } - if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { - DRV_LOG(ERR, "port is not configured in Ethernet mode"); - err = EINVAL; - goto error; + if (spawn->phys_port <= UINT8_MAX) { + /* Legacy Verbs api only support u8 port number. */ + err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, + &port_attr); + if (err) { + DRV_LOG(ERR, "port query failed: %s", strerror(err)); + goto error; + } + if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { + DRV_LOG(ERR, "port is not configured in Ethernet mode"); + err = EINVAL; + goto error; + } + } else if (nl_rdma >= 0) { + /* IB doesn't allow more than 255 ports, must be Ethernet. */ + err = mlx5_nl_port_state(nl_rdma, + spawn->phys_dev_name, + spawn->phys_port); + if (err < 0) { + DRV_LOG(INFO, "Failed to get netlink port state: %s", + strerror(rte_errno)); + err = -rte_errno; + goto error; + } + port_attr.state = (enum ibv_port_state)err; } if (port_attr.state != IBV_PORT_ACTIVE) - DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", + DRV_LOG(INFO, "port is not active: \"%s\" (%d)", mlx5_glue->port_state_str(port_attr.state), port_attr.state); /* Allocate private eth device data. */ @@ -1040,12 +1158,28 @@ err_secondary: err = ENOMEM; goto error; } + /* + * When user configures remote PD and CTX and device creates RxQ by + * DevX, external RxQ is both supported and requested. + */ + if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { + priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, + sizeof(struct mlx5_external_rxq) * + MLX5_MAX_EXT_RX_QUEUES, 0, + SOCKET_ID_ANY); + if (priv->ext_rxqs == NULL) { + DRV_LOG(ERR, "Fail to allocate external RxQ array."); + err = ENOMEM; + goto error; + } + DRV_LOG(DEBUG, "External RxQ is supported."); + } priv->sh = sh; priv->dev_port = spawn->phys_port; priv->pci_dev = spawn->pci_dev; priv->mtu = RTE_ETHER_MTU; /* Some internal functions rely on Netlink sockets, open them now. */ - priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); + priv->nl_socket_rdma = nl_rdma; priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); priv->representor = !!switch_info->representor; priv->master = !!switch_info->master; @@ -1053,84 +1187,79 @@ err_secondary: priv->vport_meta_tag = 0; priv->vport_meta_mask = 0; priv->pf_bond = spawn->pf_bond; -#ifdef HAVE_MLX5DV_DR_DEVX_PORT + + DRV_LOG(DEBUG, + "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", + priv->dev_port, dpdk_dev->bus->name, + priv->pci_dev ? priv->pci_dev->name : "NONE", + priv->master, priv->representor, priv->pf_bond); + /* - * The DevX port query API is implemented. E-Switch may use - * either vport or reg_c[0] metadata register to match on - * vport index. The engaged part of metadata register is - * defined by mask. + * If we have E-Switch we should determine the vport attributes. + * E-Switch may use either source vport field or reg_c[0] metadata + * register to match on vport index. The engaged part of metadata + * register is defined by mask. */ - if (switch_info->representor || switch_info->master) { - devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | - MLX5DV_DEVX_PORT_MATCH_REG_C_0; - err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, - &devx_port); + if (sh->esw_mode) { + err = mlx5_glue->devx_port_query(sh->cdev->ctx, + spawn->phys_port, + &vport_info); if (err) { DRV_LOG(WARNING, - "can't query devx port %d on device %s", - spawn->phys_port, - mlx5_os_get_dev_device_name(spawn->phys_dev)); - devx_port.comp_mask = 0; + "Cannot query devx port %d on device %s", + spawn->phys_port, spawn->phys_dev_name); + vport_info.query_flags = 0; } } - if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { - priv->vport_meta_tag = devx_port.reg_c_0.value; - priv->vport_meta_mask = devx_port.reg_c_0.mask; + if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { + priv->vport_meta_tag = vport_info.vport_meta_tag; + priv->vport_meta_mask = vport_info.vport_meta_mask; if (!priv->vport_meta_mask) { - DRV_LOG(ERR, "vport zero mask for port %d" - " on bonding device %s", - spawn->phys_port, - mlx5_os_get_dev_device_name - (spawn->phys_dev)); + DRV_LOG(ERR, + "vport zero mask for port %d on bonding device %s", + spawn->phys_port, spawn->phys_dev_name); err = ENOTSUP; goto error; } if (priv->vport_meta_tag & ~priv->vport_meta_mask) { - DRV_LOG(ERR, "invalid vport tag for port %d" - " on bonding device %s", - spawn->phys_port, - mlx5_os_get_dev_device_name - (spawn->phys_dev)); + DRV_LOG(ERR, + "Invalid vport tag for port %d on bonding device %s", + spawn->phys_port, spawn->phys_dev_name); err = ENOTSUP; goto error; } } - if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { - priv->vport_id = devx_port.vport_num; - } else if (spawn->pf_bond >= 0) { - DRV_LOG(ERR, "can't deduce vport index for port %d" - " on bonding device %s", - spawn->phys_port, - mlx5_os_get_dev_device_name(spawn->phys_dev)); + if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { + priv->vport_id = vport_info.vport_id; + } else if (spawn->pf_bond >= 0 && sh->esw_mode) { + DRV_LOG(ERR, + "Cannot deduce vport index for port %d on bonding device %s", + spawn->phys_port, spawn->phys_dev_name); err = ENOTSUP; goto error; } else { - /* Suppose vport index in compatible way. */ + /* + * Suppose vport index in compatible way. Kernel/rdma_core + * support single E-Switch per PF configurations only and + * vport_id field contains the vport index for associated VF, + * which is deduced from representor port name. + * For example, let's have the IB device port 10, it has + * attached network device eth0, which has port name attribute + * pf0vf2, we can deduce the VF number as 2, and set vport index + * as 3 (2+1). This assigning schema should be changed if the + * multiple E-Switch instances per PF configurations or/and PCI + * subfunctions are added. + */ priv->vport_id = switch_info->representor ? switch_info->port_name + 1 : -1; } -#else - /* - * Kernel/rdma_core support single E-Switch per PF configurations - * only and vport_id field contains the vport index for - * associated VF, which is deduced from representor port name. - * For example, let's have the IB device port 10, it has - * attached network device eth0, which has port name attribute - * pf0vf2, we can deduce the VF number as 2, and set vport index - * as 3 (2+1). This assigning schema should be changed if the - * multiple E-Switch instances per PF configurations or/and PCI - * subfunctions are added. - */ - priv->vport_id = switch_info->representor ? - switch_info->port_name + 1 : -1; -#endif priv->representor_id = mlx5_representor_id_encode(switch_info, eth_da->type); /* * Look for sibling devices in order to reuse their switch domain * if any, otherwise allocate one. */ - MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { + MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { const struct mlx5_priv *opriv = rte_eth_devices[port_id].data->dev_private; @@ -1140,6 +1269,8 @@ err_secondary: RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) continue; priv->domain_id = opriv->domain_id; + DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", + priv->dev_port, priv->domain_id); break; } if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { @@ -1151,116 +1282,19 @@ err_secondary: goto error; } own_domain_id = 1; - } - /* Override some values set by hardware configuration. */ - mlx5_args(config, dpdk_dev->devargs); - err = mlx5_dev_check_sibling_config(priv, config); - if (err) - goto error; - config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & - IBV_DEVICE_RAW_IP_CSUM); - DRV_LOG(DEBUG, "checksum offloading is %ssupported", - (config->hw_csum ? "" : "not ")); -#if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ - !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) - DRV_LOG(DEBUG, "counters are not supported"); -#endif -#if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) - if (config->dv_flow_en) { - DRV_LOG(WARNING, "DV flow is not supported"); - config->dv_flow_en = 0; - } -#endif - config->ind_table_max_size = - sh->device_attr.max_rwq_indirection_table_size; - /* - * Remove this check once DPDK supports larger/variable - * indirection tables. - */ - if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) - config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; - DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", - config->ind_table_max_size); - config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & - IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); - DRV_LOG(DEBUG, "VLAN stripping is %ssupported", - (config->hw_vlan_strip ? "" : "not ")); - config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & - IBV_RAW_PACKET_CAP_SCATTER_FCS); -#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) - hw_padding = !!sh->device_attr.rx_pad_end_addr_align; -#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) - hw_padding = !!(sh->device_attr.device_cap_flags_ex & - IBV_DEVICE_PCI_WRITE_END_PADDING); -#endif - if (config->hw_padding && !hw_padding) { - DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); - config->hw_padding = 0; - } else if (config->hw_padding) { - DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); - } - config->tso = (sh->device_attr.max_tso > 0 && - (sh->device_attr.tso_supported_qpts & - (1 << IBV_QPT_RAW_PACKET))); - if (config->tso) - config->tso_max_payload_sz = sh->device_attr.max_tso; - /* - * MPW is disabled by default, while the Enhanced MPW is enabled - * by default. - */ - if (config->mps == MLX5_ARG_UNSET) - config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : - MLX5_MPW_DISABLED; - else - config->mps = config->mps ? mps : MLX5_MPW_DISABLED; - DRV_LOG(INFO, "%sMPS is %s", - config->mps == MLX5_MPW_ENHANCED ? "enhanced " : - config->mps == MLX5_MPW ? "legacy " : "", - config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); - if (config->devx) { - err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); - if (err) { - err = -err; - goto error; - } - /* Check relax ordering support. */ - if (!haswell_broadwell_cpu) { - sh->cmng.relaxed_ordering_write = - config->hca_attr.relaxed_ordering_write; - sh->cmng.relaxed_ordering_read = - config->hca_attr.relaxed_ordering_read; - } else { - sh->cmng.relaxed_ordering_read = 0; - sh->cmng.relaxed_ordering_write = 0; - } - sh->rq_ts_format = config->hca_attr.rq_ts_format; - sh->sq_ts_format = config->hca_attr.sq_ts_format; - sh->qp_ts_format = config->hca_attr.qp_ts_format; - /* Check for LRO support. */ - if (config->dest_tir && config->hca_attr.lro_cap && - config->dv_flow_en) { - /* TBD check tunnel lro caps. */ - config->lro.supported = config->hca_attr.lro_cap; - DRV_LOG(DEBUG, "Device supports LRO"); - /* - * If LRO timeout is not configured by application, - * use the minimal supported value. - */ - if (!config->lro.timeout) - config->lro.timeout = - config->hca_attr.lro_timer_supported_periods[0]; - DRV_LOG(DEBUG, "LRO session timeout set to %d usec", - config->lro.timeout); - DRV_LOG(DEBUG, "LRO minimal size of TCP segment " - "required for coalescing is %d bytes", - config->hca_attr.lro_min_mss_size); - } -#if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) - if (config->hca_attr.qos.sup && - config->hca_attr.qos.flow_meter_old && - config->dv_flow_en) { - uint8_t reg_c_mask = - config->hca_attr.qos.flow_meter_reg_c_ids; + DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", + priv->dev_port, priv->domain_id); + } + if (sh->cdev->config.devx) { + struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; + + sh->steering_format_version = hca_attr->steering_format_version; +#if defined(HAVE_MLX5DV_DR) && \ + (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ + defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) + if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && + sh->config.dv_flow_en) { + uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; /* * Meter needs two REG_C's for color match and pre-sfx * flow match. Here get the REG_C for color match. @@ -1284,16 +1318,34 @@ err_secondary: priv->mtr_color_reg = ffs(reg_c_mask) - 1 + REG_C_0; priv->mtr_en = 1; - priv->mtr_reg_share = - config->hca_attr.qos.flow_meter; + priv->mtr_reg_share = hca_attr->qos.flow_meter; DRV_LOG(DEBUG, "The REG_C meter uses is %d", priv->mtr_color_reg); } } + if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { + uint32_t log_obj_size = + rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); + if (log_obj_size >= + hca_attr->qos.log_meter_aso_granularity && + log_obj_size <= + hca_attr->qos.log_meter_aso_max_alloc) + sh->meter_aso_en = 1; + } + if (priv->mtr_en) { + err = mlx5_aso_flow_mtrs_mng_init(priv->sh); + if (err) { + err = -err; + goto error; + } + } + if (hca_attr->flow.tunnel_header_0_1) + sh->tunnel_header_0_1 = 1; + if (hca_attr->flow.tunnel_header_2_3) + sh->tunnel_header_2_3 = 1; #endif #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO - if (config->hca_attr.flow_hit_aso && - priv->mtr_color_reg == REG_C_3) { + if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { sh->flow_hit_aso_en = 1; err = mlx5_flow_aso_age_mng_init(sh); if (err) { @@ -1303,14 +1355,26 @@ err_secondary: DRV_LOG(DEBUG, "Flow Hit ASO is supported."); } #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ +#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ + defined(HAVE_MLX5_DR_ACTION_ASO_CT) + if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { + err = mlx5_flow_aso_ct_mng_init(sh); + if (err) { + err = -err; + goto error; + } + DRV_LOG(DEBUG, "CT ASO is supported."); + sh->ct_aso_en = 1; + } +#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) - if (config->hca_attr.log_max_ft_sampler_num > 0 && - config->dv_flow_en) { + if (hca_attr->log_max_ft_sampler_num > 0 && + sh->config.dv_flow_en) { priv->sampler_en = 1; DRV_LOG(DEBUG, "Sampler enabled!"); } else { priv->sampler_en = 0; - if (!config->hca_attr.log_max_ft_sampler_num) + if (!hca_attr->log_max_ft_sampler_num) DRV_LOG(WARNING, "No available register for sampler."); else @@ -1318,154 +1382,14 @@ err_secondary: } #endif } - if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 && - !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) { - DRV_LOG(WARNING, "Rx CQE 128B compression is not supported"); - config->cqe_comp = 0; - } - if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX && - (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) { - DRV_LOG(WARNING, "Flow Tag CQE compression" - " format isn't supported."); - config->cqe_comp = 0; - } - if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX && - (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) { - DRV_LOG(WARNING, "L3/L4 Header CQE compression" - " format isn't supported."); - config->cqe_comp = 0; - } - DRV_LOG(DEBUG, "Rx CQE compression is %ssupported", - config->cqe_comp ? "" : "not "); - if (config->tx_pp) { - DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", - config->hca_attr.dev_freq_khz); - DRV_LOG(DEBUG, "Packet pacing is %ssupported", - config->hca_attr.qos.packet_pacing ? "" : "not "); - DRV_LOG(DEBUG, "Cross channel ops are %ssupported", - config->hca_attr.cross_channel ? "" : "not "); - DRV_LOG(DEBUG, "WQE index ignore is %ssupported", - config->hca_attr.wqe_index_ignore ? "" : "not "); - DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", - config->hca_attr.non_wire_sq ? "" : "not "); - DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", - config->hca_attr.log_max_static_sq_wq ? "" : "not ", - config->hca_attr.log_max_static_sq_wq); - DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", - config->hca_attr.qos.wqe_rate_pp ? "" : "not "); - if (!config->devx) { - DRV_LOG(ERR, "DevX is required for packet pacing"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.qos.packet_pacing) { - DRV_LOG(ERR, "Packet pacing is not supported"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.cross_channel) { - DRV_LOG(ERR, "Cross channel operations are" - " required for packet pacing"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.wqe_index_ignore) { - DRV_LOG(ERR, "WQE index ignore feature is" - " required for packet pacing"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.non_wire_sq) { - DRV_LOG(ERR, "Non-wire SQ feature is" - " required for packet pacing"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.log_max_static_sq_wq) { - DRV_LOG(ERR, "Static WQE SQ feature is" - " required for packet pacing"); - err = ENODEV; - goto error; - } - if (!config->hca_attr.qos.wqe_rate_pp) { - DRV_LOG(ERR, "WQE rate mode is required" - " for packet pacing"); - err = ENODEV; - goto error; - } -#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET - DRV_LOG(ERR, "DevX does not provide UAR offset," - " can't create queues for packet pacing"); - err = ENODEV; + /* Process parameters and store port configuration on priv structure. */ + err = mlx5_port_args_config(priv, mkvlist, &priv->config); + if (err) { + err = rte_errno; + DRV_LOG(ERR, "Failed to process port configure: %s", + strerror(rte_errno)); goto error; -#endif - } - if (config->devx) { - uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; - - err = config->hca_attr.access_register_user ? - mlx5_devx_cmd_register_read - (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, - reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; - if (!err) { - uint32_t ts_mode; - - /* MTUTC register is read successfully. */ - ts_mode = MLX5_GET(register_mtutc, reg, - time_stamp_mode); - if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) - config->rt_timestamp = 1; - } else { - /* Kernel does not support register reading. */ - if (config->hca_attr.dev_freq_khz == - (NS_PER_S / MS_PER_S)) - config->rt_timestamp = 1; - } } - /* - * If HW has bug working with tunnel packet decapsulation and - * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip - * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. - */ - if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) - config->hw_fcs_strip = 0; - DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", - (config->hw_fcs_strip ? "" : "not ")); - if (config->mprq.enabled && mprq) { - if (config->mprq.stride_num_n && - (config->mprq.stride_num_n > mprq_max_stride_num_n || - config->mprq.stride_num_n < mprq_min_stride_num_n)) { - config->mprq.stride_num_n = - RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, - mprq_min_stride_num_n), - mprq_max_stride_num_n); - DRV_LOG(WARNING, - "the number of strides" - " for Multi-Packet RQ is out of range," - " setting default value (%u)", - 1 << config->mprq.stride_num_n); - } - if (config->mprq.stride_size_n && - (config->mprq.stride_size_n > mprq_max_stride_size_n || - config->mprq.stride_size_n < mprq_min_stride_size_n)) { - config->mprq.stride_size_n = - RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, - mprq_min_stride_size_n), - mprq_max_stride_size_n); - DRV_LOG(WARNING, - "the size of a stride" - " for Multi-Packet RQ is out of range," - " setting default value (%u)", - 1 << config->mprq.stride_size_n); - } - config->mprq.min_stride_size_n = mprq_min_stride_size_n; - config->mprq.max_stride_size_n = mprq_max_stride_size_n; - } else if (config->mprq.enabled && !mprq) { - DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); - config->mprq.enabled = 0; - } - if (config->max_dump_files_num == 0) - config->max_dump_files_num = 128; eth_dev = rte_eth_dev_allocate(name); if (eth_dev == NULL) { DRV_LOG(ERR, "can not allocate rte ethdev"); @@ -1475,6 +1399,19 @@ err_secondary: if (priv->representor) { eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; eth_dev->data->representor_id = priv->representor_id; + MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { + struct mlx5_priv *opriv = + rte_eth_devices[port_id].data->dev_private; + if (opriv && + opriv->master && + opriv->domain_id == priv->domain_id && + opriv->sh == priv->sh) { + eth_dev->data->backer_port_id = port_id; + break; + } + } + if (port_id >= RTE_MAX_ETHPORTS) + eth_dev->data->backer_port_id = eth_dev->data->port_id; } priv->mp_id.port_id = eth_dev->data->port_id; strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); @@ -1485,6 +1422,7 @@ err_secondary: */ MLX5_ASSERT(spawn->ifindex); priv->if_index = spawn->ifindex; + priv->lag_affinity_idx = sh->refcnt - 1; eth_dev->data->dev_private = priv; priv->dev_data = eth_dev->data; eth_dev->data->mac_addrs = priv->mac; @@ -1500,11 +1438,8 @@ err_secondary: goto error; } DRV_LOG(INFO, - "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", - eth_dev->data->port_id, - mac.addr_bytes[0], mac.addr_bytes[1], - mac.addr_bytes[2], mac.addr_bytes[3], - mac.addr_bytes[4], mac.addr_bytes[5]); + "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, + eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); #ifdef RTE_LIBRTE_MLX5_DEBUG { char ifname[MLX5_NAMESIZE]; @@ -1526,32 +1461,25 @@ err_secondary: DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, priv->mtu); /* Initialize burst functions to prevent crashes before link-up. */ - eth_dev->rx_pkt_burst = removed_rx_burst; - eth_dev->tx_pkt_burst = removed_tx_burst; + eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; + eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; eth_dev->dev_ops = &mlx5_dev_ops; eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; eth_dev->rx_queue_count = mlx5_rx_queue_count; /* Register MAC address. */ claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); - if (config->vf && config->vf_nl_en) + if (sh->dev_cap.vf && sh->config.vf_nl_en) mlx5_nl_mac_addr_sync(priv->nl_socket_route, mlx5_ifindex(eth_dev), eth_dev->data->mac_addrs, MLX5_MAX_MAC_ADDRESSES); - priv->flows = 0; priv->ctrl_flows = 0; rte_spinlock_init(&priv->flow_list_lock); TAILQ_INIT(&priv->flow_meters); - TAILQ_INIT(&priv->flow_meter_profiles); - /* Hint libmlx5 to use PMD allocator for data plane resources */ - mlx5_glue->dv_set_context_attr(sh->ctx, - MLX5DV_CTX_ATTR_BUF_ALLOCATORS, - (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ - .alloc = &mlx5_alloc_verbs_buf, - .free = &mlx5_free_verbs_buf, - .data = sh, - })); + priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); + if (!priv->mtr_profile_tbl) + goto error; /* Bring Ethernet device up. */ DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", eth_dev->data->port_id); @@ -1562,111 +1490,129 @@ err_secondary: * Verbs context returned by ibv_open_device(). */ mlx5_link_update(eth_dev, 0); -#ifdef HAVE_MLX5DV_DR_ESWITCH - if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && - (switch_info->representor || switch_info->master))) - config->dv_esw_en = 0; -#else - config->dv_esw_en = 0; -#endif - /* Detect minimal data bytes to inline. */ - mlx5_set_min_inline(spawn, config); - /* Store device configuration on private structure. */ - priv->config = *config; + for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { + icfg[i].release_mem_en = !!sh->config.reclaim_mode; + if (sh->config.reclaim_mode) + icfg[i].per_core_cache = 0; + priv->flows[i] = mlx5_ipool_create(&icfg[i]); + if (!priv->flows[i]) + goto error; + } /* Create context for virtual machine VLAN workaround. */ priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); - if (config->dv_flow_en) { + if (sh->config.dv_flow_en) { err = mlx5_alloc_shared_dr(priv); if (err) goto error; + if (mlx5_flex_item_port_init(eth_dev) < 0) + goto error; } - if (config->devx && config->dv_flow_en && config->dest_tir) { + if (mlx5_devx_obj_ops_en(sh)) { priv->obj_ops = devx_obj_ops; - priv->obj_ops.drop_action_create = - ibv_obj_ops.drop_action_create; - priv->obj_ops.drop_action_destroy = - ibv_obj_ops.drop_action_destroy; -#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET - priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; -#else - if (config->dv_esw_en) - priv->obj_ops.txq_obj_modify = - ibv_obj_ops.txq_obj_modify; -#endif - /* Use specific wrappers for Tx object. */ - priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; - priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; mlx5_queue_counter_id_prepare(eth_dev); - + priv->obj_ops.lb_dummy_queue_create = + mlx5_rxq_ibv_obj_dummy_lb_create; + priv->obj_ops.lb_dummy_queue_release = + mlx5_rxq_ibv_obj_dummy_lb_release; + } else if (spawn->max_port > UINT8_MAX) { + /* Verbs can't support ports larger than 255 by design. */ + DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); + err = ENOTSUP; + goto error; } else { priv->obj_ops = ibv_obj_ops; } + if (sh->config.tx_pp && + priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { + /* + * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support + * packet pacing and already checked above. + * Hence, we should only make sure the SQs will be created + * with DevX, not with Verbs. + * Verbs allocates the SQ UAR on its own and it can't be shared + * with Clock Queue UAR as required for Tx scheduling. + */ + DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); + err = ENODEV; + goto error; + } priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); if (!priv->drop_queue.hrxq) goto error; - /* Supported Verbs flow priority number detection. */ - err = mlx5_flow_discover_priorities(eth_dev); + priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, + mlx5_hrxq_create_cb, + mlx5_hrxq_match_cb, + mlx5_hrxq_remove_cb, + mlx5_hrxq_clone_cb, + mlx5_hrxq_clone_free_cb); + if (!priv->hrxqs) + goto error; + rte_rwlock_init(&priv->ind_tbls_lock); + if (priv->sh->config.dv_flow_en == 2) + return eth_dev; + /* Port representor shares the same max priority with pf port. */ + if (!priv->sh->flow_priority_check_flag) { + /* Supported Verbs flow priority number detection. */ + err = mlx5_flow_discover_priorities(eth_dev); + priv->sh->flow_max_priority = err; + priv->sh->flow_priority_check_flag = 1; + } else { + err = priv->sh->flow_max_priority; + } if (err < 0) { err = -err; goto error; } - priv->config.flow_prio = err; - if (!priv->config.dv_esw_en && - priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { - DRV_LOG(WARNING, "metadata mode %u is not supported " - "(no E-Switch)", priv->config.dv_xmeta_en); - priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; - } mlx5_set_metadata_mask(eth_dev); - if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && + if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && !priv->sh->dv_regc0_mask) { DRV_LOG(ERR, "metadata mode %u is not supported " "(no metadata reg_c[0] is available)", - priv->config.dv_xmeta_en); + sh->config.dv_xmeta_en); err = ENOTSUP; goto error; } - mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev, - mlx5_hrxq_create_cb, - mlx5_hrxq_match_cb, - mlx5_hrxq_remove_cb); /* Query availability of metadata reg_c's. */ - err = mlx5_flow_discover_mreg_c(eth_dev); - if (err < 0) { - err = -err; - goto error; + if (!priv->sh->metadata_regc_check_flag) { + err = mlx5_flow_discover_mreg_c(eth_dev); + if (err < 0) { + err = -err; + goto error; + } } if (!mlx5_flow_ext_mreg_supported(eth_dev)) { DRV_LOG(DEBUG, "port %u extensive metadata register is not supported", eth_dev->data->port_id); - if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { + if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { DRV_LOG(ERR, "metadata mode %u is not supported " "(no metadata registers available)", - priv->config.dv_xmeta_en); + sh->config.dv_xmeta_en); err = ENOTSUP; goto error; } } - if (priv->config.dv_flow_en && - priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && + if (sh->config.dv_flow_en && + sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && mlx5_flow_ext_mreg_supported(eth_dev) && priv->sh->dv_regc0_mask) { priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, MLX5_FLOW_MREG_HTABLE_SZ, - 0, 0, + false, true, eth_dev, flow_dv_mreg_create_cb, flow_dv_mreg_match_cb, - flow_dv_mreg_remove_cb); + flow_dv_mreg_remove_cb, + flow_dv_mreg_clone_cb, + flow_dv_mreg_clone_free_cb); if (!priv->mreg_cp_tbl) { err = ENOMEM; goto error; } - priv->mreg_cp_tbl->ctx = eth_dev; } rte_spinlock_init(&priv->shared_act_sl); mlx5_flow_counter_mode_config(eth_dev); - if (priv->config.dv_flow_en) + mlx5_flow_drop_action_config(eth_dev); + if (sh->config.dv_flow_en) eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; return eth_dev; error: @@ -1677,15 +1623,19 @@ error: mlx5_os_free_shared_dr(priv); if (priv->nl_socket_route >= 0) close(priv->nl_socket_route); - if (priv->nl_socket_rdma >= 0) - close(priv->nl_socket_rdma); if (priv->vmwa_context) mlx5_vlan_vmwa_exit(priv->vmwa_context); if (eth_dev && priv->drop_queue.hrxq) mlx5_drop_action_destroy(eth_dev); + if (priv->mtr_profile_tbl) + mlx5_l3t_destroy(priv->mtr_profile_tbl); if (own_domain_id) claim_zero(rte_eth_switch_domain_free(priv->domain_id)); - mlx5_cache_list_destroy(&priv->hrxqs); + if (priv->hrxqs) + mlx5_list_destroy(priv->hrxqs); + if (eth_dev && priv->flex_item_map) + mlx5_flex_item_port_cleanup(eth_dev); + mlx5_free(priv->ext_rxqs); mlx5_free(priv); if (eth_dev != NULL) eth_dev->data->dev_private = NULL; @@ -1699,6 +1649,8 @@ error: } if (sh) mlx5_free_shared_dev_ctx(sh); + if (nl_rdma >= 0) + close(nl_rdma); MLX5_ASSERT(err > 0); rte_errno = err; return NULL; @@ -1745,14 +1697,14 @@ mlx5_dev_spawn_data_cmp(const void *a, const void *b) /** * Match PCI information for possible slaves of bonding device. * - * @param[in] ibv_dev - * Pointer to Infiniband device structure. + * @param[in] ibdev_name + * Name of Infiniband device. * @param[in] pci_dev * Pointer to primary PCI address structure to match. * @param[in] nl_rdma * Netlink RDMA group socket handle. * @param[in] owner - * Rerepsentor owner PF index. + * Representor owner PF index. * @param[out] bond_info * Pointer to bonding information. * @@ -1761,7 +1713,7 @@ mlx5_dev_spawn_data_cmp(const void *a, const void *b) * positive index of slave PF in bonding. */ static int -mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, +mlx5_device_bond_pci_match(const char *ibdev_name, const struct rte_pci_addr *pci_dev, int nl_rdma, uint16_t owner, struct mlx5_bond_info *bond_info) @@ -1772,29 +1724,31 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, FILE *bond_file = NULL, *file; int pf = -1; int ret; + uint8_t cur_guid[32] = {0}; + uint8_t guid[32] = {0}; /* - * Try to get master device name. If something goes - * wrong suppose the lack of kernel support and no - * bonding devices. + * Try to get master device name. If something goes wrong suppose + * the lack of kernel support and no bonding devices. */ memset(bond_info, 0, sizeof(*bond_info)); if (nl_rdma < 0) return -1; - if (!strstr(ibv_dev->name, "bond")) + if (!strstr(ibdev_name, "bond")) return -1; - np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); + np = mlx5_nl_portnum(nl_rdma, ibdev_name); if (!np) return -1; + if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) + return -1; /* - * The Master device might not be on the predefined - * port (not on port index 1, it is not garanted), - * we have to scan all Infiniband device port and - * find master. + * The master device might not be on the predefined port(not on port + * index 1, it is not guaranteed), we have to scan all Infiniband + * device ports and find master. */ for (i = 1; i <= np; ++i) { /* Check whether Infiniband port is populated. */ - ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); + ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); if (!ifindex) continue; if (!if_indextoname(ifindex, ifname)) @@ -1814,13 +1768,15 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, char tmp_str[IF_NAMESIZE + 32]; struct rte_pci_addr pci_addr; struct mlx5_switch_info info; + int ret; /* Process slave interface names in the loop. */ snprintf(tmp_str, sizeof(tmp_str), "/sys/class/net/%s", ifname); - if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { - DRV_LOG(WARNING, "can not get PCI address" - " for netdev \"%s\"", ifname); + if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { + DRV_LOG(WARNING, + "Cannot get PCI address for netdev \"%s\".", + ifname); continue; } /* Slave interface PCI address match found. */ @@ -1844,12 +1800,6 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, tmp_str); break; } - /* Match PCI address. */ - if (pci_dev->domain == pci_addr.domain && - pci_dev->bus == pci_addr.bus && - pci_dev->devid == pci_addr.devid && - pci_dev->function + owner == pci_addr.function) - pf = info.port_name; /* Get ifindex. */ snprintf(tmp_str, sizeof(tmp_str), "/sys/class/net/%s/ifindex", ifname); @@ -1866,6 +1816,30 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, bond_info->ports[info.port_name].pci_addr = pci_addr; bond_info->ports[info.port_name].ifindex = ifindex; bond_info->n_port++; + /* + * Under socket direct mode, bonding will use + * system_image_guid as identification. + * After OFED 5.4, guid is readable (ret >= 0) under sysfs. + * All bonding members should have the same guid even if driver + * is using PCIe BDF. + */ + ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); + if (ret < 0) + break; + else if (ret > 0) { + if (!memcmp(guid, cur_guid, sizeof(guid)) && + owner == info.port_name && + (owner != 0 || (owner == 0 && + !rte_pci_addr_cmp(pci_dev, &pci_addr)))) + pf = info.port_name; + } else if (pci_dev->domain == pci_addr.domain && + pci_dev->bus == pci_addr.bus && + pci_dev->devid == pci_addr.devid && + ((pci_dev->function == 0 && + pci_dev->function + owner == pci_addr.function) || + (pci_dev->function == owner && + pci_addr.function == owner))) + pf = info.port_name; } if (pf >= 0) { /* Get bond interface info */ @@ -1878,6 +1852,11 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, DRV_LOG(INFO, "PF device %u, bond device %u(%s)", ifindex, bond_info->ifindex, bond_info->ifname); } + if (owner == 0 && pf != 0) { + DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", + pci_dev->domain, pci_dev->bus, pci_dev->devid, + pci_dev->function); + } return pf; } @@ -1887,20 +1866,22 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, * This function spawns Ethernet devices out of a given PCI device and * bonding owner PF index. * - * @param[in] pci_dev - * PCI device information. + * @param[in] cdev + * Pointer to common mlx5 device structure. * @param[in] req_eth_da * Requested ethdev device argument. * @param[in] owner_id * Requested owner PF port ID within bonding device, default to 0. + * @param[in, out] mkvlist + * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. * * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ static int -mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, +mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, struct rte_eth_devargs *req_eth_da, - uint16_t owner_id) + uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) { struct ibv_device **ibv_list; /* @@ -1927,27 +1908,18 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, * >= 0 - bonding device (value is slave PF index) */ int bd = -1; + struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); struct mlx5_dev_spawn_data *list = NULL; - struct mlx5_dev_config dev_config; - unsigned int dev_config_vf; struct rte_eth_devargs eth_da = *req_eth_da; struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ struct mlx5_bond_info bond_info; int ret = -1; - if (rte_eal_process_type() == RTE_PROC_PRIMARY) - mlx5_pmd_socket_init(); - ret = mlx5_init_once(); - if (ret) { - DRV_LOG(ERR, "unable to init PMD global data: %s", - strerror(rte_errno)); - return -rte_errno; - } errno = 0; ibv_list = mlx5_glue->get_device_list(&ret); if (!ibv_list) { rte_errno = errno ? errno : ENOSYS; - DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); + DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); return -rte_errno; } /* @@ -1962,10 +1934,9 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, while (ret-- > 0) { struct rte_pci_addr pci_addr; - DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); - bd = mlx5_device_bond_pci_match - (ibv_list[ret], &owner_pci, nl_rdma, owner_id, - &bond_info); + DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); + bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, + nl_rdma, owner_id, &bond_info); if (bd >= 0) { /* * Bonding device detected. Only one match is allowed, @@ -1985,15 +1956,15 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, /* Amend owner pci address if owner PF ID specified. */ if (eth_da.nb_representor_ports) owner_pci.function += owner_id; - DRV_LOG(INFO, "PCI information matches for" - " slave %d bonding device \"%s\"", - bd, ibv_list[ret]->name); + DRV_LOG(INFO, + "PCI information matches for slave %d bonding device \"%s\"", + bd, ibv_list[ret]->name); ibv_match[nd++] = ibv_list[ret]; break; } else { /* Bonding device not found. */ - if (mlx5_dev_to_pci_addr - (ibv_list[ret]->ibdev_path, &pci_addr)) + if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, + &pci_addr)) continue; if (owner_pci.domain != pci_addr.domain || owner_pci.bus != pci_addr.bus || @@ -2009,7 +1980,7 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, if (!nd) { /* No device matches, just complain and bail out. */ DRV_LOG(WARNING, - "no Verbs device matches PCI device " PCI_PRI_FMT "," + "No Verbs device matches PCI device " PCI_PRI_FMT "," " are kernel drivers loaded?", owner_pci.domain, owner_pci.bus, owner_pci.devid, owner_pci.function); @@ -2026,39 +1997,22 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, if (nl_rdma >= 0) np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); if (!np) - DRV_LOG(WARNING, "can not get IB device \"%s\"" - " ports number", ibv_match[0]->name); + DRV_LOG(WARNING, + "Cannot get IB device \"%s\" ports number.", + ibv_match[0]->name); if (bd >= 0 && !np) { - DRV_LOG(ERR, "can not get ports" - " for bonding device"); + DRV_LOG(ERR, "Cannot get ports for bonding device."); rte_errno = ENOENT; ret = -rte_errno; goto exit; } } -#ifndef HAVE_MLX5DV_DR_DEVX_PORT - if (bd >= 0) { - /* - * This may happen if there is VF LAG kernel support and - * application is compiled with older rdma_core library. - */ - DRV_LOG(ERR, - "No kernel/verbs support for VF LAG bonding found."); - rte_errno = ENOTSUP; - ret = -rte_errno; - goto exit; - } -#endif - /* - * Now we can determine the maximal - * amount of devices to be spawned. - */ + /* Now we can determine the maximal amount of devices to be spawned. */ list = mlx5_malloc(MLX5_MEM_ZERO, - sizeof(struct mlx5_dev_spawn_data) * - (np ? np : nd), + sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); if (!list) { - DRV_LOG(ERR, "spawn data array allocation failure"); + DRV_LOG(ERR, "Spawn data array allocation failure."); rte_errno = ENOMEM; ret = -rte_errno; goto exit; @@ -2077,14 +2031,14 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, list[ns].bond_info = &bond_info; list[ns].max_port = np; list[ns].phys_port = i; - list[ns].phys_dev = ibv_match[0]; + list[ns].phys_dev_name = ibv_match[0]->name; list[ns].eth_dev = NULL; list[ns].pci_dev = pci_dev; + list[ns].cdev = cdev; list[ns].pf_bond = bd; - list[ns].ifindex = mlx5_nl_ifindex - (nl_rdma, - mlx5_os_get_dev_device_name - (list[ns].phys_dev), i); + list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, + ibv_match[0]->name, + i); if (!list[ns].ifindex) { /* * No network interface index found for the @@ -2097,10 +2051,9 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, } ret = -1; if (nl_route >= 0) - ret = mlx5_nl_switch_info - (nl_route, - list[ns].ifindex, - &list[ns].info); + ret = mlx5_nl_switch_info(nl_route, + list[ns].ifindex, + &list[ns].info); if (ret || (!list[ns].info.representor && !list[ns].info.master)) { /* @@ -2108,14 +2061,21 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, * Netlink, let's try to perform the task * with sysfs. */ - ret = mlx5_sysfs_switch_info - (list[ns].ifindex, - &list[ns].info); + ret = mlx5_sysfs_switch_info(list[ns].ifindex, + &list[ns].info); } -#ifdef HAVE_MLX5DV_DR_DEVX_PORT if (!ret && bd >= 0) { switch (list[ns].info.name_type) { case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: + if (np == 1) { + /* + * Force standalone bonding + * device for ROCE LAG + * configurations. + */ + list[ns].info.master = 0; + list[ns].info.representor = 0; + } if (list[ns].info.port_name == bd) ns++; break; @@ -2132,15 +2092,13 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, } continue; } -#endif if (!ret && (list[ns].info.representor ^ list[ns].info.master)) ns++; } if (!ns) { DRV_LOG(ERR, - "unable to recognize master/representors" - " on the IB device with multiple ports"); + "Unable to recognize master/representors on the IB device with multiple ports."); rte_errno = ENOENT; ret = -rte_errno; goto exit; @@ -2168,16 +2126,17 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, list[ns].bond_info = NULL; list[ns].max_port = 1; list[ns].phys_port = 1; - list[ns].phys_dev = ibv_match[i]; + list[ns].phys_dev_name = ibv_match[i]->name; list[ns].eth_dev = NULL; list[ns].pci_dev = pci_dev; + list[ns].cdev = cdev; list[ns].pf_bond = -1; list[ns].ifindex = 0; if (nl_rdma >= 0) list[ns].ifindex = mlx5_nl_ifindex - (nl_rdma, - mlx5_os_get_dev_device_name - (list[ns].phys_dev), 1); + (nl_rdma, + ibv_match[i]->name, + 1); if (!list[ns].ifindex) { char ifname[IF_NAMESIZE]; @@ -2216,10 +2175,9 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, } ret = -1; if (nl_route >= 0) - ret = mlx5_nl_switch_info - (nl_route, - list[ns].ifindex, - &list[ns].info); + ret = mlx5_nl_switch_info(nl_route, + list[ns].ifindex, + &list[ns].info); if (ret || (!list[ns].info.representor && !list[ns].info.master)) { /* @@ -2227,9 +2185,8 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, * Netlink, let's try to perform the task * with sysfs. */ - ret = mlx5_sysfs_switch_info - (list[ns].ifindex, - &list[ns].info); + ret = mlx5_sysfs_switch_info(list[ns].ifindex, + &list[ns].info); } if (!ret && (list[ns].info.representor ^ list[ns].info.master)) { @@ -2238,25 +2195,34 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, !list[ns].info.representor && !list[ns].info.master) { /* - * Single IB device with - * one physical port and + * Single IB device with one physical port and * attached network device. - * May be SRIOV is not enabled - * or there is no representors. + * May be SRIOV is not enabled or there is no + * representors. */ - DRV_LOG(INFO, "no E-Switch support detected"); + DRV_LOG(INFO, "No E-Switch support detected."); ns++; break; } } if (!ns) { DRV_LOG(ERR, - "unable to recognize master/representors" - " on the multiple IB devices"); + "Unable to recognize master/representors on the multiple IB devices."); rte_errno = ENOENT; ret = -rte_errno; goto exit; } + /* + * New kernels may add the switch_id attribute for the case + * there is no E-Switch and we wrongly recognized the only + * device as master. Override this if there is the single + * device with single port and new device name format present. + */ + if (nd == 1 && + list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { + list[0].info.master = 0; + list[0].info.representor = 0; + } } MLX5_ASSERT(ns); /* @@ -2264,21 +2230,6 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, * (i.e. master first, then representors from lowest to highest ID). */ qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); - /* Device specific configuration. */ - switch (pci_dev->id.device_id) { - case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: - case PCI_DEVICE_ID_MELLANOX_CONNECTXVF: - dev_config_vf = 1; - break; - default: - dev_config_vf = 0; - break; - } if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { /* Set devargs default values. */ if (eth_da.nb_mh_controllers == 0) { @@ -2300,28 +2251,8 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, for (i = 0; i != ns; ++i) { uint32_t restore; - /* Default configuration. */ - memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); - dev_config.vf = dev_config_vf; - dev_config.mps = MLX5_ARG_UNSET; - dev_config.dbnc = MLX5_ARG_UNSET; - dev_config.rx_vec_en = 1; - dev_config.txq_inline_max = MLX5_ARG_UNSET; - dev_config.txq_inline_min = MLX5_ARG_UNSET; - dev_config.txq_inline_mpw = MLX5_ARG_UNSET; - dev_config.txqs_inline = MLX5_ARG_UNSET; - dev_config.vf_nl_en = 1; - dev_config.mr_ext_memseg_en = 1; - dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; - dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; - dev_config.dv_esw_en = 1; - dev_config.dv_flow_en = 1; - dev_config.decap_en = 1; - dev_config.log_hp_size = MLX5_ARG_UNSET; - list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, - &list[i], - &dev_config, - ð_da); + list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, + mkvlist); if (!list[i].eth_dev) { if (rte_errno != EBUSY && rte_errno != EEXIST) break; @@ -2330,6 +2261,29 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, } restore = list[i].eth_dev->data->dev_flags; rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); + /** + * Each representor has a dedicated interrupts vector. + * rte_eth_copy_pci_info() assigns PF interrupts handle to + * representor eth_dev object because representor and PF + * share the same PCI address. + * Override representor device with a dedicated + * interrupts handle here. + * Representor interrupts handle is released in mlx5_dev_stop(). + */ + if (list[i].info.representor) { + struct rte_intr_handle *intr_handle = + rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); + if (intr_handle == NULL) { + DRV_LOG(ERR, + "port %u failed to allocate memory for interrupt handler " + "Rx interrupts will not be supported", + i); + rte_errno = ENOMEM; + ret = -rte_errno; + goto exit; + } + list[i].eth_dev->intr_handle = intr_handle; + } /* Restore non-PCI flags cleared by the above call. */ list[i].eth_dev->data->dev_flags |= restore; rte_eth_dev_probing_finish(list[i].eth_dev); @@ -2374,189 +2328,171 @@ exit: return ret; } +static int +mlx5_os_parse_eth_devargs(struct rte_device *dev, + struct rte_eth_devargs *eth_da) +{ + int ret = 0; + + if (dev->devargs == NULL) + return 0; + memset(eth_da, 0, sizeof(*eth_da)); + /* Parse representor information first from class argument. */ + if (dev->devargs->cls_str) + ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); + if (ret != 0) { + DRV_LOG(ERR, "failed to parse device arguments: %s", + dev->devargs->cls_str); + return -rte_errno; + } + if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { + /* Parse legacy device argument */ + ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); + if (ret) { + DRV_LOG(ERR, "failed to parse device arguments: %s", + dev->devargs->args); + return -rte_errno; + } + } + return 0; +} + /** - * DPDK callback to register a PCI device. + * Callback to register a PCI device. * * This function spawns Ethernet devices out of a given PCI device. * - * @param[in] pci_drv - * PCI driver structure (mlx5_driver). - * @param[in] pci_dev - * PCI device information. + * @param[in] cdev + * Pointer to common mlx5 device structure. + * @param[in, out] mkvlist + * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. * * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ -int -mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, - struct rte_pci_device *pci_dev) +static int +mlx5_os_pci_probe(struct mlx5_common_device *cdev, + struct mlx5_kvargs_ctrl *mkvlist) { - struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE }; + struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); + struct rte_eth_devargs eth_da = { .nb_ports = 0 }; int ret = 0; uint16_t p; - if (pci_dev->device.devargs) { - /* Parse representor information from device argument. */ - if (pci_dev->device.devargs->cls_str) - ret = rte_eth_devargs_parse - (pci_dev->device.devargs->cls_str, ð_da); - if (ret) { - DRV_LOG(ERR, "failed to parse device arguments: %s", - pci_dev->device.devargs->cls_str); - return -rte_errno; - } - if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) { - /* Support legacy device argument */ - ret = rte_eth_devargs_parse - (pci_dev->device.devargs->args, ð_da); - if (ret) { - DRV_LOG(ERR, "failed to parse device arguments: %s", - pci_dev->device.devargs->args); - return -rte_errno; - } - } - } + ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); + if (ret != 0) + return ret; if (eth_da.nb_ports > 0) { /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ - for (p = 0; p < eth_da.nb_ports; p++) - ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, - eth_da.ports[p]); + for (p = 0; p < eth_da.nb_ports; p++) { + ret = mlx5_os_pci_probe_pf(cdev, ð_da, + eth_da.ports[p], mkvlist); + if (ret) + break; + } + if (ret) { + DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " " + "aborted due to prodding failure of PF %u", + pci_dev->addr.domain, pci_dev->addr.bus, + pci_dev->addr.devid, pci_dev->addr.function, + eth_da.ports[p]); + mlx5_net_remove(cdev); + } } else { - ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, 0); + ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); } return ret; } +/* Probe a single SF device on auxiliary bus, no representor support. */ static int -mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) +mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, + struct mlx5_kvargs_ctrl *mkvlist) { - char *env; - int value; - - MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); - /* Get environment variable to store. */ - env = getenv(MLX5_SHUT_UP_BF); - value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; - if (config->dbnc == MLX5_ARG_UNSET) - setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); - else - setenv(MLX5_SHUT_UP_BF, - config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); - return value; -} + struct rte_eth_devargs eth_da = { .nb_ports = 0 }; + struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; + struct rte_device *dev = cdev->dev; + struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); + struct rte_eth_dev *eth_dev; + int ret = 0; -static void -mlx5_restore_doorbell_mapping_env(int value) -{ - MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); - /* Restore the original environment variable state. */ - if (value == MLX5_ARG_UNSET) - unsetenv(MLX5_SHUT_UP_BF); - else - setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); + /* Parse ethdev devargs. */ + ret = mlx5_os_parse_eth_devargs(dev, ð_da); + if (ret != 0) + return ret; + /* Init spawn data. */ + spawn.max_port = 1; + spawn.phys_port = 1; + spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); + ret = mlx5_auxiliary_get_ifindex(dev->name); + if (ret < 0) { + DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); + return ret; + } + spawn.ifindex = ret; + spawn.cdev = cdev; + /* Spawn device. */ + eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); + if (eth_dev == NULL) + return -rte_errno; + /* Post create. */ + eth_dev->intr_handle = adev->intr_handle; + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; + eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; + eth_dev->data->numa_node = dev->numa_node; + } + rte_eth_dev_probing_finish(eth_dev); + return 0; } /** - * Extract pdn of PD object using DV API. + * Net class driver callback to probe a device. + * + * This function probe PCI bus device(s) or a single SF on auxiliary bus. * - * @param[in] pd - * Pointer to the verbs PD object. - * @param[out] pdn - * Pointer to the PD object number variable. + * @param[in] cdev + * Pointer to the common mlx5 device. + * @param[in, out] mkvlist + * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. * * @return - * 0 on success, error value otherwise. + * 0 on success, a negative errno value otherwise and rte_errno is set. */ int -mlx5_os_get_pdn(void *pd, uint32_t *pdn) +mlx5_os_net_probe(struct mlx5_common_device *cdev, + struct mlx5_kvargs_ctrl *mkvlist) { -#ifdef HAVE_IBV_FLOW_DV_SUPPORT - struct mlx5dv_obj obj; - struct mlx5dv_pd pd_info; - int ret = 0; + int ret; - obj.pd.in = pd; - obj.pd.out = &pd_info; - ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + mlx5_pmd_socket_init(); + ret = mlx5_init_once(); if (ret) { - DRV_LOG(DEBUG, "Fail to get PD object info"); - return ret; + DRV_LOG(ERR, "Unable to init PMD global data: %s", + strerror(rte_errno)); + return -rte_errno; } - *pdn = pd_info.pdn; - return 0; -#else - (void)pd; - (void)pdn; - return -ENOTSUP; -#endif /* HAVE_IBV_FLOW_DV_SUPPORT */ + ret = mlx5_probe_again_args_validate(cdev, mkvlist); + if (ret) { + DRV_LOG(ERR, "Probe again parameters are not compatible : %s", + strerror(rte_errno)); + return -rte_errno; + } + if (mlx5_dev_is_pci(cdev->dev)) + return mlx5_os_pci_probe(cdev, mkvlist); + else + return mlx5_os_auxiliary_probe(cdev, mkvlist); } /** - * Function API to open IB device. - * - * This function calls the Linux glue APIs to open a device. - * - * @param[in] spawn - * Pointer to the IB device attributes (name, port, etc). - * @param[out] config - * Pointer to device configuration structure. - * @param[out] sh - * Pointer to shared context structure. - * - * @return - * 0 on success, a positive error value otherwise. + * Cleanup resources when the last device is closed. */ -int -mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, - const struct mlx5_dev_config *config, - struct mlx5_dev_ctx_shared *sh) +void +mlx5_os_net_cleanup(void) { - int dbmap_env; - int err = 0; - - sh->numa_node = spawn->pci_dev->device.numa_node; - pthread_mutex_init(&sh->txpp.mutex, NULL); - /* - * Configure environment variable "MLX5_BF_SHUT_UP" - * before the device creation. The rdma_core library - * checks the variable at device creation and - * stores the result internally. - */ - dbmap_env = mlx5_config_doorbell_mapping_env(config); - /* Try to open IB device with DV first, then usual Verbs. */ - errno = 0; - sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); - if (sh->ctx) { - sh->devx = 1; - DRV_LOG(DEBUG, "DevX is supported"); - /* The device is created, no need for environment. */ - mlx5_restore_doorbell_mapping_env(dbmap_env); - } else { - /* The environment variable is still configured. */ - sh->ctx = mlx5_glue->open_device(spawn->phys_dev); - err = errno ? errno : ENODEV; - /* - * The environment variable is not needed anymore, - * all device creation attempts are completed. - */ - mlx5_restore_doorbell_mapping_env(dbmap_env); - if (!sh->ctx) - return err; - DRV_LOG(DEBUG, "DevX is NOT supported"); - err = 0; - } - if (!err && sh->ctx) { - /* Hint libmlx5 to use PMD allocator for data plane resources */ - mlx5_glue->dv_set_context_attr(sh->ctx, - MLX5DV_CTX_ATTR_BUF_ALLOCATORS, - (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ - .alloc = &mlx5_alloc_verbs_buf, - .free = &mlx5_free_verbs_buf, - .data = sh, - })); - } - return err; + mlx5_pmd_socket_uninit(); } /** @@ -2572,28 +2508,41 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) { int ret; int flags; + struct ibv_context *ctx = sh->cdev->ctx; - sh->intr_handle.fd = -1; - flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); - ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, - F_SETFL, flags | O_NONBLOCK); + sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); + if (sh->intr_handle == NULL) { + DRV_LOG(ERR, "Fail to allocate intr_handle"); + rte_errno = ENOMEM; + return; + } + rte_intr_fd_set(sh->intr_handle, -1); + + flags = fcntl(ctx->async_fd, F_GETFL); + ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK); if (ret) { DRV_LOG(INFO, "failed to change file descriptor async event" " queue"); } else { - sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; - sh->intr_handle.type = RTE_INTR_HANDLE_EXT; - if (rte_intr_callback_register(&sh->intr_handle, + rte_intr_fd_set(sh->intr_handle, ctx->async_fd); + rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT); + if (rte_intr_callback_register(sh->intr_handle, mlx5_dev_interrupt_handler, sh)) { DRV_LOG(INFO, "Fail to install the shared interrupt."); - sh->intr_handle.fd = -1; + rte_intr_fd_set(sh->intr_handle, -1); } } - if (sh->devx) { + if (sh->cdev->config.devx) { #ifdef HAVE_IBV_DEVX_ASYNC - sh->intr_handle_devx.fd = -1; - sh->devx_comp = - (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); + sh->intr_handle_devx = + rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); + if (!sh->intr_handle_devx) { + DRV_LOG(ERR, "Fail to allocate intr_handle"); + rte_errno = ENOMEM; + return; + } + rte_intr_fd_set(sh->intr_handle_devx, -1); + sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; if (!devx_comp) { DRV_LOG(INFO, "failed to allocate devx_comp."); @@ -2606,13 +2555,14 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) " devx comp"); return; } - sh->intr_handle_devx.fd = devx_comp->fd; - sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; - if (rte_intr_callback_register(&sh->intr_handle_devx, + rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd); + rte_intr_type_set(sh->intr_handle_devx, + RTE_INTR_HANDLE_EXT); + if (rte_intr_callback_register(sh->intr_handle_devx, mlx5_dev_interrupt_handler_devx, sh)) { DRV_LOG(INFO, "Fail to install the devx shared" " interrupt."); - sh->intr_handle_devx.fd = -1; + rte_intr_fd_set(sh->intr_handle_devx, -1); } #endif /* HAVE_IBV_DEVX_ASYNC */ } @@ -2629,13 +2579,15 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) void mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) { - if (sh->intr_handle.fd >= 0) - mlx5_intr_callback_unregister(&sh->intr_handle, + if (rte_intr_fd_get(sh->intr_handle) >= 0) + mlx5_intr_callback_unregister(sh->intr_handle, mlx5_dev_interrupt_handler, sh); + rte_intr_instance_free(sh->intr_handle); #ifdef HAVE_IBV_DEVX_ASYNC - if (sh->intr_handle_devx.fd >= 0) - rte_intr_callback_unregister(&sh->intr_handle_devx, + if (rte_intr_fd_get(sh->intr_handle_devx) >= 0) + rte_intr_callback_unregister(sh->intr_handle_devx, mlx5_dev_interrupt_handler_devx, sh); + rte_intr_instance_free(sh->intr_handle_devx); if (sh->devx_comp) mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); #endif @@ -2664,8 +2616,8 @@ mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, if (priv->sh) { if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0) - return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx, - 0, (uint32_t *)stat); + return mlx5_devx_cmd_queue_counter_query + (priv->q_counters, 0, (uint32_t *)stat); MKSTR(path, "%s/ports/%d/hw_counters/%s", priv->sh->ibdev_path, priv->dev_port, @@ -2696,23 +2648,6 @@ mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, return 1; } -/** - * Set the reg_mr and dereg_mr call backs - * - * @param reg_mr_cb[out] - * Pointer to reg_mr func - * @param dereg_mr_cb[out] - * Pointer to dereg_mr func - * - */ -void -mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, - mlx5_dereg_mr_t *dereg_mr_cb) -{ - *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr; - *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr; -} - /** * Remove a MAC address from device * @@ -2725,7 +2660,7 @@ void mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) { struct mlx5_priv *priv = dev->data->dev_private; - const int vf = priv->config.vf; + const int vf = priv->sh->dev_cap.vf; if (vf) mlx5_nl_mac_addr_remove(priv->nl_socket_route, @@ -2751,7 +2686,7 @@ mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, uint32_t index) { struct mlx5_priv *priv = dev->data->dev_private; - const int vf = priv->config.vf; + const int vf = priv->sh->dev_cap.vf; int ret = 0; if (vf)