X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=1850cf94abc0365c03a8351893f3fb5dc92d4493;hb=9dbaf7eef6e17113f5c681c3c4fcee6bcda4b5f0;hp=a6cd2b34a0f11b4670fea58e1cb6e083071635a4;hpb=4001d7ad26d42bb02241801daf1e8964272d643e;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index a6cd2b34a0..1850cf94ab 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -179,6 +179,7 @@ struct mlx5_dev_config { struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ + unsigned int stride_size_n; /* Size of a stride. */ unsigned int min_stride_size_n; /* Min size of a stride. */ unsigned int max_stride_size_n; /* Max size of a stride. */ unsigned int max_memcpy_len; @@ -247,6 +248,11 @@ struct mlx5_drop { */ #define MLX5_MAKE_CNT_IDX(pi, offset) \ ((pi) * MLX5_COUNTERS_PER_POOL + (offset) + 1) +#define MLX5_CNT_TO_CNT_EXT(pool, cnt) (&((struct mlx5_flow_counter_ext *) \ + ((pool) + 1))[((cnt) - (pool)->counters_raw)]) +#define MLX5_GET_POOL_CNT_EXT(pool, offset) \ + (&((struct mlx5_flow_counter_ext *) \ + ((pool) + 1))[offset]) struct mlx5_flow_counter_pool; @@ -255,15 +261,25 @@ struct flow_counter_stats { uint64_t bytes; }; -/* Counters information. */ +/* Generic counters information. */ struct mlx5_flow_counter { TAILQ_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next flow counter structure. */ + union { + uint64_t hits; /**< Reset value of hits packets. */ + int64_t query_gen; /**< Generation of the last release. */ + }; + uint64_t bytes; /**< Reset value of bytes. */ + void *action; /**< Pointer to the dv action. */ +}; + +/* Extend counters information for none batch counters. */ +struct mlx5_flow_counter_ext { uint32_t shared:1; /**< Share counter ID with other flow rules. */ uint32_t batch: 1; /**< Whether the counter was allocated by batch command. */ uint32_t ref_cnt:30; /**< Reference counter. */ - uint32_t id; /**< Counter ID. */ + uint32_t id; /**< User counter ID. */ union { /**< Holds the counters for the rule. */ #if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) struct ibv_counter_set *cs; @@ -271,26 +287,19 @@ struct mlx5_flow_counter { struct ibv_counters *cs; #endif struct mlx5_devx_obj *dcs; /**< Counter Devx object. */ - struct mlx5_flow_counter_pool *pool; /**< The counter pool. */ }; - union { - uint64_t hits; /**< Reset value of hits packets. */ - int64_t query_gen; /**< Generation of the last release. */ - }; - uint64_t bytes; /**< Reset value of bytes. */ - void *action; /**< Pointer to the dv action. */ }; + TAILQ_HEAD(mlx5_counters, mlx5_flow_counter); -/* Counter pool structure - query is in pool resolution. */ +/* Generic counter pool structure - query is in pool resolution. */ struct mlx5_flow_counter_pool { TAILQ_ENTRY(mlx5_flow_counter_pool) next; struct mlx5_counters counters; /* Free counter list. */ union { struct mlx5_devx_obj *min_dcs; rte_atomic64_t a64_dcs; - int dcs_id; /* Fallback pool counter id range. */ }; /* The devx object of the minimum counter ID. */ rte_atomic64_t start_query_gen; /* Query start round. */ @@ -299,7 +308,8 @@ struct mlx5_flow_counter_pool { rte_spinlock_t sl; /* The pool lock. */ struct mlx5_counter_stats_raw *raw; struct mlx5_counter_stats_raw *raw_hw; /* The raw on HW working. */ - struct mlx5_flow_counter counters_raw[]; /* The pool counters memory. */ + struct mlx5_flow_counter counters_raw[MLX5_COUNTERS_PER_POOL]; + /* The pool counters memory. */ }; struct mlx5_counter_stats_raw; @@ -445,14 +455,8 @@ struct mlx5_ibv_shared { uint32_t dv_regc0_mask; /* available bits of metatada reg_c[0]. */ uint32_t dv_refcnt; /* DV/DR data reference counter. */ void *fdb_domain; /* FDB Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *fdb_mtr_sfx_tbl; - /* FDB meter suffix rules table. */ void *rx_domain; /* RX Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *rx_mtr_sfx_tbl; - /* RX meter suffix rules table. */ void *tx_domain; /* TX Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *tx_mtr_sfx_tbl; - /* TX meter suffix rules table. */ struct mlx5_hlist *flow_tbls; /* Direct Rules tables for FDB, NIC TX+RX */ void *esw_drop_action; /* Pointer to DR E-Switch drop action. */ @@ -534,6 +538,7 @@ struct mlx5_priv { struct mlx5_flows ctrl_flows; /* Control flow rules. */ void *inter_flows; /* Intermediate resources for flow creation. */ int flow_idx; /* Intermediate device flow index. */ + int flow_nested_idx; /* Intermediate device flow index, nested. */ LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */ LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */ LIST_HEAD(hrxq, mlx5_hrxq) hrxqs; /* Verbs Hash Rx queues. */ @@ -764,9 +769,9 @@ void mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh, uint64_t async_id, int status); void mlx5_set_query_alarm(struct mlx5_ibv_shared *sh); void mlx5_flow_query_alarm(void *arg); -struct mlx5_flow_counter *mlx5_counter_alloc(struct rte_eth_dev *dev); -void mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt); -int mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt, +uint32_t mlx5_counter_alloc(struct rte_eth_dev *dev); +void mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt); +int mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, bool clear, uint64_t *pkts, uint64_t *bytes); int mlx5_flow_dev_dump(struct rte_eth_dev *dev, FILE *file, struct rte_flow_error *error);