X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=50349abf347cb2dede653247ab355ba589c265e9;hb=7bc39dac4a088617175b559323ff4b6d74bd5d48;hp=b61d7a51ea63f274cd3d4a014e3a79834e03f2ea;hpb=826b8a87325bfc8bd475dc16403939ac68cfad80;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index b61d7a51ea..50349abf34 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -36,43 +36,30 @@ #include #include #include +#include +#include #include "mlx5_defs.h" #include "mlx5_utils.h" -#include "mlx5_mr.h" #include "mlx5_autoconf.h" -/* Request types for IPC. */ -enum mlx5_mp_req_type { - MLX5_MP_REQ_VERBS_CMD_FD = 1, - MLX5_MP_REQ_CREATE_MR, - MLX5_MP_REQ_START_RXTX, - MLX5_MP_REQ_STOP_RXTX, - MLX5_MP_REQ_QUEUE_STATE_MODIFY, -}; - -struct mlx5_mp_arg_queue_state_modify { - uint8_t is_wq; /* Set if WQ. */ - uint16_t queue_id; /* DPDK queue ID. */ - enum ibv_wq_state state; /* WQ requested state. */ -}; -/* Pameters for IPC. */ -struct mlx5_mp_param { - enum mlx5_mp_req_type type; - int port_id; - int result; - RTE_STD_C11 - union { - uintptr_t addr; /* MLX5_MP_REQ_CREATE_MR */ - struct mlx5_mp_arg_queue_state_modify state_modify; - /* MLX5_MP_REQ_QUEUE_STATE_MODIFY */ - } args; +enum mlx5_ipool_index { +#ifdef HAVE_IBV_FLOW_DV_SUPPORT + MLX5_IPOOL_DECAP_ENCAP = 0, /* Pool for encap/decap resource. */ + MLX5_IPOOL_PUSH_VLAN, /* Pool for push vlan resource. */ + MLX5_IPOOL_TAG, /* Pool for tag resource. */ + MLX5_IPOOL_PORT_ID, /* Pool for port id resource. */ + MLX5_IPOOL_JUMP, /* Pool for jump resource. */ +#endif + MLX5_IPOOL_MTR, /* Pool for meter resource. */ + MLX5_IPOOL_MCP, /* Pool for metadata resource. */ + MLX5_IPOOL_HRXQ, /* Pool for hrxq resource. */ + MLX5_IPOOL_MLX5_FLOW, /* Pool for mlx5 flow handle. */ + MLX5_IPOOL_RTE_FLOW, /* Pool for rte_flow. */ + MLX5_IPOOL_MAX, }; -/** Request timeout for IPC. */ -#define MLX5_MP_REQ_TIMEOUT_SEC 5 - /** Key string for IPC. */ #define MLX5_MP_NAME "net_mlx5_mp" @@ -123,9 +110,6 @@ struct mlx5_stats_ctrl { uint64_t imissed; }; -/* Flow list . */ -TAILQ_HEAD(mlx5_flows, rte_flow); - /* Default PMD specific parameter value. */ #define MLX5_ARG_UNSET (-1) @@ -179,6 +163,7 @@ struct mlx5_dev_config { struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ + unsigned int stride_size_n; /* Size of a stride. */ unsigned int min_stride_size_n; /* Min size of a stride. */ unsigned int max_stride_size_n; /* Max size of a stride. */ unsigned int max_memcpy_len; @@ -228,8 +213,6 @@ struct mlx5_verbs_alloc_ctx { const void *obj; /* Pointer to the DPDK object. */ }; -LIST_HEAD(mlx5_mr_list, mlx5_mr); - /* Flow drop context necessary due to Verbs API. */ struct mlx5_drop { struct mlx5_hrxq *hrxq; /* Hash Rx queue queue. */ @@ -299,7 +282,6 @@ struct mlx5_flow_counter_pool { union { struct mlx5_devx_obj *min_dcs; rte_atomic64_t a64_dcs; - int dcs_id; /* Fallback pool counter id range. */ }; /* The devx object of the minimum counter ID. */ rte_atomic64_t start_query_gen; /* Query start round. */ @@ -441,13 +423,7 @@ struct mlx5_ibv_shared { struct ibv_device_attr_ex device_attr; /* Device properties. */ LIST_ENTRY(mlx5_ibv_shared) mem_event_cb; /**< Called by memory event callback. */ - struct { - uint32_t dev_gen; /* Generation number to flush local caches. */ - rte_rwlock_t rwlock; /* MR Lock. */ - struct mlx5_mr_btree cache; /* Global MR cache table. */ - struct mlx5_mr_list mr_list; /* Registered MR list. */ - struct mlx5_mr_list mr_free_list; /* Freed MR list. */ - } mr; + struct mlx5_mr_share_cache share_cache; /* Shared DV/DR flow data section. */ pthread_mutex_t dv_mutex; /* DV context mutex. */ uint32_t dv_meta_mask; /* flow META metadata supported mask. */ @@ -455,26 +431,20 @@ struct mlx5_ibv_shared { uint32_t dv_regc0_mask; /* available bits of metatada reg_c[0]. */ uint32_t dv_refcnt; /* DV/DR data reference counter. */ void *fdb_domain; /* FDB Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *fdb_mtr_sfx_tbl; - /* FDB meter suffix rules table. */ void *rx_domain; /* RX Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *rx_mtr_sfx_tbl; - /* RX meter suffix rules table. */ void *tx_domain; /* TX Direct Rules name space handle. */ - struct mlx5_flow_tbl_resource *tx_mtr_sfx_tbl; - /* TX meter suffix rules table. */ struct mlx5_hlist *flow_tbls; /* Direct Rules tables for FDB, NIC TX+RX */ void *esw_drop_action; /* Pointer to DR E-Switch drop action. */ void *pop_vlan_action; /* Pointer to DR pop VLAN action. */ - LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps; + uint32_t encaps_decaps; /* Encap/decap action indexed memory list. */ LIST_HEAD(modify_cmd, mlx5_flow_dv_modify_hdr_resource) modify_cmds; struct mlx5_hlist *tag_table; - LIST_HEAD(port_id_action_list, mlx5_flow_dv_port_id_action_resource) - port_id_action_list; /* List of port ID actions. */ - LIST_HEAD(push_vlan_action_list, mlx5_flow_dv_push_vlan_action_resource) - push_vlan_action_list; /* List of push VLAN actions. */ + uint32_t port_id_action_list; /* List of port ID actions. */ + uint32_t push_vlan_action_list; /* List of push VLAN actions. */ struct mlx5_flow_counter_mng cmng; /* Counters management structure. */ + struct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX]; + /* Memory Pool for mlx5 flow resources. */ /* Shared interrupt handler section. */ pthread_mutex_t intr_mutex; /* Interrupt config mutex. */ uint32_t intr_cnt; /* Interrupt handler reference counter. */ @@ -540,13 +510,15 @@ struct mlx5_priv { unsigned int (*reta_idx)[]; /* RETA index table. */ unsigned int reta_idx_n; /* RETA index size. */ struct mlx5_drop drop_queue; /* Flow drop queues. */ - struct mlx5_flows flows; /* RTE Flow rules. */ - struct mlx5_flows ctrl_flows; /* Control flow rules. */ + uint32_t flows; /* RTE Flow rules. */ + uint32_t ctrl_flows; /* Control flow rules. */ void *inter_flows; /* Intermediate resources for flow creation. */ + void *rss_desc; /* Intermediate rss description resources. */ int flow_idx; /* Intermediate device flow index. */ + int flow_nested_idx; /* Intermediate device flow index, nested. */ LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */ LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */ - LIST_HEAD(hrxq, mlx5_hrxq) hrxqs; /* Verbs Hash Rx queues. */ + uint32_t hrxqs; /* Verbs Hash Rx queues. */ LIST_HEAD(txq, mlx5_txq_ctrl) txqsctrl; /* DPDK Tx queues. */ LIST_HEAD(txqobj, mlx5_txq_obj) txqsobj; /* Verbs/DevX Tx queues. */ /* Indirection tables. */ @@ -582,6 +554,8 @@ struct mlx5_priv { #endif uint8_t skip_default_rss_reta; /* Skip configuration of default reta. */ uint8_t fdb_def_rule; /* Whether fdb jump to table 1 is configured. */ + struct mlx5_mp_id mp_id; /* ID of a multi-process process */ + LIST_HEAD(fdir, mlx5_fdir_flow) fdir_flows; /* fdir flows. */ }; #define PORT_ID(priv) ((priv)->dev_data->port_id) @@ -739,8 +713,7 @@ struct rte_flow *mlx5_flow_create(struct rte_eth_dev *dev, struct rte_flow_error *error); int mlx5_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow, struct rte_flow_error *error); -void mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list, - bool active); +void mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active); int mlx5_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *error); int mlx5_flow_query(struct rte_eth_dev *dev, struct rte_flow *flow, const struct rte_flow_action *action, void *data, @@ -751,8 +724,8 @@ int mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, enum rte_filter_op filter_op, void *arg); -int mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list); -void mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list); +int mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list); +void mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list); int mlx5_flow_start_default(struct rte_eth_dev *dev); void mlx5_flow_stop_default(struct rte_eth_dev *dev); void mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev); @@ -780,18 +753,13 @@ int mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, bool clear, uint64_t *pkts, uint64_t *bytes); int mlx5_flow_dev_dump(struct rte_eth_dev *dev, FILE *file, struct rte_flow_error *error); +void mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev); /* mlx5_mp.c */ +int mlx5_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer); +int mlx5_mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer); void mlx5_mp_req_start_rxtx(struct rte_eth_dev *dev); void mlx5_mp_req_stop_rxtx(struct rte_eth_dev *dev); -int mlx5_mp_req_mr_create(struct rte_eth_dev *dev, uintptr_t addr); -int mlx5_mp_req_verbs_cmd_fd(struct rte_eth_dev *dev); -int mlx5_mp_req_queue_state_modify(struct rte_eth_dev *dev, - struct mlx5_mp_arg_queue_state_modify *sm); -int mlx5_mp_init_primary(void); -void mlx5_mp_uninit_primary(void); -int mlx5_mp_init_secondary(void); -void mlx5_mp_uninit_secondary(void); /* mlx5_socket.c */