X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=5131a470f11de3146f050dce1fb8418ac268c62d;hb=1260a87b2889e3c3791500d221c4932e50794092;hp=d29dc1959c02981b23a4898aa7b4fb4ce4a423a8;hpb=98c4b12afae7973fb7ab0956687adc6645815623;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index d29dc1959c..5131a470f1 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -10,20 +10,9 @@ #include #include #include -#include #include #include -/* Verbs header. */ -/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ -#ifdef PEDANTIC -#pragma GCC diagnostic ignored "-Wpedantic" -#endif -#include -#ifdef PEDANTIC -#pragma GCC diagnostic error "-Wpedantic" -#endif - #include #include #include @@ -35,7 +24,6 @@ #include #include #include -#include #include #include @@ -129,7 +117,6 @@ struct mlx5_local_data { }; extern struct mlx5_shared_data *mlx5_shared_data; -extern struct rte_pci_driver mlx5_driver; /* Dev ops structs */ extern const struct eth_dev_ops mlx5_os_dev_ops; @@ -377,8 +364,9 @@ struct mlx5_flow_counter { struct mlx5_flow_counter_ext { uint32_t shared:1; /**< Share counter ID with other flow rules. */ uint32_t batch: 1; + uint32_t skipped:1; /* This counter is skipped or not. */ /**< Whether the counter was allocated by batch command. */ - uint32_t ref_cnt:30; /**< Reference counter. */ + uint32_t ref_cnt:29; /**< Reference counter. */ uint32_t id; /**< User counter ID. */ union { /**< Holds the counters for the rule. */ #if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) @@ -401,8 +389,9 @@ struct mlx5_flow_counter_pool { rte_atomic64_t a64_dcs; }; /* The devx object of the minimum counter ID. */ - uint32_t index:29; /* Pool index in container. */ + uint32_t index:28; /* Pool index in container. */ uint32_t type:2; /* Memory type behind the counter array. */ + uint32_t skip_cnt:1; /* Pool contains skipped counter. */ volatile uint32_t query_gen:1; /* Query round. */ rte_spinlock_t sl; /* The pool lock. */ struct mlx5_counter_stats_raw *raw; @@ -538,7 +527,7 @@ struct mlx5_flow_id_pool { struct mlx5_txpp_wq { /* Completion Queue related data.*/ struct mlx5_devx_obj *cq; - struct mlx5dv_devx_umem *cq_umem; + void *cq_umem; union { volatile void *cq_buf; volatile struct mlx5_cqe *cqes; @@ -548,7 +537,7 @@ struct mlx5_txpp_wq { uint32_t arm_sn:2; /* Send Queue related data.*/ struct mlx5_devx_obj *sq; - struct mlx5dv_devx_umem *sq_umem; + void *sq_umem; union { volatile void *sq_buf; volatile struct mlx5_wqe *wqes; @@ -574,10 +563,10 @@ struct mlx5_dev_txpp { int32_t skew; /* Scheduling skew. */ uint32_t eqn; /* Event Queue number. */ struct rte_intr_handle intr_handle; /* Periodic interrupt. */ - struct mlx5dv_devx_event_channel *echan; /* Event Channel. */ + void *echan; /* Event Channel. */ struct mlx5_txpp_wq clock_queue; /* Clock Queue. */ struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */ - struct mlx5dv_pp *pp; /* Packet pacing context. */ + void *pp; /* Packet pacing context. */ uint16_t pp_id; /* Packet pacing context index. */ uint16_t ts_n; /* Number of captured timestamps. */ uint16_t ts_p; /* Pointer to statisticks timestamp. */ @@ -647,7 +636,7 @@ struct mlx5_dev_ctx_shared { void *esw_drop_action; /* Pointer to DR E-Switch drop action. */ void *pop_vlan_action; /* Pointer to DR pop VLAN action. */ uint32_t encaps_decaps; /* Encap/decap action indexed memory list. */ - LIST_HEAD(modify_cmd, mlx5_flow_dv_modify_hdr_resource) modify_cmds; + struct mlx5_hlist *modify_cmds; struct mlx5_hlist *tag_table; uint32_t port_id_action_list; /* List of port ID actions. */ uint32_t push_vlan_action_list; /* List of push VLAN actions. */ @@ -664,9 +653,10 @@ struct mlx5_dev_ctx_shared { struct mlx5_devx_obj *tis; /* TIS object. */ struct mlx5_devx_obj *td; /* Transport domain. */ struct mlx5_flow_id_pool *flow_id_pool; /* Flow ID pool. */ - struct mlx5dv_devx_uar *tx_uar; /* Tx/packer pacing shared UAR. */ + void *tx_uar; /* Tx/packet pacing shared UAR. */ struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX]; /* Flex parser profiles information. */ + void *devx_rx_uar; /* DevX UAR for Rx. */ struct mlx5_dev_shared_port port[]; /* per device port data array. */ }; @@ -686,6 +676,42 @@ TAILQ_HEAD(mlx5_flow_meters, mlx5_flow_meter); #define MLX5_PROC_PRIV(port_id) \ ((struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private) +enum mlx5_rxq_obj_type { + MLX5_RXQ_OBJ_TYPE_IBV, /* mlx5_rxq_obj with ibv_wq. */ + MLX5_RXQ_OBJ_TYPE_DEVX_RQ, /* mlx5_rxq_obj with mlx5_devx_rq. */ + MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN, + /* mlx5_rxq_obj with mlx5_devx_rq and hairpin support. */ +}; + +/* Verbs/DevX Rx queue elements. */ +struct mlx5_rxq_obj { + LIST_ENTRY(mlx5_rxq_obj) next; /* Pointer to the next element. */ + struct mlx5_rxq_ctrl *rxq_ctrl; /* Back pointer to parent. */ + enum mlx5_rxq_obj_type type; + int fd; /* File descriptor for event channel */ + RTE_STD_C11 + union { + struct { + void *wq; /* Work Queue. */ + void *ibv_cq; /* Completion Queue. */ + void *ibv_channel; + }; + struct { + struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */ + struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */ + void *devx_channel; + }; + }; +}; + +/* HW objects operations structure. */ +struct mlx5_obj_ops { + int (*rxq_obj_modify_vlan_strip)(struct mlx5_rxq_obj *rxq_obj, int on); + int (*rxq_obj_new)(struct rte_eth_dev *dev, uint16_t idx); + int (*rxq_event_get)(struct mlx5_rxq_obj *rxq_obj); + void (*rxq_obj_release)(struct mlx5_rxq_obj *rxq_obj); +}; + struct mlx5_priv { struct rte_eth_dev_data *dev_data; /* Pointer to device data. */ struct mlx5_dev_ctx_shared *sh; /* Shared device context. */ @@ -729,6 +755,7 @@ struct mlx5_priv { void *rss_desc; /* Intermediate rss description resources. */ int flow_idx; /* Intermediate device flow index. */ int flow_nested_idx; /* Intermediate device flow index, nested. */ + struct mlx5_obj_ops *obj_ops; /* HW objects operations. */ LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */ LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */ uint32_t hrxqs; /* Verbs Hash Rx queues. */ @@ -794,7 +821,6 @@ void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn, void mlx5_set_metadata_mask(struct rte_eth_dev *dev); int mlx5_dev_check_sibling_config(struct mlx5_priv *priv, struct mlx5_dev_config *config); -int mlx5_init_once(void); int mlx5_dev_configure(struct rte_eth_dev *dev); int mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info); int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size); @@ -815,37 +841,30 @@ const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev); int mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu); int mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap); +eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev); +struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port, bool valid); +struct mlx5_priv *mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev); +int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev); /* mlx5_ethdev_os.c */ -int mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]); unsigned int mlx5_ifindex(const struct rte_eth_dev *dev); int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]); int mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu); int mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu); int mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock); int mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete); -int mlx5_force_link_status_change(struct rte_eth_dev *dev, int status); int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); -void mlx5_dev_link_status_handler(void *arg); void mlx5_dev_interrupt_handler(void *arg); void mlx5_dev_interrupt_handler_devx(void *arg); -void mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev); -void mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev); int mlx5_set_link_down(struct rte_eth_dev *dev); int mlx5_set_link_up(struct rte_eth_dev *dev); int mlx5_is_removed(struct rte_eth_dev *dev); -eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev); -eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev); -struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port, bool valid); -struct mlx5_priv *mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev); int mlx5_sysfs_switch_info(unsigned int ifindex, struct mlx5_switch_info *info); -void mlx5_sysfs_check_switch_info(bool device_dir, - struct mlx5_switch_info *switch_info); void mlx5_translate_port_name(const char *port_name_in, struct mlx5_switch_info *port_info_out); void mlx5_intr_callback_unregister(const struct rte_intr_handle *handle, @@ -854,7 +873,6 @@ int mlx5_get_module_info(struct rte_eth_dev *dev, struct rte_eth_dev_module_info *modinfo); int mlx5_get_module_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *info); -int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev); int mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, uint64_t *stat); int mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats); @@ -866,8 +884,6 @@ void mlx5_os_stats_init(struct rte_eth_dev *dev); void mlx5_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index); int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, uint32_t index, uint32_t vmdq); -struct mlx5_nl_vlan_vmwa_context *mlx5_vlan_vmwa_init - (struct rte_eth_dev *dev, uint32_t ifindex); int mlx5_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); int mlx5_set_mc_addr_list(struct rte_eth_dev *dev, struct rte_ether_addr *mc_addr_set, @@ -910,11 +926,15 @@ int mlx5_xstats_get_names(struct rte_eth_dev *dev __rte_unused, int mlx5_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on); void mlx5_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on); int mlx5_vlan_offload_set(struct rte_eth_dev *dev, int mask); -void mlx5_vlan_vmwa_exit(struct mlx5_nl_vlan_vmwa_context *ctx); + +/* mlx5_vlan_os.c */ + +void mlx5_vlan_vmwa_exit(void *ctx); void mlx5_vlan_vmwa_release(struct rte_eth_dev *dev, struct mlx5_vf_vlan *vf_vlan); void mlx5_vlan_vmwa_acquire(struct rte_eth_dev *dev, struct mlx5_vf_vlan *vf_vlan); +void *mlx5_vlan_vmwa_init(struct rte_eth_dev *dev, uint32_t ifindex); /* mlx5_trigger.c */ @@ -986,11 +1006,16 @@ void mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev); int mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, uint32_t nb_contexts, struct rte_flow_error *error); -/* mlx5_mp.c */ -int mlx5_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer); -int mlx5_mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer); -void mlx5_mp_req_start_rxtx(struct rte_eth_dev *dev); -void mlx5_mp_req_stop_rxtx(struct rte_eth_dev *dev); +/* mlx5_mp_os.c */ + +int mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, + const void *peer); +int mlx5_mp_os_secondary_handle(const struct rte_mp_msg *mp_msg, + const void *peer); +void mlx5_mp_os_req_start_rxtx(struct rte_eth_dev *dev); +void mlx5_mp_os_req_stop_rxtx(struct rte_eth_dev *dev); +int mlx5_mp_os_req_queue_control(struct rte_eth_dev *dev, uint16_t queue_id, + enum mlx5_mp_req_type req_type); /* mlx5_socket.c */ @@ -1030,6 +1055,8 @@ int mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, unsigned int iface_idx, int vf_index); int mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable); int mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable); +int mlx5_os_set_nonblock_channel_fd(int fd); +void mlx5_os_mac_addr_flush(struct rte_eth_dev *dev); /* mlx5_txpp.c */ @@ -1045,4 +1072,8 @@ int mlx5_txpp_xstats_get_names(struct rte_eth_dev *dev, unsigned int n, unsigned int n_used); void mlx5_txpp_interrupt_handler(void *cb_arg); +/* mlx5_rxtx.c */ + +eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev); + #endif /* RTE_PMD_MLX5_H_ */