X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=68acc0186252329f1fe940071407264696e5d214;hb=250e2ed8d85d038ce864052ebd6f9af51db40df2;hp=d88b1433fbd052d7c7f5262d9ab937a4cd78e119;hpb=a7f34989e9ade83ca14a8424e73452d0e3e018c3;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index d88b1433fb..68acc01862 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -155,6 +155,13 @@ struct mlx5_flow_dump_ack { /** Key string for IPC. */ #define MLX5_MP_NAME "net_mlx5_mp" +/** Initialize a multi-process ID. */ +static inline void +mlx5_mp_id_init(struct mlx5_mp_id *mp_id, uint16_t port_id) +{ + mp_id->port_id = port_id; + strlcpy(mp_id->name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); +} LIST_HEAD(mlx5_dev_list, mlx5_dev_ctx_shared); @@ -243,7 +250,8 @@ struct mlx5_dev_config { unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */ unsigned int hw_padding:1; /* End alignment padding is supported. */ unsigned int vf:1; /* This is a VF. */ - unsigned int tunnel_en:1; + unsigned int sf:1; /* This is a SF. */ + unsigned int tunnel_en:3; /* Whether tunnel stateless offloads are supported. */ unsigned int mpls_en:1; /* MPLS over GRE/UDP is enabled. */ unsigned int cqe_comp:1; /* CQE compression is enabled. */ @@ -259,7 +267,7 @@ struct mlx5_dev_config { unsigned int dv_xmeta_en:2; /* Enable extensive flow metadata. */ unsigned int lacp_by_user:1; /* Enable user to manage LACP traffic. */ - unsigned int swp:1; /* Tx generic tunnel checksum and TSO offload. */ + unsigned int swp:3; /* Tx generic tunnel checksum and TSO offload. */ unsigned int devx:1; /* Whether devx interface is available or not. */ unsigned int dest_tir:1; /* Whether advanced DR API is available. */ unsigned int reclaim_mode:2; /* Memory reclaim mode. */ @@ -269,6 +277,8 @@ struct mlx5_dev_config { unsigned int dv_miss_info:1; /* restore packet after partial hw miss */ unsigned int allow_duplicate_pattern:1; /* Allow/Prevent the duplicate rules pattern. */ + unsigned int mr_mempool_reg_en:1; + /* Allow/prevent implicit mempool memory registration. */ struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ @@ -323,7 +333,6 @@ struct mlx5_lb_ctx { #define MLX5_MAX_PENDING_QUERIES 4 #define MLX5_CNT_CONTAINER_RESIZE 64 #define MLX5_CNT_SHARED_OFFSET 0x80000000 -#define IS_LEGACY_SHARED_CNT(cnt) (!!((cnt) & MLX5_CNT_SHARED_OFFSET)) #define IS_BATCH_CNT(cnt) (((cnt) & (MLX5_CNT_SHARED_OFFSET - 1)) >= \ MLX5_CNT_BATCH_OFFSET) #define MLX5_CNT_SIZE (sizeof(struct mlx5_flow_counter)) @@ -391,12 +400,6 @@ struct mlx5_flow_counter_shared { }; }; -/* Shared counter configuration. */ -struct mlx5_shared_counter_conf { - struct rte_eth_dev *dev; /* The device shared counter belongs to. */ - uint32_t id; /* The shared counter ID. */ -}; - struct mlx5_flow_counter_pool; /* Generic counters information. */ struct mlx5_flow_counter { @@ -630,11 +633,11 @@ struct mlx5_dev_shared_port { */ #define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8 -/*ASO flow meter structures*/ +/* ASO flow meter structures */ /* Modify this value if enum rte_mtr_color changes. */ #define RTE_MTR_DROPPED RTE_COLORS -/* Yellow is not supported. */ -#define MLX5_MTR_RTE_COLORS (RTE_COLOR_GREEN + 1) +/* Yellow is now supported. */ +#define MLX5_MTR_RTE_COLORS (RTE_COLOR_YELLOW + 1) /* table_id 22 bits in mlx5_flow_tbl_key so limit policy number. */ #define MLX5_MAX_SUB_POLICY_TBL_NUM 0x3FFFFF #define MLX5_INVALID_POLICY_ID UINT32_MAX @@ -642,6 +645,14 @@ struct mlx5_dev_shared_port { #define MLX5_MTR_TABLE_ID_SUFFIX 1 /* Drop table_id on MLX5_FLOW_TABLE_LEVEL_METER. */ #define MLX5_MTR_TABLE_ID_DROP 2 +/* Priority of the meter policy matcher. */ +#define MLX5_MTR_POLICY_MATCHER_PRIO 0 +/* Default policy. */ +#define MLX5_MTR_POLICY_MODE_DEF 1 +/* Only green color valid. */ +#define MLX5_MTR_POLICY_MODE_OG 2 +/* Only yellow color valid. */ +#define MLX5_MTR_POLICY_MODE_OY 3 enum mlx5_meter_domain { MLX5_MTR_DOMAIN_INGRESS, @@ -739,6 +750,10 @@ struct mlx5_flow_meter_policy { /* Is queue action in policy table. */ uint32_t is_hierarchy:1; /* Is meter action in policy table. */ + uint32_t skip_y:1; + /* If yellow color policy is skipped. */ + uint32_t skip_g:1; + /* If green color policy is skipped. */ rte_spinlock_t sl; uint32_t ref_cnt; /* Use count. */ @@ -859,6 +874,8 @@ struct mlx5_flow_meter_profile { /**< srtcm_rfc2697 struct. */ }; uint32_t ref_cnt; /**< Use count. */ + uint32_t g_support:1; /**< If G color will be generated. */ + uint32_t y_support:1; /**< If Y color will be generated. */ }; /* 2 meters in each ASO cache line */ @@ -1114,6 +1131,8 @@ struct mlx5_dev_ctx_shared { uint32_t flow_hit_aso_en:1; /* Flow Hit ASO is supported. */ uint32_t rq_ts_format:2; /* RQ timestamp formats supported. */ uint32_t sq_ts_format:2; /* SQ timestamp formats supported. */ + uint32_t steering_format_version:4; + /* Indicates the device steering logic format. */ uint32_t qp_ts_format:2; /* QP timestamp formats supported. */ uint32_t meter_aso_en:1; /* Flow Meter ASO is supported. */ uint32_t ct_aso_en:1; /* Connection Tracking ASO is supported. */ @@ -1164,8 +1183,6 @@ struct mlx5_dev_ctx_shared { void *default_miss_action; /* Default miss action. */ struct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX]; struct mlx5_indexed_pool *mdh_ipools[MLX5_MAX_MODIFY_NUM]; - /* Memory Pool for mlx5 flow resources. */ - struct mlx5_l3t_tbl *cnt_id_tbl; /* Shared counter lookup table. */ /* Shared interrupt handler section. */ struct rte_intr_handle intr_handle; /* Interrupt handler for device. */ struct rte_intr_handle intr_handle_devx; /* DEVX interrupt handler. */ @@ -1394,6 +1411,7 @@ struct mlx5_priv { unsigned int (*reta_idx)[]; /* RETA index table. */ unsigned int reta_idx_n; /* RETA index size. */ struct mlx5_drop drop_queue; /* Flow drop queues. */ + void *root_drop_action; /* Pointer to root drop action. */ struct mlx5_indexed_pool *flows[MLX5_FLOW_TYPE_MAXI]; /* RTE Flow rules. */ uint32_t ctrl_flows; /* Control flow rules. */ @@ -1465,7 +1483,9 @@ int mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev, struct rte_eth_udp_tunnel *udp_tunnel); uint16_t mlx5_eth_find_next(uint16_t port_id, struct rte_device *odev); int mlx5_dev_close(struct rte_eth_dev *dev); +int mlx5_net_remove(struct rte_device *dev); bool mlx5_is_hpf(struct rte_eth_dev *dev); +bool mlx5_is_sf_repr(struct rte_eth_dev *dev); void mlx5_age_event_prepare(struct mlx5_dev_ctx_shared *sh); /* Macro to iterate over all valid ports for mlx5 driver. */ @@ -1478,13 +1498,15 @@ struct mlx5_dev_ctx_shared * mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, const struct mlx5_dev_config *config); void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh); +int mlx5_dev_ctx_shared_mempool_subscribe(struct rte_eth_dev *dev); void mlx5_free_table_hash_list(struct mlx5_priv *priv); int mlx5_alloc_table_hash_list(struct mlx5_priv *priv); void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn, struct mlx5_dev_config *config); void mlx5_set_metadata_mask(struct rte_eth_dev *dev); int mlx5_dev_check_sibling_config(struct mlx5_priv *priv, - struct mlx5_dev_config *config); + struct mlx5_dev_config *config, + struct rte_device *dpdk_dev); int mlx5_dev_configure(struct rte_eth_dev *dev); int mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info); int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size); @@ -1807,5 +1829,9 @@ int mlx5_aso_ct_query_by_wqe(struct mlx5_dev_ctx_shared *sh, struct rte_flow_action_conntrack *profile); int mlx5_aso_ct_available(struct mlx5_dev_ctx_shared *sh, struct mlx5_aso_ct_action *ct); +uint32_t +mlx5_get_supported_sw_parsing_offloads(const struct mlx5_hca_attr *attr); +uint32_t +mlx5_get_supported_tunneling_offloads(const struct mlx5_hca_attr *attr); #endif /* RTE_PMD_MLX5_H_ */