X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=7402798d4955ee1462792671921cb90521868388;hb=de90612f4061a1bd538ad894f1ed18bcf11d335b;hp=4786af82d04c384aae34d9a91d21de83ced02f8f;hpb=20b71e92ef8e0bac42143ae023f12c895829e44e;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 4786af82d0..7402798d49 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -51,17 +51,21 @@ enum { PCI_DEVICE_ID_MELLANOX_CONNECTX5EX = 0x1019, PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF = 0x101a, PCI_DEVICE_ID_MELLANOX_CONNECTX5BF = 0xa2d2, + PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF = 0xa2d3, + PCI_DEVICE_ID_MELLANOX_CONNECTX6 = 0x101b, + PCI_DEVICE_ID_MELLANOX_CONNECTX6VF = 0x101c, }; /** Switch information returned by mlx5_nl_switch_info(). */ struct mlx5_switch_info { uint32_t master:1; /**< Master device. */ uint32_t representor:1; /**< Representor device. */ + uint32_t port_name_new:1; /**< Rep. port name is in new format. */ int32_t port_name; /**< Representor port name. */ uint64_t switch_id; /**< Switch identifier. */ }; -LIST_HEAD(mlx5_dev_list, priv); +LIST_HEAD(mlx5_dev_list, mlx5_priv); /* Shared memory between primary and secondary processes. */ struct mlx5_shared_data { @@ -71,12 +75,34 @@ struct mlx5_shared_data { extern struct mlx5_shared_data *mlx5_shared_data; +struct mlx5_counter_ctrl { + /* Name of the counter. */ + char dpdk_name[RTE_ETH_XSTATS_NAME_SIZE]; + /* Name of the counter on the device table. */ + char ctr_name[RTE_ETH_XSTATS_NAME_SIZE]; + uint32_t ib:1; /**< Nonzero for IB counters. */ +}; + struct mlx5_xstats_ctrl { /* Number of device stats. */ uint16_t stats_n; + /* Number of device stats identified by PMD. */ + uint16_t mlx5_stats_n; /* Index in the device counters table. */ uint16_t dev_table_idx[MLX5_MAX_XSTATS]; uint64_t base[MLX5_MAX_XSTATS]; + struct mlx5_counter_ctrl info[MLX5_MAX_XSTATS]; +}; + +struct mlx5_stats_ctrl { + /* Base for imissed counter. */ + uint64_t imissed_base; +}; + +/* devx counter object */ +struct mlx5_devx_counter_set { + struct mlx5dv_devx_obj *obj; + int id; /* Flow counter ID */ }; /* Flow list . */ @@ -99,19 +125,20 @@ struct mlx5_dev_config { unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */ unsigned int hw_padding:1; /* End alignment padding is supported. */ unsigned int vf:1; /* This is a VF. */ - unsigned int mps:2; /* Multi-packet send supported mode. */ unsigned int tunnel_en:1; /* Whether tunnel stateless offloads are supported. */ unsigned int mpls_en:1; /* MPLS over GRE/UDP is enabled. */ - unsigned int flow_counter_en:1; /* Whether flow counter is supported. */ unsigned int cqe_comp:1; /* CQE compression is enabled. */ + unsigned int cqe_pad:1; /* CQE padding is enabled. */ unsigned int tso:1; /* Whether TSO is supported. */ unsigned int tx_vec_en:1; /* Tx vector is enabled. */ unsigned int rx_vec_en:1; /* Rx vector is enabled. */ unsigned int mpw_hdr_dseg:1; /* Enable DSEGs in the title WQEBB. */ unsigned int l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */ unsigned int vf_nl_en:1; /* Enable Netlink requests in VF mode. */ + unsigned int dv_flow_en:1; /* Enable DV flow. */ unsigned int swp:1; /* Tx generic tunnel checksum and TSO offload. */ + unsigned int devx:1; /* Whether devx interface is available or not. */ struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ @@ -122,11 +149,13 @@ struct mlx5_dev_config { unsigned int min_rxqs_num; /* Rx queue count threshold to enable MPRQ. */ } mprq; /* Configurations for Multi-Packet RQ. */ + int mps; /* Multi-packet send supported mode. */ unsigned int flow_prio; /* Number of flow priorities. */ unsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */ unsigned int ind_table_max_size; /* Maximum indirection table size. */ int txq_inline; /* Maximum packet size for inlining. */ int txqs_inline; /* Queue number threshold for inlining. */ + int txqs_vec; /* Queue number threshold for vectorized Tx. */ int inline_max_packet_sz; /* Max packet size for inlining. */ }; @@ -156,16 +185,46 @@ struct mlx5_drop { struct mlx5_rxq_ibv *rxq; /* Verbs Rx queue. */ }; -struct mnl_socket; +struct mlx5_flow_tcf_context; + +/* Per port data of shared IB device. */ +struct mlx5_ibv_shared_port { + uint32_t ih_port_id; + /* + * Interrupt handler port_id. Used by shared interrupt + * handler to find the corresponding rte_eth device + * by IB port index. If value is equal or greater + * RTE_MAX_ETHPORTS it means there is no subhandler + * installed for specified IB port index. + */ +}; -struct priv { - LIST_ENTRY(priv) mem_event_cb; /* Called by memory event callback. */ - struct rte_eth_dev_data *dev_data; /* Pointer to device data. */ - struct ibv_context *ctx; /* Verbs context. */ - struct ibv_device_attr_ex device_attr; /* Device properties. */ +/* + * Shared Infiniband device context for Master/Representors + * which belong to same IB device with multiple IB ports. + **/ +struct mlx5_ibv_shared { + LIST_ENTRY(mlx5_ibv_shared) next; + uint32_t refcnt; + uint32_t devx:1; /* Opened with DV. */ + uint32_t max_port; /* Maximal IB device port index. */ + struct ibv_context *ctx; /* Verbs/DV context. */ struct ibv_pd *pd; /* Protection Domain. */ char ibdev_name[IBV_SYSFS_NAME_MAX]; /* IB device name. */ char ibdev_path[IBV_SYSFS_PATH_MAX]; /* IB device path for secondary */ + struct ibv_device_attr_ex device_attr; /* Device properties. */ + pthread_mutex_t intr_mutex; /* Interrupt config mutex. */ + uint32_t intr_cnt; /* Interrupt handler reference counter. */ + struct rte_intr_handle intr_handle; /* Interrupt handler for device. */ + struct mlx5_ibv_shared_port port[]; /* per device port data array. */ +}; + +struct mlx5_priv { + LIST_ENTRY(mlx5_priv) mem_event_cb; + /**< Called by memory event callback. */ + struct rte_eth_dev_data *dev_data; /* Pointer to device data. */ + struct mlx5_ibv_shared *sh; /* Shared IB device context. */ + uint32_t ibv_port; /* IB device port number. */ struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES]; /* MAC addresses. */ BITFIELD_DECLARE(mac_own, uint64_t, MLX5_MAX_MAC_ADDRESSES); /* Bit-field of MAC addresses owned by the PMD. */ @@ -175,7 +234,9 @@ struct priv { uint16_t mtu; /* Configured MTU. */ unsigned int isolated:1; /* Whether isolated mode is enabled. */ unsigned int representor:1; /* Device is a port representor. */ + unsigned int master:1; /* Device is a E-Switch master. */ uint16_t domain_id; /* Switch domain identifier. */ + uint16_t vport_id; /* Associated VF vport index (if any). */ int32_t representor_id; /* Port representor identifier. */ /* RX/TX queues. */ unsigned int rxqs_n; /* RX queues array size. */ @@ -184,7 +245,6 @@ struct priv { struct mlx5_txq_data *(*txqs)[]; /* TX queues. */ struct rte_mempool *mprq_mp; /* Mempool for Multi-Packet RQ. */ struct rte_eth_rss_conf rss_conf; /* RSS configuration. */ - struct rte_intr_handle intr_handle; /* Interrupt handler. */ unsigned int (*reta_idx)[]; /* RETA index table. */ unsigned int reta_idx_n; /* RETA index size. */ struct mlx5_drop drop_queue; /* Flow drop queues. */ @@ -206,8 +266,12 @@ struct priv { LIST_HEAD(txqibv, mlx5_txq_ibv) txqsibv; /* Verbs Tx queues. */ /* Verbs Indirection tables. */ LIST_HEAD(ind_tables, mlx5_ind_table_ibv) ind_tbls; + LIST_HEAD(matchers, mlx5_flow_dv_matcher) matchers; + LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps; + LIST_HEAD(modify_cmd, mlx5_flow_dv_modify_hdr_resource) modify_cmds; uint32_t link_speed_capa; /* Link speed capabilities. */ struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */ + struct mlx5_stats_ctrl stats_ctrl; /* Stats control. */ int primary_socket; /* Unix socket for primary process. */ void *uar_base; /* Reserved address space for UAR mapping */ struct rte_intr_handle intr_handle_socket; /* Interrupt handler. */ @@ -222,7 +286,7 @@ struct priv { rte_spinlock_t uar_lock[MLX5_UAR_PAGE_NUM_MAX]; /* UAR same-page access control required in 32bit implementations. */ #endif - struct mnl_socket *mnl_socket; /* Libmnl socket. */ + struct mlx5_flow_tcf_context *tcf_context; /* TC flower context. */ }; #define PORT_ID(priv) ((priv)->dev_data->port_id) @@ -234,17 +298,15 @@ int mlx5_getenv_int(const char *); /* mlx5_ethdev.c */ -int mlx5_get_master_ifname(const struct rte_eth_dev *dev, - char (*ifname)[IF_NAMESIZE]); int mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]); -int mlx5_ifindex(const struct rte_eth_dev *dev); -int mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr, - int master); +unsigned int mlx5_ifindex(const struct rte_eth_dev *dev); +int mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr); int mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu); int mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags); int mlx5_dev_configure(struct rte_eth_dev *dev); void mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info); +int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size); const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev); int mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete); int mlx5_force_link_status_change(struct rte_eth_dev *dev, int status); @@ -267,6 +329,10 @@ eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev); unsigned int mlx5_dev_to_port_id(const struct rte_device *dev, uint16_t *port_list, unsigned int port_list_n); +int mlx5_sysfs_switch_info(unsigned int ifindex, + struct mlx5_switch_info *info); +bool mlx5_translate_port_name(const char *port_name_in, + struct mlx5_switch_info *port_info_out); /* mlx5_mac.c */ @@ -301,7 +367,7 @@ void mlx5_allmulticast_disable(struct rte_eth_dev *dev); /* mlx5_stats.c */ -void mlx5_xstats_init(struct rte_eth_dev *dev); +void mlx5_stats_init(struct rte_eth_dev *dev); int mlx5_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats); void mlx5_stats_reset(struct rte_eth_dev *dev); int mlx5_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *stats, @@ -375,7 +441,7 @@ int mlx5_socket_connect(struct rte_eth_dev *priv); /* mlx5_nl.c */ -int mlx5_nl_init(uint32_t nlgroups, int protocol); +int mlx5_nl_init(int protocol); int mlx5_nl_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac, uint32_t index); int mlx5_nl_mac_addr_remove(struct rte_eth_dev *dev, struct ether_addr *mac, @@ -384,15 +450,17 @@ void mlx5_nl_mac_addr_sync(struct rte_eth_dev *dev); void mlx5_nl_mac_addr_flush(struct rte_eth_dev *dev); int mlx5_nl_promisc(struct rte_eth_dev *dev, int enable); int mlx5_nl_allmulti(struct rte_eth_dev *dev, int enable); -unsigned int mlx5_nl_ifindex(int nl, const char *name); +unsigned int mlx5_nl_portnum(int nl, const char *name); +unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex); int mlx5_nl_switch_info(int nl, unsigned int ifindex, struct mlx5_switch_info *info); -/* mlx5_nl_flow.c */ - -int mlx5_nl_flow_init(struct mnl_socket *nl, unsigned int ifindex, - struct rte_flow_error *error); -struct mnl_socket *mlx5_nl_flow_socket_create(void); -void mlx5_nl_flow_socket_destroy(struct mnl_socket *nl); +/* mlx5_devx_cmds.c */ +int mlx5_devx_cmd_flow_counter_alloc(struct ibv_context *ctx, + struct mlx5_devx_counter_set *dcx); +int mlx5_devx_cmd_flow_counter_free(struct mlx5dv_devx_obj *obj); +int mlx5_devx_cmd_flow_counter_query(struct mlx5_devx_counter_set *dcx, + int clear, + uint64_t *pkts, uint64_t *bytes); #endif /* RTE_PMD_MLX5_H_ */