X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5.h;h=78d6eb72816f5fa9b093c2032b185732fbffa601;hb=8716f9942a408a79a114ac0496e4e7d55bc9944c;hp=1a21ce65c7b55cba817080a012edc7a754eaa1c3;hpb=50f95b23c9ba8237a7f376e2e90d4bfa04a3bab6;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 1a21ce65c7..78d6eb7281 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -14,16 +14,6 @@ #include #include -/* Verbs header. */ -/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ -#ifdef PEDANTIC -#pragma GCC diagnostic ignored "-Wpedantic" -#endif -#include -#ifdef PEDANTIC -#pragma GCC diagnostic error "-Wpedantic" -#endif - #include #include #include @@ -129,7 +119,6 @@ struct mlx5_local_data { }; extern struct mlx5_shared_data *mlx5_shared_data; -extern struct rte_pci_driver mlx5_driver; /* Dev ops structs */ extern const struct eth_dev_ops mlx5_os_dev_ops; @@ -377,8 +366,9 @@ struct mlx5_flow_counter { struct mlx5_flow_counter_ext { uint32_t shared:1; /**< Share counter ID with other flow rules. */ uint32_t batch: 1; + uint32_t skipped:1; /* This counter is skipped or not. */ /**< Whether the counter was allocated by batch command. */ - uint32_t ref_cnt:30; /**< Reference counter. */ + uint32_t ref_cnt:29; /**< Reference counter. */ uint32_t id; /**< User counter ID. */ union { /**< Holds the counters for the rule. */ #if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) @@ -401,8 +391,9 @@ struct mlx5_flow_counter_pool { rte_atomic64_t a64_dcs; }; /* The devx object of the minimum counter ID. */ - uint32_t index:29; /* Pool index in container. */ + uint32_t index:28; /* Pool index in container. */ uint32_t type:2; /* Memory type behind the counter array. */ + uint32_t skip_cnt:1; /* Pool contains skipped counter. */ volatile uint32_t query_gen:1; /* Query round. */ rte_spinlock_t sl; /* The pool lock. */ struct mlx5_counter_stats_raw *raw; @@ -667,6 +658,7 @@ struct mlx5_dev_ctx_shared { struct mlx5dv_devx_uar *tx_uar; /* Tx/packer pacing shared UAR. */ struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX]; /* Flex parser profiles information. */ + struct mlx5dv_devx_uar *devx_rx_uar; /* DevX UAR for Rx. */ struct mlx5_dev_shared_port port[]; /* per device port data array. */ }; @@ -738,7 +730,6 @@ struct mlx5_priv { LIST_HEAD(ind_tables, mlx5_ind_table_obj) ind_tbls; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - struct ibv_flow_action *verbs_action; /**< Verbs modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ uint8_t max_lro_msg_size; @@ -795,7 +786,6 @@ void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn, void mlx5_set_metadata_mask(struct rte_eth_dev *dev); int mlx5_dev_check_sibling_config(struct mlx5_priv *priv, struct mlx5_dev_config *config); -int mlx5_init_once(void); int mlx5_dev_configure(struct rte_eth_dev *dev); int mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info); int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size); @@ -816,39 +806,31 @@ const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev); int mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu); int mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap); +eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev); +struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port, bool valid); +struct mlx5_priv *mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev); +int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev); /* mlx5_ethdev_os.c */ int mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]); unsigned int mlx5_ifindex(const struct rte_eth_dev *dev); -int mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr); +int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]); int mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu); -int mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, - unsigned int flags); int mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu); int mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock); int mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete); -int mlx5_force_link_status_change(struct rte_eth_dev *dev, int status); int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); -void mlx5_dev_link_status_handler(void *arg); void mlx5_dev_interrupt_handler(void *arg); void mlx5_dev_interrupt_handler_devx(void *arg); -void mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev); -void mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev); int mlx5_set_link_down(struct rte_eth_dev *dev); int mlx5_set_link_up(struct rte_eth_dev *dev); int mlx5_is_removed(struct rte_eth_dev *dev); -eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev); -eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev); -struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port, bool valid); -struct mlx5_priv *mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev); int mlx5_sysfs_switch_info(unsigned int ifindex, struct mlx5_switch_info *info); -void mlx5_sysfs_check_switch_info(bool device_dir, - struct mlx5_switch_info *switch_info); void mlx5_translate_port_name(const char *port_name_in, struct mlx5_switch_info *port_info_out); void mlx5_intr_callback_unregister(const struct rte_intr_handle *handle, @@ -857,11 +839,14 @@ int mlx5_get_module_info(struct rte_eth_dev *dev, struct rte_eth_dev_module_info *modinfo); int mlx5_get_module_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *info); -int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev); +int mlx5_os_read_dev_stat(struct mlx5_priv *priv, + const char *ctr_name, uint64_t *stat); +int mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats); +int mlx5_os_get_stats_n(struct rte_eth_dev *dev); +void mlx5_os_stats_init(struct rte_eth_dev *dev); /* mlx5_mac.c */ -int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]); void mlx5_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index); int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, uint32_t index, uint32_t vmdq); @@ -927,7 +912,6 @@ int mlx5_traffic_restart(struct rte_eth_dev *dev); int mlx5_flow_discover_mreg_c(struct rte_eth_dev *eth_dev); bool mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev); -int mlx5_flow_discover_priorities(struct rte_eth_dev *dev); void mlx5_flow_print(struct rte_flow *flow); int mlx5_flow_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, @@ -986,11 +970,16 @@ void mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev); int mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, uint32_t nb_contexts, struct rte_flow_error *error); -/* mlx5_mp.c */ -int mlx5_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer); -int mlx5_mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer); -void mlx5_mp_req_start_rxtx(struct rte_eth_dev *dev); -void mlx5_mp_req_stop_rxtx(struct rte_eth_dev *dev); +/* mlx5_mp_os.c */ + +int mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, + const void *peer); +int mlx5_mp_os_secondary_handle(const struct rte_mp_msg *mp_msg, + const void *peer); +void mlx5_mp_os_req_start_rxtx(struct rte_eth_dev *dev); +void mlx5_mp_os_req_stop_rxtx(struct rte_eth_dev *dev); +int mlx5_mp_os_req_queue_control(struct rte_eth_dev *dev, uint16_t queue_id, + enum mlx5_mp_req_type req_type); /* mlx5_socket.c */ @@ -1020,13 +1009,17 @@ int mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev); void mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh); void mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh); -int mlx5_os_read_dev_stat(struct mlx5_priv *priv, - const char *ctr_name, uint64_t *stat); -int mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats); -int mlx5_os_get_stats_n(struct rte_eth_dev *dev); -void mlx5_os_stats_init(struct rte_eth_dev *dev); void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb); +void mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index); +int mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, + uint32_t index); +int mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, unsigned int iface_idx, + struct rte_ether_addr *mac_addr, + int vf_index); +int mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable); +int mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable); +int mlx5_os_set_nonblock_channel_fd(int fd); /* mlx5_txpp.c */ @@ -1042,4 +1035,8 @@ int mlx5_txpp_xstats_get_names(struct rte_eth_dev *dev, unsigned int n, unsigned int n_used); void mlx5_txpp_interrupt_handler(void *cb_arg); +/* mlx5_rxtx.c */ + +eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev); + #endif /* RTE_PMD_MLX5_H_ */