X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_flow.h;h=0f0e59dd2335a376e8269abec5a76282435f671c;hb=c59e2faf147339e9b8375e2698919b8c053b0666;hp=998da614906bb8f21e4931ae4e86a6f34115bfab;hpb=e484e40323327aa4c51f22d59a38bde40327743d;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 998da61490..0f0e59dd23 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -25,14 +25,16 @@ #include #include +#include + #include "mlx5.h" -#include "mlx5_prm.h" /* Private rte flow items. */ enum mlx5_rte_flow_item_type { MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN, MLX5_RTE_FLOW_ITEM_TYPE_TAG, MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, + MLX5_RTE_FLOW_ITEM_TYPE_VLAN, }; /* Private (internal) rte flow actions. */ @@ -109,18 +111,21 @@ enum mlx5_feature_name { #define MLX5_FLOW_ITEM_MARK (1u << 19) /* Pattern MISC bits. */ -#define MLX5_FLOW_LAYER_ICMP (1u << 19) -#define MLX5_FLOW_LAYER_ICMP6 (1u << 20) -#define MLX5_FLOW_LAYER_GRE_KEY (1u << 21) +#define MLX5_FLOW_LAYER_ICMP (1u << 20) +#define MLX5_FLOW_LAYER_ICMP6 (1u << 21) +#define MLX5_FLOW_LAYER_GRE_KEY (1u << 22) /* Pattern tunnel Layer bits (continued). */ -#define MLX5_FLOW_LAYER_IPIP (1u << 21) -#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 22) -#define MLX5_FLOW_LAYER_NVGRE (1u << 23) -#define MLX5_FLOW_LAYER_GENEVE (1u << 24) +#define MLX5_FLOW_LAYER_IPIP (1u << 23) +#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 24) +#define MLX5_FLOW_LAYER_NVGRE (1u << 25) +#define MLX5_FLOW_LAYER_GENEVE (1u << 26) /* Queue items. */ -#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 25) +#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 27) + +/* Pattern tunnel Layer bits (continued). */ +#define MLX5_FLOW_LAYER_GTP (1u << 28) /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ @@ -131,18 +136,12 @@ enum mlx5_feature_name { (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_OUTER_L3 | \ MLX5_FLOW_LAYER_OUTER_L4) -/* LRO support mask, i.e. flow contains IPv4/IPv6 and TCP. */ -#define MLX5_FLOW_LAYER_IPV4_LRO \ - (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L4_TCP) -#define MLX5_FLOW_LAYER_IPV6_LRO \ - (MLX5_FLOW_LAYER_OUTER_L3_IPV6 | MLX5_FLOW_LAYER_OUTER_L4_TCP) - /* Tunnel Masks. */ #define MLX5_FLOW_LAYER_TUNNEL \ (MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \ MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_NVGRE | MLX5_FLOW_LAYER_MPLS | \ MLX5_FLOW_LAYER_IPIP | MLX5_FLOW_LAYER_IPV6_ENCAP | \ - MLX5_FLOW_LAYER_GENEVE) + MLX5_FLOW_LAYER_GENEVE | MLX5_FLOW_LAYER_GTP) /* Inner Masks. */ #define MLX5_FLOW_LAYER_INNER_L3 \ @@ -188,20 +187,18 @@ enum mlx5_feature_name { #define MLX5_FLOW_ACTION_DEC_TTL (1u << 19) #define MLX5_FLOW_ACTION_SET_MAC_SRC (1u << 20) #define MLX5_FLOW_ACTION_SET_MAC_DST (1u << 21) -#define MLX5_FLOW_ACTION_VXLAN_ENCAP (1u << 22) -#define MLX5_FLOW_ACTION_VXLAN_DECAP (1u << 23) -#define MLX5_FLOW_ACTION_NVGRE_ENCAP (1u << 24) -#define MLX5_FLOW_ACTION_NVGRE_DECAP (1u << 25) -#define MLX5_FLOW_ACTION_RAW_ENCAP (1u << 26) -#define MLX5_FLOW_ACTION_RAW_DECAP (1u << 27) -#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1u << 28) -#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1u << 29) -#define MLX5_FLOW_ACTION_INC_TCP_ACK (1u << 30) -#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 31) -#define MLX5_FLOW_ACTION_SET_TAG (1ull << 32) -#define MLX5_FLOW_ACTION_MARK_EXT (1ull << 33) -#define MLX5_FLOW_ACTION_SET_META (1ull << 34) -#define MLX5_FLOW_ACTION_METER (1ull << 35) +#define MLX5_FLOW_ACTION_ENCAP (1u << 22) +#define MLX5_FLOW_ACTION_DECAP (1u << 23) +#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1u << 24) +#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1u << 25) +#define MLX5_FLOW_ACTION_INC_TCP_ACK (1u << 26) +#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 27) +#define MLX5_FLOW_ACTION_SET_TAG (1ull << 28) +#define MLX5_FLOW_ACTION_MARK_EXT (1ull << 29) +#define MLX5_FLOW_ACTION_SET_META (1ull << 30) +#define MLX5_FLOW_ACTION_METER (1ull << 31) +#define MLX5_FLOW_ACTION_SET_IPV4_DSCP (1ull << 32) +#define MLX5_FLOW_ACTION_SET_IPV6_DSCP (1ull << 33) #define MLX5_FLOW_FATE_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ @@ -211,15 +208,6 @@ enum mlx5_feature_name { (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ MLX5_FLOW_ACTION_JUMP) -#define MLX5_FLOW_ENCAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_ENCAP | \ - MLX5_FLOW_ACTION_NVGRE_ENCAP | \ - MLX5_FLOW_ACTION_RAW_ENCAP | \ - MLX5_FLOW_ACTION_OF_PUSH_VLAN) - -#define MLX5_FLOW_DECAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_DECAP | \ - MLX5_FLOW_ACTION_NVGRE_DECAP | \ - MLX5_FLOW_ACTION_RAW_DECAP | \ - MLX5_FLOW_ACTION_OF_POP_VLAN) #define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \ MLX5_FLOW_ACTION_SET_IPV4_DST | \ @@ -238,10 +226,15 @@ enum mlx5_feature_name { MLX5_FLOW_ACTION_OF_SET_VLAN_VID | \ MLX5_FLOW_ACTION_SET_TAG | \ MLX5_FLOW_ACTION_MARK_EXT | \ - MLX5_FLOW_ACTION_SET_META) + MLX5_FLOW_ACTION_SET_META | \ + MLX5_FLOW_ACTION_SET_IPV4_DSCP | \ + MLX5_FLOW_ACTION_SET_IPV6_DSCP) #define MLX5_FLOW_VLAN_ACTIONS (MLX5_FLOW_ACTION_OF_POP_VLAN | \ MLX5_FLOW_ACTION_OF_PUSH_VLAN) + +#define MLX5_FLOW_XCAP_ACTIONS (MLX5_FLOW_ACTION_ENCAP | MLX5_FLOW_ACTION_DECAP) + #ifndef IPPROTO_MPLS #define IPPROTO_MPLS 137 #endif @@ -288,6 +281,27 @@ enum mlx5_feature_name { /* IBV hash source bits for IPV6. */ #define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6) +/* IBV hash bits for L3 SRC. */ +#define MLX5_L3_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_SRC_IPV6) + +/* IBV hash bits for L3 DST. */ +#define MLX5_L3_DST_IBV_RX_HASH (IBV_RX_HASH_DST_IPV4 | IBV_RX_HASH_DST_IPV6) + +/* IBV hash bits for TCP. */ +#define MLX5_TCP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_TCP) + +/* IBV hash bits for UDP. */ +#define MLX5_UDP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_UDP | \ + IBV_RX_HASH_DST_PORT_UDP) + +/* IBV hash bits for L4 SRC. */ +#define MLX5_L4_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_SRC_PORT_UDP) + +/* IBV hash bits for L4 DST. */ +#define MLX5_L4_DST_IBV_RX_HASH (IBV_RX_HASH_DST_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_UDP) /* Geneve header first 16Bit */ #define MLX5_GENEVE_VER_MASK 0x3 @@ -315,6 +329,9 @@ enum mlx5_feature_name { #define MLX5_GENEVE_OPT_LEN_0 14 #define MLX5_GENEVE_OPT_LEN_1 63 +#define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \ + sizeof(struct rte_flow_item_ipv4)) + enum mlx5_flow_drv_type { MLX5_FLOW_TYPE_MIN, MLX5_FLOW_TYPE_DV, @@ -370,11 +387,14 @@ struct mlx5_flow_dv_tag_resource { /* * Number of modification commands. - * If extensive metadata registers are supported - * the maximal actions amount is 16 and 8 otherwise. + * If extensive metadata registers are supported, the maximal actions amount is + * 16 and 8 otherwise on root table. The validation could also be done in the + * lower driver layer. + * On non-root table, there is no limitation, but 32 is enough right now. */ -#define MLX5_MODIFY_NUM 16 -#define MLX5_MODIFY_NUM_NO_MREG 8 +#define MLX5_MAX_MODIFY_NUM 32 +#define MLX5_ROOT_TBL_MODIFY_NUM 16 +#define MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG 8 /* Modify resource structure */ struct mlx5_flow_dv_modify_hdr_resource { @@ -385,9 +405,9 @@ struct mlx5_flow_dv_modify_hdr_resource { /**< Verbs modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ uint32_t actions_num; /**< Number of modification actions. */ - struct mlx5_modification_cmd actions[MLX5_MODIFY_NUM]; - /**< Modification actions. */ uint64_t flags; /**< Flags for RDMA API. */ + struct mlx5_modification_cmd actions[]; + /**< Modification actions. */ }; /* Jump action resource structure. */ @@ -444,25 +464,28 @@ struct mlx5_flow_tbl_data_entry { /**< jump resource, at most one for each table created. */ }; -/* - * Max number of actions per DV flow. - * See CREATE_FLOW_MAX_FLOW_ACTIONS_SUPPORTED - * In rdma-core file providers/mlx5/verbs.c - */ -#define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8 +/* Verbs specification header. */ +struct ibv_spec_header { + enum ibv_flow_spec_type type; + uint16_t size; +}; + +struct mlx5_flow_rss { + uint32_t level; + uint32_t queue_num; /**< Number of entries in @p queue. */ + uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */ + uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */ + uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */ +}; -/* DV flows structure. */ -struct mlx5_flow_dv { - struct mlx5_hrxq *hrxq; /**< Hash Rx queues. */ +/** Device flow handle structure for DV mode only. */ +struct mlx5_flow_handle_dv { /* Flow DV api: */ struct mlx5_flow_dv_matcher *matcher; /**< Cache to matcher. */ - struct mlx5_flow_dv_match_params value; - /**< Holds the value that the packet is compared to. */ struct mlx5_flow_dv_encap_decap_resource *encap_decap; /**< Pointer to encap/decap resource in cache. */ struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; /**< Pointer to modify header resource in cache. */ - struct ibv_flow *flow; /**< Installed flow. */ struct mlx5_flow_dv_jump_tbl_resource *jump; /**< Pointer to the jump action resource. */ struct mlx5_flow_dv_port_id_action_resource *port_id_action; @@ -473,65 +496,130 @@ struct mlx5_flow_dv { /**< Pointer to push VLAN action resource in cache. */ struct mlx5_flow_dv_tag_resource *tag_resource; /**< pointer to the tag action. */ +}; + +/** Device flow handle structure: used both for creating & destroying. */ +struct mlx5_flow_handle { + LIST_ENTRY(mlx5_flow_handle) next; + /**< Pointer to next device flow handle. */ + uint64_t layers; + /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ + uint64_t act_flags; + /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ + void *ib_flow; /**< Verbs flow pointer. */ + struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */ + struct mlx5_vf_vlan vf_vlan; /**< Structure for VF VLAN workaround. */ + union { + uint32_t qrss_id; /**< Uniqie Q/RSS suffix subflow tag. */ + uint32_t mtr_flow_id; /**< Unique meter match flow id. */ + }; #ifdef HAVE_IBV_FLOW_DV_SUPPORT - void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; - /**< Action list. */ + struct mlx5_flow_handle_dv dvh; #endif - int actions_n; /**< number of actions. */ }; -/* Verbs specification header. */ -struct ibv_spec_header { - enum ibv_flow_spec_type type; - uint16_t size; +/* + * Size for Verbs device flow handle structure only. Do not use the DV only + * structure in Verbs. No DV flows attributes will be accessed. + * Macro offsetof() could also be used here. + */ +#ifdef HAVE_IBV_FLOW_DV_SUPPORT +#define MLX5_FLOW_HANDLE_VERBS_SIZE \ + (sizeof(struct mlx5_flow_handle) - sizeof(struct mlx5_flow_handle_dv)) +#else +#define MLX5_FLOW_HANDLE_VERBS_SIZE (sizeof(struct mlx5_flow_handle)) +#endif + +/* + * Max number of actions per DV flow. + * See CREATE_FLOW_MAX_FLOW_ACTIONS_SUPPORTED + * in rdma-core file providers/mlx5/verbs.c. + */ +#define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8 + +/** Device flow structure only for DV flow creation. */ +struct mlx5_flow_dv_workspace { + uint32_t group; /**< The group index. */ + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ + int actions_n; /**< number of actions. */ + void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; /**< Action list. */ + struct mlx5_flow_dv_match_params value; + /**< Holds the value that the packet is compared to. */ }; -/** Handles information leading to a drop fate. */ -struct mlx5_flow_verbs { - LIST_ENTRY(mlx5_flow_verbs) next; +/* + * Maximal Verbs flow specifications & actions size. + * Some elements are mutually exclusive, but enough space should be allocated. + * Tunnel cases: 1. Max 2 Ethernet + IP(v6 len > v4 len) + TCP/UDP headers. + * 2. One tunnel header (exception: GRE + MPLS), + * SPEC length: GRE == tunnel. + * Actions: 1. 1 Mark OR Flag. + * 2. 1 Drop (if any). + * 3. No limitation for counters, but it makes no sense to support too + * many counters in a single device flow. + */ +#ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT +#define MLX5_VERBS_MAX_SPEC_SIZE \ + ( \ + (2 * (sizeof(struct ibv_flow_spec_eth) + \ + sizeof(struct ibv_flow_spec_ipv6) + \ + sizeof(struct ibv_flow_spec_tcp_udp)) + \ + sizeof(struct ibv_flow_spec_gre) + \ + sizeof(struct ibv_flow_spec_mpls)) \ + ) +#else +#define MLX5_VERBS_MAX_SPEC_SIZE \ + ( \ + (2 * (sizeof(struct ibv_flow_spec_eth) + \ + sizeof(struct ibv_flow_spec_ipv6) + \ + sizeof(struct ibv_flow_spec_tcp_udp)) + \ + sizeof(struct ibv_flow_spec_tunnel)) \ + ) +#endif + +#if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) || \ + defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) +#define MLX5_VERBS_MAX_ACT_SIZE \ + ( \ + sizeof(struct ibv_flow_spec_action_tag) + \ + sizeof(struct ibv_flow_spec_action_drop) + \ + sizeof(struct ibv_flow_spec_counter_action) * 4 \ + ) +#else +#define MLX5_VERBS_MAX_ACT_SIZE \ + ( \ + sizeof(struct ibv_flow_spec_action_tag) + \ + sizeof(struct ibv_flow_spec_action_drop) \ + ) +#endif + +#define MLX5_VERBS_MAX_SPEC_ACT_SIZE \ + (MLX5_VERBS_MAX_SPEC_SIZE + MLX5_VERBS_MAX_ACT_SIZE) + +/** Device flow structure only for Verbs flow creation. */ +struct mlx5_flow_verbs_workspace { unsigned int size; /**< Size of the attribute. */ - struct { - struct ibv_flow_attr *attr; - /**< Pointer to the Specification buffer. */ - uint8_t *specs; /**< Pointer to the specifications. */ - }; - struct ibv_flow *flow; /**< Verbs flow pointer. */ - struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */ - struct mlx5_vf_vlan vf_vlan; - /**< Structure for VF VLAN workaround. */ + struct ibv_flow_attr attr; /**< Verbs flow attribute buffer. */ + uint8_t specs[MLX5_VERBS_MAX_SPEC_ACT_SIZE]; + /**< Specifications & actions buffer of verbs flow. */ }; -struct mlx5_flow_rss { - uint32_t level; - uint32_t queue_num; /**< Number of entries in @p queue. */ - uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */ - uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */ - uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */ -}; +/** Maximal number of device sub-flows supported. */ +#define MLX5_NUM_MAX_DEV_FLOWS 32 /** Device flow structure. */ struct mlx5_flow { - LIST_ENTRY(mlx5_flow) next; struct rte_flow *flow; /**< Pointer to the main flow. */ - uint64_t layers; - /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ - uint64_t actions; - /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ + bool external; /**< true if the flow is created external to PMD. */ uint8_t ingress; /**< 1 if the flow is ingress. */ - uint32_t group; /**< The group index. */ - uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ union { #ifdef HAVE_IBV_FLOW_DV_SUPPORT - struct mlx5_flow_dv dv; + struct mlx5_flow_dv_workspace dv; #endif - struct mlx5_flow_verbs verbs; + struct mlx5_flow_verbs_workspace verbs; }; - union { - uint32_t qrss_id; /**< Uniqie Q/RSS suffix subflow tag. */ - uint32_t mtr_flow_id; /**< Unique meter match flow id. */ - }; - bool external; /**< true if the flow is created external to PMD. */ + struct mlx5_flow_handle *handle; }; /* Flow meter state. */ @@ -645,8 +733,8 @@ struct rte_flow { struct mlx5_flow_mreg_copy_resource *mreg_copy; /**< pointer to metadata register copy table resource. */ struct mlx5_flow_meter *meter; /**< Holds flow meter. */ - LIST_HEAD(dev_flows, mlx5_flow) dev_flows; - /**< Device flows that are part of the flow. */ + LIST_HEAD(dev_handles, mlx5_flow_handle) dev_handles; + /**< Device flow handles that are part of the flow. */ struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */ uint32_t hairpin_flow_id; /**< The flow id used for hairpin. */ uint32_t copy_applied:1; /**< The MARK copy Flow os applied. */ @@ -659,7 +747,8 @@ typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, bool external, struct rte_flow_error *error); typedef struct mlx5_flow *(*mlx5_flow_prepare_t) - (const struct rte_flow_attr *attr, const struct rte_flow_item items[], + (struct rte_eth_dev *dev, const struct rte_flow_attr *attr, + const struct rte_flow_item items[], const struct rte_flow_action actions[], struct rte_flow_error *error); typedef int (*mlx5_flow_translate_t)(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, @@ -724,20 +813,20 @@ struct mlx5_flow_driver_ops { /* mlx5_flow.c */ -struct mlx5_flow_id_pool *mlx5_flow_id_pool_alloc(void); +struct mlx5_flow_id_pool *mlx5_flow_id_pool_alloc(uint32_t max_id); void mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool); uint32_t mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id); uint32_t mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id); int mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, - bool external, uint32_t group, uint32_t *table, - struct rte_flow_error *error); + bool external, uint32_t group, bool fdb_def_rule, + uint32_t *table, struct rte_flow_error *error); uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel, uint64_t layer_types, uint64_t hash_fields); uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, uint32_t subpriority); -enum modify_reg mlx5_flow_get_reg_id(struct rte_eth_dev *dev, +int mlx5_flow_get_reg_id(struct rte_eth_dev *dev, enum mlx5_feature_name feature, uint32_t id, struct rte_flow_error *error);