X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_flow.h;h=4255472e54dc8d73dce3a7bd325837edd02f95cd;hb=7b4f1e6bd367;hp=ad9abb1c903f8f86473057cd6b36e53da77f6a98;hpb=f5bf91de738a3eeebb262c5cccc2eb6e7f4245a5;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index ad9abb1c90..4255472e54 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -21,8 +21,64 @@ #pragma GCC diagnostic error "-Wpedantic" #endif +#include +#include +#include + +#include + #include "mlx5.h" -#include "mlx5_prm.h" + +/* Private rte flow items. */ +enum mlx5_rte_flow_item_type { + MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN, + MLX5_RTE_FLOW_ITEM_TYPE_TAG, + MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, +}; + +/* Private (internal) rte flow actions. */ +enum mlx5_rte_flow_action_type { + MLX5_RTE_FLOW_ACTION_TYPE_END = INT_MIN, + MLX5_RTE_FLOW_ACTION_TYPE_TAG, + MLX5_RTE_FLOW_ACTION_TYPE_MARK, + MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, +}; + +/* Matches on selected register. */ +struct mlx5_rte_flow_item_tag { + enum modify_reg id; + uint32_t data; +}; + +/* Modify selected register. */ +struct mlx5_rte_flow_action_set_tag { + enum modify_reg id; + uint32_t data; +}; + +struct mlx5_flow_action_copy_mreg { + enum modify_reg dst; + enum modify_reg src; +}; + +/* Matches on source queue. */ +struct mlx5_rte_flow_item_tx_queue { + uint32_t queue; +}; + +/* Feature name to allocate metadata register. */ +enum mlx5_feature_name { + MLX5_HAIRPIN_RX, + MLX5_HAIRPIN_TX, + MLX5_METADATA_RX, + MLX5_METADATA_TX, + MLX5_METADATA_FDB, + MLX5_FLOW_MARK, + MLX5_APP_TAG, + MLX5_COPY_MARK, + MLX5_MTR_COLOR, + MLX5_MTR_SFX, +}; /* Pattern outer Layer bits. */ #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0) @@ -45,9 +101,30 @@ #define MLX5_FLOW_LAYER_VXLAN_GPE (1u << 13) #define MLX5_FLOW_LAYER_GRE (1u << 14) #define MLX5_FLOW_LAYER_MPLS (1u << 15) +/* List of tunnel Layer bits continued below. */ /* General pattern items bits. */ #define MLX5_FLOW_ITEM_METADATA (1u << 16) +#define MLX5_FLOW_ITEM_PORT_ID (1u << 17) +#define MLX5_FLOW_ITEM_TAG (1u << 18) +#define MLX5_FLOW_ITEM_MARK (1u << 19) + +/* Pattern MISC bits. */ +#define MLX5_FLOW_LAYER_ICMP (1u << 20) +#define MLX5_FLOW_LAYER_ICMP6 (1u << 21) +#define MLX5_FLOW_LAYER_GRE_KEY (1u << 22) + +/* Pattern tunnel Layer bits (continued). */ +#define MLX5_FLOW_LAYER_IPIP (1u << 23) +#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 24) +#define MLX5_FLOW_LAYER_NVGRE (1u << 25) +#define MLX5_FLOW_LAYER_GENEVE (1u << 26) + +/* Queue items. */ +#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 27) + +/* Pattern tunnel Layer bits (continued). */ +#define MLX5_FLOW_LAYER_GTP (1u << 28) /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ @@ -61,7 +138,9 @@ /* Tunnel Masks. */ #define MLX5_FLOW_LAYER_TUNNEL \ (MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \ - MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS) + MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_NVGRE | MLX5_FLOW_LAYER_MPLS | \ + MLX5_FLOW_LAYER_IPIP | MLX5_FLOW_LAYER_IPV6_ENCAP | \ + MLX5_FLOW_LAYER_GENEVE | MLX5_FLOW_LAYER_GTP) /* Inner Masks. */ #define MLX5_FLOW_LAYER_INNER_L3 \ @@ -113,9 +192,24 @@ #define MLX5_FLOW_ACTION_NVGRE_DECAP (1u << 25) #define MLX5_FLOW_ACTION_RAW_ENCAP (1u << 26) #define MLX5_FLOW_ACTION_RAW_DECAP (1u << 27) +#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1u << 28) +#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1u << 29) +#define MLX5_FLOW_ACTION_INC_TCP_ACK (1u << 30) +#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 31) +#define MLX5_FLOW_ACTION_SET_TAG (1ull << 32) +#define MLX5_FLOW_ACTION_MARK_EXT (1ull << 33) +#define MLX5_FLOW_ACTION_SET_META (1ull << 34) +#define MLX5_FLOW_ACTION_METER (1ull << 35) +#define MLX5_FLOW_ACTION_SET_IPV4_DSCP (1ull << 36) +#define MLX5_FLOW_ACTION_SET_IPV6_DSCP (1ull << 37) #define MLX5_FLOW_FATE_ACTIONS \ - (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS) + (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ + MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP) + +#define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ + (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ + MLX5_FLOW_ACTION_JUMP) #define MLX5_FLOW_ENCAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_ENCAP | \ MLX5_FLOW_ACTION_NVGRE_ENCAP | \ @@ -134,8 +228,20 @@ MLX5_FLOW_ACTION_SET_TTL | \ MLX5_FLOW_ACTION_DEC_TTL | \ MLX5_FLOW_ACTION_SET_MAC_SRC | \ - MLX5_FLOW_ACTION_SET_MAC_DST) - + MLX5_FLOW_ACTION_SET_MAC_DST | \ + MLX5_FLOW_ACTION_INC_TCP_SEQ | \ + MLX5_FLOW_ACTION_DEC_TCP_SEQ | \ + MLX5_FLOW_ACTION_INC_TCP_ACK | \ + MLX5_FLOW_ACTION_DEC_TCP_ACK | \ + MLX5_FLOW_ACTION_OF_SET_VLAN_VID | \ + MLX5_FLOW_ACTION_SET_TAG | \ + MLX5_FLOW_ACTION_MARK_EXT | \ + MLX5_FLOW_ACTION_SET_META | \ + MLX5_FLOW_ACTION_SET_IPV4_DSCP | \ + MLX5_FLOW_ACTION_SET_IPV6_DSCP) + +#define MLX5_FLOW_VLAN_ACTIONS (MLX5_FLOW_ACTION_OF_POP_VLAN | \ + MLX5_FLOW_ACTION_OF_PUSH_VLAN) #ifndef IPPROTO_MPLS #define IPPROTO_MPLS 137 #endif @@ -147,6 +253,9 @@ #define MLX5_UDP_PORT_VXLAN 4789 #define MLX5_UDP_PORT_VXLAN_GPE 4790 +/* UDP port numbers for GENEVE. */ +#define MLX5_UDP_PORT_GENEVE 6081 + /* Priority reserved for default flows. */ #define MLX5_FLOW_PRIO_RSVD ((uint32_t)-1) @@ -179,10 +288,57 @@ /* IBV hash source bits for IPV6. */ #define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6) +/* IBV hash bits for L3 SRC. */ +#define MLX5_L3_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_SRC_IPV6) + +/* IBV hash bits for L3 DST. */ +#define MLX5_L3_DST_IBV_RX_HASH (IBV_RX_HASH_DST_IPV4 | IBV_RX_HASH_DST_IPV6) + +/* IBV hash bits for TCP. */ +#define MLX5_TCP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_TCP) + +/* IBV hash bits for UDP. */ +#define MLX5_UDP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_UDP | \ + IBV_RX_HASH_DST_PORT_UDP) + +/* IBV hash bits for L4 SRC. */ +#define MLX5_L4_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_SRC_PORT_UDP) + +/* IBV hash bits for L4 DST. */ +#define MLX5_L4_DST_IBV_RX_HASH (IBV_RX_HASH_DST_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_UDP) + +/* Geneve header first 16Bit */ +#define MLX5_GENEVE_VER_MASK 0x3 +#define MLX5_GENEVE_VER_SHIFT 14 +#define MLX5_GENEVE_VER_VAL(a) \ + (((a) >> (MLX5_GENEVE_VER_SHIFT)) & (MLX5_GENEVE_VER_MASK)) +#define MLX5_GENEVE_OPTLEN_MASK 0x3F +#define MLX5_GENEVE_OPTLEN_SHIFT 7 +#define MLX5_GENEVE_OPTLEN_VAL(a) \ + (((a) >> (MLX5_GENEVE_OPTLEN_SHIFT)) & (MLX5_GENEVE_OPTLEN_MASK)) +#define MLX5_GENEVE_OAMF_MASK 0x1 +#define MLX5_GENEVE_OAMF_SHIFT 7 +#define MLX5_GENEVE_OAMF_VAL(a) \ + (((a) >> (MLX5_GENEVE_OAMF_SHIFT)) & (MLX5_GENEVE_OAMF_MASK)) +#define MLX5_GENEVE_CRITO_MASK 0x1 +#define MLX5_GENEVE_CRITO_SHIFT 6 +#define MLX5_GENEVE_CRITO_VAL(a) \ + (((a) >> (MLX5_GENEVE_CRITO_SHIFT)) & (MLX5_GENEVE_CRITO_MASK)) +#define MLX5_GENEVE_RSVD_MASK 0x3F +#define MLX5_GENEVE_RSVD_VAL(a) ((a) & (MLX5_GENEVE_RSVD_MASK)) +/* + * The length of the Geneve options fields, expressed in four byte multiples, + * not including the eight byte fixed tunnel. + */ +#define MLX5_GENEVE_OPT_LEN_0 14 +#define MLX5_GENEVE_OPT_LEN_1 63 + enum mlx5_flow_drv_type { MLX5_FLOW_TYPE_MIN, MLX5_FLOW_TYPE_DV, - MLX5_FLOW_TYPE_TCF, MLX5_FLOW_TYPE_VERBS, MLX5_FLOW_TYPE_MAX, }; @@ -198,12 +354,13 @@ struct mlx5_flow_dv_match_params { /* Matcher structure. */ struct mlx5_flow_dv_matcher { LIST_ENTRY(mlx5_flow_dv_matcher) next; - /* Pointer to the next element. */ + /**< Pointer to the next element. */ + struct mlx5_flow_tbl_resource *tbl; + /**< Pointer to the table(group) the matcher associated with. */ rte_atomic32_t refcnt; /**< Reference counter. */ void *matcher_object; /**< Pointer to DV matcher */ uint16_t crc; /**< CRC of key. */ uint16_t priority; /**< Priority of matcher. */ - uint8_t egress; /**< Egress matcher. */ struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */ }; @@ -214,16 +371,34 @@ struct mlx5_flow_dv_encap_decap_resource { LIST_ENTRY(mlx5_flow_dv_encap_decap_resource) next; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - struct ibv_flow_action *verbs_action; + void *verbs_action; /**< Verbs encap/decap action object. */ uint8_t buf[MLX5_ENCAP_MAX_LEN]; size_t size; uint8_t reformat_type; uint8_t ft_type; + uint64_t flags; /**< Flags for RDMA API. */ +}; + +/* Tag resource structure. */ +struct mlx5_flow_dv_tag_resource { + struct mlx5_hlist_entry entry; + /**< hash list entry for tag resource, tag value as the key. */ + void *action; + /**< Verbs tag action object. */ + rte_atomic32_t refcnt; /**< Reference counter. */ }; -/* Number of modification commands. */ -#define MLX5_MODIFY_NUM 8 +/* + * Number of modification commands. + * If extensive metadata registers are supported, the maximal actions amount is + * 16 and 8 otherwise on root table. The validation could also be done in the + * lower driver layer. + * On non-root table, there is no limitation, but 32 is enough right now. + */ +#define MLX5_MAX_MODIFY_NUM 32 +#define MLX5_ROOT_TBL_MODIFY_NUM 16 +#define MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG 8 /* Modify resource structure */ struct mlx5_flow_dv_modify_hdr_resource { @@ -234,10 +409,65 @@ struct mlx5_flow_dv_modify_hdr_resource { /**< Verbs modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ uint32_t actions_num; /**< Number of modification actions. */ - struct mlx5_modification_cmd actions[MLX5_MODIFY_NUM]; + uint64_t flags; /**< Flags for RDMA API. */ + struct mlx5_modification_cmd actions[]; /**< Modification actions. */ }; +/* Jump action resource structure. */ +struct mlx5_flow_dv_jump_tbl_resource { + rte_atomic32_t refcnt; /**< Reference counter. */ + uint8_t ft_type; /**< Flow table type, Rx or Tx. */ + void *action; /**< Pointer to the rdma core action. */ +}; + +/* Port ID resource structure. */ +struct mlx5_flow_dv_port_id_action_resource { + LIST_ENTRY(mlx5_flow_dv_port_id_action_resource) next; + /* Pointer to next element. */ + rte_atomic32_t refcnt; /**< Reference counter. */ + void *action; + /**< Verbs tag action object. */ + uint32_t port_id; /**< Port ID value. */ +}; + +/* Push VLAN action resource structure */ +struct mlx5_flow_dv_push_vlan_action_resource { + LIST_ENTRY(mlx5_flow_dv_push_vlan_action_resource) next; + /* Pointer to next element. */ + rte_atomic32_t refcnt; /**< Reference counter. */ + void *action; /**< Direct verbs action object. */ + uint8_t ft_type; /**< Flow table type, Rx, Tx or FDB. */ + rte_be32_t vlan_tag; /**< VLAN tag value. */ +}; + +/* Metadata register copy table entry. */ +struct mlx5_flow_mreg_copy_resource { + /* + * Hash list entry for copy table. + * - Key is 32/64-bit MARK action ID. + * - MUST be the first entry. + */ + struct mlx5_hlist_entry hlist_ent; + LIST_ENTRY(mlx5_flow_mreg_copy_resource) next; + /* List entry for device flows. */ + uint32_t refcnt; /* Reference counter. */ + uint32_t appcnt; /* Apply/Remove counter. */ + struct rte_flow *flow; /* Built flow for copy. */ +}; + +/* Table data structure of the hash organization. */ +struct mlx5_flow_tbl_data_entry { + struct mlx5_hlist_entry entry; + /**< hash list entry, 64-bits key inside. */ + struct mlx5_flow_tbl_resource tbl; + /**< flow table resource. */ + LIST_HEAD(matchers, mlx5_flow_dv_matcher) matchers; + /**< matchers' header associated with the flow table. */ + struct mlx5_flow_dv_jump_tbl_resource jump; + /**< jump resource, at most one for each table created. */ +}; + /* * Max number of actions per DV flow. * See CREATE_FLOW_MAX_FLOW_ACTIONS_SUPPORTED @@ -247,7 +477,6 @@ struct mlx5_flow_dv_modify_hdr_resource { /* DV flows structure. */ struct mlx5_flow_dv { - uint64_t hash_fields; /**< Fields that participate in the hash. */ struct mlx5_hrxq *hrxq; /**< Hash Rx queues. */ /* Flow DV api: */ struct mlx5_flow_dv_matcher *matcher; /**< Cache to matcher. */ @@ -258,29 +487,23 @@ struct mlx5_flow_dv { struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; /**< Pointer to modify header resource in cache. */ struct ibv_flow *flow; /**< Installed flow. */ + struct mlx5_flow_dv_jump_tbl_resource *jump; + /**< Pointer to the jump action resource. */ + struct mlx5_flow_dv_port_id_action_resource *port_id_action; + /**< Pointer to port ID action resource. */ + struct mlx5_vf_vlan vf_vlan; + /**< Structure for VF VLAN workaround. */ + struct mlx5_flow_dv_push_vlan_action_resource *push_vlan_res; + /**< Pointer to push VLAN action resource in cache. */ + struct mlx5_flow_dv_tag_resource *tag_resource; + /**< pointer to the tag action. */ #ifdef HAVE_IBV_FLOW_DV_SUPPORT - struct mlx5dv_flow_action_attr actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; + void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; /**< Action list. */ #endif int actions_n; /**< number of actions. */ }; -/** Linux TC flower driver for E-Switch flow. */ -struct mlx5_flow_tcf { - struct nlmsghdr *nlh; - struct tcmsg *tcm; - uint32_t *ptc_flags; /**< tc rule applied flags. */ - union { /**< Tunnel encap/decap descriptor. */ - struct flow_tcf_tunnel_hdr *tunnel; - struct flow_tcf_vxlan_decap *vxlan_decap; - struct flow_tcf_vxlan_encap *vxlan_encap; - }; - uint32_t applied:1; /**< Whether rule is currently applied. */ -#ifndef NDEBUG - uint32_t nlsize; /**< Size of NL message buffer for debug check. */ -#endif -}; - /* Verbs specification header. */ struct ibv_spec_header { enum ibv_flow_spec_type type; @@ -298,7 +521,16 @@ struct mlx5_flow_verbs { }; struct ibv_flow *flow; /**< Verbs flow pointer. */ struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */ - uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ + struct mlx5_vf_vlan vf_vlan; + /**< Structure for VF VLAN workaround. */ +}; + +struct mlx5_flow_rss { + uint32_t level; + uint32_t queue_num; /**< Number of entries in @p queue. */ + uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */ + uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */ + uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */ }; /** Device flow structure. */ @@ -307,52 +539,148 @@ struct mlx5_flow { struct rte_flow *flow; /**< Pointer to the main flow. */ uint64_t layers; /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ + uint64_t actions; + /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ + uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ + uint8_t ingress; /**< 1 if the flow is ingress. */ + uint32_t group; /**< The group index. */ + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ union { #ifdef HAVE_IBV_FLOW_DV_SUPPORT struct mlx5_flow_dv dv; #endif - struct mlx5_flow_tcf tcf; struct mlx5_flow_verbs verbs; }; + union { + uint32_t qrss_id; /**< Uniqie Q/RSS suffix subflow tag. */ + uint32_t mtr_flow_id; /**< Unique meter match flow id. */ + }; + bool external; /**< true if the flow is created external to PMD. */ }; -/* Counters information. */ -struct mlx5_flow_counter { - LIST_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next counter. */ - uint32_t shared:1; /**< Share counter ID with other flow rules. */ - uint32_t ref_cnt:31; /**< Reference counter. */ - uint32_t id; /**< Counter ID. */ - union { /**< Holds the counters for the rule. */ -#if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) - struct ibv_counter_set *cs; -#elif defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) - struct ibv_counters *cs; -#endif - struct mlx5_devx_counter_set *dcs; +/* Flow meter state. */ +#define MLX5_FLOW_METER_DISABLE 0 +#define MLX5_FLOW_METER_ENABLE 1 + +#define MLX5_MAN_WIDTH 8 +/* Modify this value if enum rte_mtr_color changes. */ +#define RTE_MTR_DROPPED RTE_COLORS + +/* Meter policer statistics */ +struct mlx5_flow_policer_stats { + struct mlx5_flow_counter *cnt[RTE_COLORS + 1]; + /**< Color counter, extra for drop. */ + uint64_t stats_mask; + /**< Statistics mask for the colors. */ +}; + +/* Meter table structure. */ +struct mlx5_meter_domain_info { + struct mlx5_flow_tbl_resource *tbl; + /**< Meter table. */ + void *any_matcher; + /**< Meter color not match default criteria. */ + void *color_matcher; + /**< Meter color match criteria. */ + void *jump_actn; + /**< Meter match action. */ + void *policer_rules[RTE_MTR_DROPPED + 1]; + /**< Meter policer for the match. */ +}; + +/* Meter table set for TX RX FDB. */ +struct mlx5_meter_domains_infos { + uint32_t ref_cnt; + /**< Table user count. */ + struct mlx5_meter_domain_info egress; + /**< TX meter table. */ + struct mlx5_meter_domain_info ingress; + /**< RX meter table. */ + struct mlx5_meter_domain_info transfer; + /**< FDB meter table. */ + void *drop_actn; + /**< Drop action as not matched. */ + void *count_actns[RTE_MTR_DROPPED + 1]; + /**< Counters for match and unmatched statistics. */ + uint32_t fmp[MLX5_ST_SZ_DW(flow_meter_parameters)]; + /**< Flow meter parameter. */ + size_t fmp_size; + /**< Flow meter parameter size. */ + void *meter_action; + /**< Flow meter action. */ +}; + +/* Meter parameter structure. */ +struct mlx5_flow_meter { + TAILQ_ENTRY(mlx5_flow_meter) next; + /**< Pointer to the next flow meter structure. */ + uint32_t meter_id; + /**< Meter id. */ + struct rte_mtr_params params; + /**< Meter rule parameters. */ + struct mlx5_flow_meter_profile *profile; + /**< Meter profile parameters. */ + struct rte_flow_attr attr; + /**< Flow attributes. */ + struct mlx5_meter_domains_infos *mfts; + /**< Flow table created for this meter. */ + struct mlx5_flow_policer_stats policer_stats; + /**< Meter policer statistics. */ + uint32_t ref_cnt; + /**< Use count. */ + uint32_t active_state:1; + /**< Meter state. */ + uint32_t shared:1; + /**< Meter shared or not. */ +}; + +/* RFC2697 parameter structure. */ +struct mlx5_flow_meter_srtcm_rfc2697_prm { + /* green_saturation_value = cbs_mantissa * 2^cbs_exponent */ + uint32_t cbs_exponent:5; + uint32_t cbs_mantissa:8; + /* cir = 8G * cir_mantissa * 1/(2^cir_exponent) Bytes/Sec */ + uint32_t cir_exponent:5; + uint32_t cir_mantissa:8; + /* yellow _saturation_value = ebs_mantissa * 2^ebs_exponent */ + uint32_t ebs_exponent:5; + uint32_t ebs_mantissa:8; +}; + +/* Flow meter profile structure. */ +struct mlx5_flow_meter_profile { + TAILQ_ENTRY(mlx5_flow_meter_profile) next; + /**< Pointer to the next flow meter structure. */ + uint32_t meter_profile_id; /**< Profile id. */ + struct rte_mtr_meter_profile profile; /**< Profile detail. */ + union { + struct mlx5_flow_meter_srtcm_rfc2697_prm srtcm_prm; + /**< srtcm_rfc2697 struct. */ }; - uint64_t hits; /**< Number of packets matched by the rule. */ - uint64_t bytes; /**< Number of bytes matched by the rule. */ + uint32_t ref_cnt; /**< Use count. */ }; /* Flow structure. */ struct rte_flow { TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */ - enum mlx5_flow_drv_type drv_type; /**< Drvier type. */ + enum mlx5_flow_drv_type drv_type; /**< Driver type. */ + struct mlx5_flow_rss rss; /**< RSS context. */ struct mlx5_flow_counter *counter; /**< Holds flow counter. */ - struct rte_flow_action_rss rss;/**< RSS context. */ - uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */ - uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */ + struct mlx5_flow_mreg_copy_resource *mreg_copy; + /**< pointer to metadata register copy table resource. */ + struct mlx5_flow_meter *meter; /**< Holds flow meter. */ LIST_HEAD(dev_flows, mlx5_flow) dev_flows; /**< Device flows that are part of the flow. */ - uint64_t actions; - /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */ + uint32_t hairpin_flow_id; /**< The flow id used for hairpin. */ + uint32_t copy_applied:1; /**< The MARK copy Flow os applied. */ }; typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, const struct rte_flow_item items[], const struct rte_flow_action actions[], + bool external, struct rte_flow_error *error); typedef struct mlx5_flow *(*mlx5_flow_prepare_t) (const struct rte_flow_attr *attr, const struct rte_flow_item items[], @@ -374,6 +702,27 @@ typedef int (*mlx5_flow_query_t)(struct rte_eth_dev *dev, const struct rte_flow_action *actions, void *data, struct rte_flow_error *error); +typedef struct mlx5_meter_domains_infos *(*mlx5_flow_create_mtr_tbls_t) + (struct rte_eth_dev *dev, + const struct mlx5_flow_meter *fm); +typedef int (*mlx5_flow_destroy_mtr_tbls_t)(struct rte_eth_dev *dev, + struct mlx5_meter_domains_infos *tbls); +typedef int (*mlx5_flow_create_policer_rules_t) + (struct rte_eth_dev *dev, + struct mlx5_flow_meter *fm, + const struct rte_flow_attr *attr); +typedef int (*mlx5_flow_destroy_policer_rules_t) + (struct rte_eth_dev *dev, + const struct mlx5_flow_meter *fm, + const struct rte_flow_attr *attr); +typedef struct mlx5_flow_counter * (*mlx5_flow_counter_alloc_t) + (struct rte_eth_dev *dev); +typedef void (*mlx5_flow_counter_free_t)(struct rte_eth_dev *dev, + struct mlx5_flow_counter *cnt); +typedef int (*mlx5_flow_counter_query_t)(struct rte_eth_dev *dev, + struct mlx5_flow_counter *cnt, + bool clear, uint64_t *pkts, + uint64_t *bytes); struct mlx5_flow_driver_ops { mlx5_flow_validate_t validate; mlx5_flow_prepare_t prepare; @@ -382,15 +731,43 @@ struct mlx5_flow_driver_ops { mlx5_flow_remove_t remove; mlx5_flow_destroy_t destroy; mlx5_flow_query_t query; + mlx5_flow_create_mtr_tbls_t create_mtr_tbls; + mlx5_flow_destroy_mtr_tbls_t destroy_mtr_tbls; + mlx5_flow_create_policer_rules_t create_policer_rules; + mlx5_flow_destroy_policer_rules_t destroy_policer_rules; + mlx5_flow_counter_alloc_t counter_alloc; + mlx5_flow_counter_free_t counter_free; + mlx5_flow_counter_query_t counter_query; }; + +#define MLX5_CNT_CONTAINER(sh, batch, thread) (&(sh)->cmng.ccont \ + [(((sh)->cmng.mhi[batch] >> (thread)) & 0x1) * 2 + (batch)]) +#define MLX5_CNT_CONTAINER_UNUSED(sh, batch, thread) (&(sh)->cmng.ccont \ + [(~((sh)->cmng.mhi[batch] >> (thread)) & 0x1) * 2 + (batch)]) + /* mlx5_flow.c */ +struct mlx5_flow_id_pool *mlx5_flow_id_pool_alloc(uint32_t max_id); +void mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool); +uint32_t mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id); +uint32_t mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, + uint32_t id); +int mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, + bool external, uint32_t group, uint32_t *table, + struct rte_flow_error *error); uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel, uint64_t layer_types, uint64_t hash_fields); uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, uint32_t subpriority); +int mlx5_flow_get_reg_id(struct rte_eth_dev *dev, + enum mlx5_feature_name feature, + uint32_t id, + struct rte_flow_error *error); +const struct rte_flow_action *mlx5_flow_find_action + (const struct rte_flow_action *actions, + enum rte_flow_action_type action); int mlx5_flow_validate_action_count(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, struct rte_flow_error *error); @@ -413,6 +790,7 @@ int mlx5_flow_validate_action_rss(const struct rte_flow_action *action, uint64_t action_flags, struct rte_eth_dev *dev, const struct rte_flow_attr *attr, + uint64_t item_flags, struct rte_flow_error *error); int mlx5_flow_validate_attributes(struct rte_eth_dev *dev, const struct rte_flow_attr *attributes, @@ -429,11 +807,21 @@ int mlx5_flow_validate_item_gre(const struct rte_flow_item *item, uint64_t item_flags, uint8_t target_protocol, struct rte_flow_error *error); +int mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, + uint64_t item_flags, + const struct rte_flow_item *gre_item, + struct rte_flow_error *error); int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, uint64_t item_flags, + uint64_t last_item, + uint16_t ether_type, + const struct rte_flow_item_ipv4 *acc_mask, struct rte_flow_error *error); int mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, uint64_t item_flags, + uint64_t last_item, + uint16_t ether_type, + const struct rte_flow_item_ipv6 *acc_mask, struct rte_flow_error *error); int mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev, const struct rte_flow_item *item, @@ -451,6 +839,7 @@ int mlx5_flow_validate_item_udp(const struct rte_flow_item *item, struct rte_flow_error *error); int mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, uint64_t item_flags, + struct rte_eth_dev *dev, struct rte_flow_error *error); int mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, uint64_t item_flags, @@ -459,12 +848,33 @@ int mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, uint64_t item_flags, struct rte_eth_dev *dev, struct rte_flow_error *error); - -/* mlx5_flow_tcf.c */ - -int mlx5_flow_tcf_init(struct mlx5_flow_tcf_context *ctx, - unsigned int ifindex, struct rte_flow_error *error); -struct mlx5_flow_tcf_context *mlx5_flow_tcf_context_create(void); -void mlx5_flow_tcf_context_destroy(struct mlx5_flow_tcf_context *ctx); - +int mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, + uint64_t item_flags, + uint8_t target_protocol, + struct rte_flow_error *error); +int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, + uint64_t item_flags, + uint8_t target_protocol, + struct rte_flow_error *error); +int mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, + uint64_t item_flags, + uint8_t target_protocol, + struct rte_flow_error *error); +int mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, + uint64_t item_flags, + struct rte_eth_dev *dev, + struct rte_flow_error *error); +struct mlx5_meter_domains_infos *mlx5_flow_create_mtr_tbls + (struct rte_eth_dev *dev, + const struct mlx5_flow_meter *fm); +int mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, + struct mlx5_meter_domains_infos *tbl); +int mlx5_flow_create_policer_rules(struct rte_eth_dev *dev, + struct mlx5_flow_meter *fm, + const struct rte_flow_attr *attr); +int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev, + struct mlx5_flow_meter *fm, + const struct rte_flow_attr *attr); +int mlx5_flow_meter_flush(struct rte_eth_dev *dev, + struct rte_mtr_error *error); #endif /* RTE_PMD_MLX5_FLOW_H_ */