X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_flow.h;h=b4be4769efee039ff1eb995b9bd190a6d9b534c3;hb=0f8f35a26a974e5510cec1ca6297537d07e3e782;hp=2c9667756e25154f5dc6d9a333d2ce7b196e9ee0;hpb=5af61440dd1d2be018b5bc0536975d6b200607e2;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 2c9667756e..b4be4769ef 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -11,20 +11,11 @@ #include #include -/* Verbs header. */ -/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ -#ifdef PEDANTIC -#pragma GCC diagnostic ignored "-Wpedantic" -#endif -#include -#ifdef PEDANTIC -#pragma GCC diagnostic error "-Wpedantic" -#endif - #include #include #include +#include #include #include "mlx5.h" @@ -43,6 +34,7 @@ enum mlx5_rte_flow_action_type { MLX5_RTE_FLOW_ACTION_TYPE_TAG, MLX5_RTE_FLOW_ACTION_TYPE_MARK, MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, + MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, }; /* Matches on selected register. */ @@ -127,6 +119,13 @@ enum mlx5_feature_name { /* Pattern tunnel Layer bits (continued). */ #define MLX5_FLOW_LAYER_GTP (1u << 28) +/* Pattern eCPRI Layer bit. */ +#define MLX5_FLOW_LAYER_ECPRI (UINT64_C(1) << 29) + +/* IPv6 Fragment Extension Header bit. */ +#define MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT (1u << 30) +#define MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT (1u << 31) + /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6) @@ -200,10 +199,13 @@ enum mlx5_feature_name { #define MLX5_FLOW_ACTION_SET_IPV4_DSCP (1ull << 32) #define MLX5_FLOW_ACTION_SET_IPV6_DSCP (1ull << 33) #define MLX5_FLOW_ACTION_AGE (1ull << 34) +#define MLX5_FLOW_ACTION_DEFAULT_MISS (1ull << 35) +#define MLX5_FLOW_ACTION_SAMPLE (1ull << 36) #define MLX5_FLOW_FATE_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ - MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP) + MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP | \ + MLX5_FLOW_ACTION_DEFAULT_MISS) #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ @@ -333,6 +335,14 @@ enum mlx5_feature_name { #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \ sizeof(struct rte_flow_item_ipv4)) +/* IPv4 fragment_offset field contains relevant data in bits 2 to 15. */ +#define MLX5_IPV4_FRAG_OFFSET_MASK \ + (RTE_IPV4_HDR_OFFSET_MASK | RTE_IPV4_HDR_MF_FLAG) + +/* Specific item's fields can accept a range of values (using spec and last). */ +#define MLX5_ITEM_RANGE_NOT_ACCEPTED false +#define MLX5_ITEM_RANGE_ACCEPTED true + /* Software header modify action numbers of a flow. */ #define MLX5_ACT_NUM_MDF_IPV4 1 #define MLX5_ACT_NUM_MDF_IPV6 4 @@ -364,6 +374,7 @@ enum mlx5_flow_fate_type { MLX5_FLOW_FATE_JUMP, MLX5_FLOW_FATE_PORT_ID, MLX5_FLOW_FATE_DROP, + MLX5_FLOW_FATE_DEFAULT_MISS, MLX5_FLOW_FATE_MAX, }; @@ -390,18 +401,31 @@ struct mlx5_flow_dv_matcher { #define MLX5_ENCAP_MAX_LEN 132 +/* Encap/decap resource key of the hash organization. */ +union mlx5_flow_encap_decap_key { + struct { + uint32_t ft_type:8; /**< Flow table type, Rx or Tx. */ + uint32_t refmt_type:8; /**< Header reformat type. */ + uint32_t buf_size:8; /**< Encap buf size. */ + uint32_t table_level:8; /**< Root table or not. */ + uint32_t cksum; /**< Encap buf check sum. */ + }; + uint64_t v64; /**< full 64bits value of key */ +}; + /* Encap/decap resource structure. */ struct mlx5_flow_dv_encap_decap_resource { - ILIST_ENTRY(uint32_t)next; + struct mlx5_hlist_entry entry; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - void *verbs_action; - /**< Verbs encap/decap action object. */ + void *action; + /**< Encap/decap action object. */ uint8_t buf[MLX5_ENCAP_MAX_LEN]; size_t size; uint8_t reformat_type; uint8_t ft_type; uint64_t flags; /**< Flags for RDMA API. */ + uint32_t idx; /**< Index for the index memory pool. */ }; /* Tag resource structure. */ @@ -409,7 +433,7 @@ struct mlx5_flow_dv_tag_resource { struct mlx5_hlist_entry entry; /**< hash list entry for tag resource, tag value as the key. */ void *action; - /**< Verbs tag action object. */ + /**< Tag action object. */ rte_atomic32_t refcnt; /**< Reference counter. */ uint32_t idx; /**< Index for the index memory pool. */ }; @@ -429,11 +453,11 @@ struct mlx5_flow_dv_tag_resource { /* Modify resource structure */ struct mlx5_flow_dv_modify_hdr_resource { - LIST_ENTRY(mlx5_flow_dv_modify_hdr_resource) next; + struct mlx5_hlist_entry entry; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - struct ibv_flow_action *verbs_action; - /**< Verbs modify header action object. */ + void *action; + /**< Modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ uint32_t actions_num; /**< Number of modification actions. */ uint64_t flags; /**< Flags for RDMA API. */ @@ -441,6 +465,17 @@ struct mlx5_flow_dv_modify_hdr_resource { /**< Modification actions. */ }; +/* Modify resource key of the hash organization. */ +union mlx5_flow_modify_hdr_key { + struct { + uint32_t ft_type:8; /**< Flow table type, Rx or Tx. */ + uint32_t actions_num:5; /**< Number of modification actions. */ + uint32_t group:19; /**< Flow group id. */ + uint32_t cksum; /**< Actions check sum. */ + }; + uint64_t v64; /**< full 64bits value of key */ +}; + /* Jump action resource structure. */ struct mlx5_flow_dv_jump_tbl_resource { rte_atomic32_t refcnt; /**< Reference counter. */ @@ -454,7 +489,7 @@ struct mlx5_flow_dv_port_id_action_resource { /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ void *action; - /**< Verbs tag action object. */ + /**< Action object. */ uint32_t port_id; /**< Port ID value. */ }; @@ -463,7 +498,7 @@ struct mlx5_flow_dv_push_vlan_action_resource { ILIST_ENTRY(uint32_t)next; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - void *action; /**< Direct verbs action object. */ + void *action; /**< Action object. */ uint8_t ft_type; /**< Flow table type, Rx, Tx or FDB. */ rte_be32_t vlan_tag; /**< VLAN tag value. */ }; @@ -497,6 +532,58 @@ struct mlx5_flow_tbl_data_entry { uint32_t idx; /**< index for the indexed mempool. */ }; +/* Sub rdma-core actions list. */ +struct mlx5_flow_sub_actions_list { + uint32_t actions_num; /**< Number of sample actions. */ + uint64_t action_flags; + void *dr_queue_action; + void *dr_tag_action; + void *dr_cnt_action; + void *dr_port_id_action; + void *dr_encap_action; +}; + +/* Sample sub-actions resource list. */ +struct mlx5_flow_sub_actions_idx { + uint32_t rix_hrxq; /**< Hash Rx queue object index. */ + uint32_t rix_tag; /**< Index to the tag action. */ + uint32_t cnt; + uint32_t rix_port_id_action; /**< Index to port ID action resource. */ + uint32_t rix_encap_decap; /**< Index to encap/decap resource. */ +}; + +/* Sample action resource structure. */ +struct mlx5_flow_dv_sample_resource { + ILIST_ENTRY(uint32_t)next; /**< Pointer to next element. */ + uint32_t refcnt; /**< Reference counter. */ + void *verbs_action; /**< Verbs sample action object. */ + uint8_t ft_type; /** Flow Table Type */ + uint32_t ft_id; /** Flow Table Level */ + uint32_t ratio; /** Sample Ratio */ + uint64_t set_action; /** Restore reg_c0 value */ + void *normal_path_tbl; /** Flow Table pointer */ + void *default_miss; /** default_miss dr_action. */ + struct mlx5_flow_sub_actions_idx sample_idx; + /**< Action index resources. */ + struct mlx5_flow_sub_actions_list sample_act; + /**< Action resources. */ +}; + +#define MLX5_MAX_DEST_NUM 2 + +/* Destination array action resource structure. */ +struct mlx5_flow_dv_dest_array_resource { + ILIST_ENTRY(uint32_t)next; /**< Pointer to next element. */ + uint32_t refcnt; /**< Reference counter. */ + uint8_t ft_type; /** Flow Table Type */ + uint8_t num_of_dest; /**< Number of destination actions. */ + void *action; /**< Pointer to the rdma core action. */ + struct mlx5_flow_sub_actions_idx sample_idx[MLX5_MAX_DEST_NUM]; + /**< Action index resources. */ + struct mlx5_flow_sub_actions_list sample_act[MLX5_MAX_DEST_NUM]; + /**< Action resources. */ +}; + /* Verbs specification header. */ struct ibv_spec_header { enum ibv_flow_spec_type type; @@ -512,6 +599,10 @@ struct mlx5_flow_rss_desc { uint16_t queue[]; /**< Destination queues to redirect traffic to. */ }; +/* PMD flow priority for tunnel */ +#define MLX5_TUNNEL_PRIO_GET(rss_desc) \ + ((rss_desc)->level >= 2 ? MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4) + /** Device flow handle structure for DV mode only. */ struct mlx5_flow_handle_dv { @@ -525,6 +616,10 @@ struct mlx5_flow_handle_dv { /**< Index to push VLAN action resource in cache. */ uint32_t rix_tag; /**< Index to the tag action. */ + uint32_t rix_sample; + /**< Index to sample action resource in cache. */ + uint32_t rix_dest_array; + /**< Index to destination array resource in cache. */ } __rte_packed; /** Device flow handle structure: used both for creating & destroying. */ @@ -534,7 +629,7 @@ struct mlx5_flow_handle { /**< Index to next device flow handle. */ uint64_t layers; /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ - void *ib_flow; /**< Verbs flow pointer. */ + void *drv_flow; /**< pointer to driver flow object. */ uint32_t split_flow_id:28; /**< Sub flow unique match flow id. */ uint32_t mark:1; /**< Metadate rxq mark flag. */ uint32_t fate_action:3; /**< Fate action type. */ @@ -545,6 +640,8 @@ struct mlx5_flow_handle { /**< Index to port ID action resource. */ uint32_t rix_fate; /**< Generic value indicates the fate action. */ + uint32_t rix_default_fate; + /**< Indicates default miss fate action. */ }; #ifdef HAVE_IBV_FLOW_DV_SUPPORT struct mlx5_flow_handle_dv dvh; @@ -588,6 +685,10 @@ struct mlx5_flow_dv_workspace { /**< Pointer to the jump action resource. */ struct mlx5_flow_dv_match_params value; /**< Holds the value that the packet is compared to. */ + struct mlx5_flow_dv_sample_resource *sample_res; + /**< Pointer to the sample action resource. */ + struct mlx5_flow_dv_dest_array_resource *dest_array_res; + /**< Pointer to the destination array resource. */ }; /* @@ -654,7 +755,7 @@ struct mlx5_flow_verbs_workspace { struct mlx5_flow { struct rte_flow *flow; /**< Pointer to the main flow. */ uint32_t flow_idx; /**< The memory pool index to the main flow. */ - uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ + uint64_t hash_fields; /**< Hash Rx queue hash fields. */ uint64_t act_flags; /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ bool external; /**< true if the flow is created external to PMD. */ @@ -913,6 +1014,7 @@ int mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, int tunnel, uint64_t layer_types, uint64_t hash_fields); +int mlx5_flow_discover_priorities(struct rte_eth_dev *dev); uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, uint32_t subpriority); int mlx5_flow_get_reg_id(struct rte_eth_dev *dev, @@ -946,6 +1048,9 @@ int mlx5_flow_validate_action_rss(const struct rte_flow_action *action, const struct rte_flow_attr *attr, uint64_t item_flags, struct rte_flow_error *error); +int mlx5_flow_validate_action_default_miss(uint64_t action_flags, + const struct rte_flow_attr *attr, + struct rte_flow_error *error); int mlx5_flow_validate_attributes(struct rte_eth_dev *dev, const struct rte_flow_attr *attributes, struct rte_flow_error *error); @@ -953,6 +1058,7 @@ int mlx5_flow_item_acceptable(const struct rte_flow_item *item, const uint8_t *mask, const uint8_t *nic_mask, unsigned int size, + bool range_accepted, struct rte_flow_error *error); int mlx5_flow_validate_item_eth(const struct rte_flow_item *item, uint64_t item_flags, @@ -970,6 +1076,7 @@ int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, uint64_t last_item, uint16_t ether_type, const struct rte_flow_item_ipv4 *acc_mask, + bool range_accepted, struct rte_flow_error *error); int mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, uint64_t item_flags, @@ -1018,6 +1125,12 @@ int mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, uint64_t item_flags, struct rte_eth_dev *dev, struct rte_flow_error *error); +int mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, + uint64_t item_flags, + uint64_t last_item, + uint16_t ether_type, + const struct rte_flow_item_ecpri *acc_mask, + struct rte_flow_error *error); struct mlx5_meter_domains_infos *mlx5_flow_create_mtr_tbls (struct rte_eth_dev *dev, const struct mlx5_flow_meter *fm); @@ -1031,4 +1144,5 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev, const struct rte_flow_attr *attr); int mlx5_flow_meter_flush(struct rte_eth_dev *dev, struct rte_mtr_error *error); +int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev); #endif /* RTE_PMD_MLX5_FLOW_H_ */