X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_rx.h;h=acebe3348ce3f4aceddbc0f86c45e561deaff199;hb=311b17e669ab;hp=c178f9a24ba239e2cdf890208dc8cf4dc98b8192;hpb=0c7606b75be4f56a109f61f3cf2c7a819e760cd2;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index c178f9a24b..acebe3348c 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -18,6 +18,7 @@ #include "mlx5.h" #include "mlx5_autoconf.h" +#include "rte_pmd_mlx5.h" /* Support tunnel matching. */ #define MLX5_FLOW_TUNNEL 10 @@ -141,12 +142,6 @@ struct mlx5_rxq_data { /* Buffer split segment descriptions - sizes, offsets, pools. */ } __rte_cache_aligned; -enum mlx5_rxq_type { - MLX5_RXQ_TYPE_STANDARD, /* Standard Rx queue. */ - MLX5_RXQ_TYPE_HAIRPIN, /* Hairpin Rx queue. */ - MLX5_RXQ_TYPE_UNDEFINED, -}; - /* RX queue control descriptor. */ struct mlx5_rxq_ctrl { struct mlx5_rxq_data rxq; /* Data path structure. */ @@ -154,14 +149,13 @@ struct mlx5_rxq_ctrl { LIST_HEAD(priv, mlx5_rxq_priv) owners; /* Owner rxq list. */ struct mlx5_rxq_obj *obj; /* Verbs/DevX elements. */ struct mlx5_dev_ctx_shared *sh; /* Shared context. */ - enum mlx5_rxq_type type; /* Rxq type. */ + bool is_hairpin; /* Whether RxQ type is Hairpin. */ unsigned int socket; /* CPU socket ID for allocations. */ LIST_ENTRY(mlx5_rxq_ctrl) share_entry; /* Entry in shared RXQ list. */ uint32_t share_group; /* Group ID of shared RXQ. */ uint16_t share_qid; /* Shared RxQ ID in group. */ unsigned int started:1; /* Whether (shared) RXQ has been started. */ unsigned int irq:1; /* Whether IRQ is enabled. */ - uint32_t flow_mark_n; /* Number of Mark/Flag flows using this Queue. */ uint32_t flow_tunnels_n[MLX5_FLOW_TUNNEL]; /* Tunnels counters. */ uint32_t wqn; /* WQ number. */ uint32_t rxseg_n; /* Number of split segment descriptions. */ @@ -182,6 +176,12 @@ struct mlx5_rxq_priv { uint32_t hairpin_status; /* Hairpin binding status. */ }; +/* External RX queue descriptor. */ +struct mlx5_external_rxq { + uint32_t hw_id; /* Queue index in the Hardware. */ + uint32_t refcnt; /* Reference counter. */ +}; + /* mlx5_rxq.c */ extern uint8_t rss_hash_default_key[]; @@ -205,8 +205,7 @@ void mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev); int mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id); int mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id); int mlx5_rxq_obj_verify(struct rte_eth_dev *dev); -struct mlx5_rxq_ctrl *mlx5_rxq_new(struct rte_eth_dev *dev, - struct mlx5_rxq_priv *rxq, +struct mlx5_rxq_ctrl *mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, unsigned int socket, const struct rte_eth_rxconf *conf, const struct rte_eth_rxseg_split *rx_seg, @@ -219,16 +218,26 @@ uint32_t mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_priv *mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_ctrl *mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_data *mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx); +struct mlx5_external_rxq *mlx5_ext_rxq_ref(struct rte_eth_dev *dev, + uint16_t idx); +uint32_t mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx); +struct mlx5_external_rxq *mlx5_ext_rxq_get(struct rte_eth_dev *dev, + uint16_t idx); int mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx); int mlx5_rxq_verify(struct rte_eth_dev *dev); +int mlx5_ext_rxq_verify(struct rte_eth_dev *dev); int rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl); int mlx5_ind_table_obj_verify(struct rte_eth_dev *dev); struct mlx5_ind_table_obj *mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues, uint32_t queues_n); +struct mlx5_ind_table_obj *mlx5_ind_table_obj_new(struct rte_eth_dev *dev, + const uint16_t *queues, + uint32_t queues_n, + bool standalone, + bool ref_qs); int mlx5_ind_table_obj_release(struct rte_eth_dev *dev, struct mlx5_ind_table_obj *ind_tbl, - bool standalone, bool deref_rxqs); int mlx5_ind_table_obj_setup(struct rte_eth_dev *dev, struct mlx5_ind_table_obj *ind_tbl, @@ -251,11 +260,12 @@ struct mlx5_list_entry *mlx5_hrxq_clone_cb(void *tool_ctx, void *cb_ctx __rte_unused); void mlx5_hrxq_clone_free_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry); -uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev, +struct mlx5_hrxq *mlx5_hrxq_get(struct rte_eth_dev *dev, struct mlx5_flow_rss_desc *rss_desc); +int mlx5_hrxq_obj_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq); int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx); uint32_t mlx5_hrxq_verify(struct rte_eth_dev *dev); -enum mlx5_rxq_type mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx); +bool mlx5_rxq_is_hairpin(struct rte_eth_dev *dev, uint16_t idx); const struct rte_eth_hairpin_conf *mlx5_rxq_get_hairpin_conf (struct rte_eth_dev *dev, uint16_t idx); struct mlx5_hrxq *mlx5_drop_action_create(struct rte_eth_dev *dev); @@ -276,8 +286,6 @@ __rte_noinline int mlx5_rx_err_handle(struct mlx5_rxq_data *rxq, uint8_t vec); void mlx5_mprq_buf_free(struct mlx5_mprq_buf *buf); uint16_t mlx5_rx_burst_mprq(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n); -uint16_t removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, - uint16_t pkts_n); int mlx5_rx_descriptor_status(void *rx_queue, uint16_t offset); uint32_t mlx5_rx_queue_count(void *rx_queue); void mlx5_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, @@ -631,8 +639,7 @@ mlx5_mprq_enabled(struct rte_eth_dev *dev) for (i = 0; i < priv->rxqs_n; ++i) { struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i); - if (rxq_ctrl == NULL || - rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD) + if (rxq_ctrl == NULL || rxq_ctrl->is_hairpin) continue; n_ibv++; if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq)) @@ -643,4 +650,27 @@ mlx5_mprq_enabled(struct rte_eth_dev *dev) return n == n_ibv; } +/** + * Check whether given RxQ is external. + * + * @param dev + * Pointer to Ethernet device. + * @param queue_idx + * Rx queue index. + * + * @return + * True if is external RxQ, otherwise false. + */ +static __rte_always_inline bool +mlx5_is_external_rxq(struct rte_eth_dev *dev, uint16_t queue_idx) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_external_rxq *rxq; + + if (!priv->ext_rxqs || queue_idx < MLX5_EXTERNAL_RX_QUEUE_ID_MIN) + return false; + rxq = &priv->ext_rxqs[queue_idx - MLX5_EXTERNAL_RX_QUEUE_ID_MIN]; + return !!__atomic_load_n(&rxq->refcnt, __ATOMIC_RELAXED); +} + #endif /* RTE_PMD_MLX5_RX_H_ */