X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_txq.c;h=b81bb4a12dd3c54d8eccb6457330c9d15420f0da;hb=e342da2d438f2bb660dff61364d44176cb227d37;hp=cd7b42a0b26bfa6a6706add618ef2d7017172706;hpb=89f170c0da1b9debbc962f6b68afdda09e4465bb;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index cd7b42a0b2..b81bb4a12d 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -154,6 +154,7 @@ txq_sync_cq(struct mlx5_txq_data *txq) /* Resync CQE and WQE (WQ in reset state). */ rte_io_wmb(); *txq->cq_db = rte_cpu_to_be_32(txq->cq_ci); + txq->cq_pi = txq->cq_ci; rte_io_wmb(); } @@ -388,7 +389,6 @@ mlx5_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, DRV_LOG(DEBUG, "port %u adding Tx queue %u to list", dev->data->port_id, idx); (*priv->txqs)[idx] = &txq_ctrl->txq; - dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED; return 0; } @@ -1141,11 +1141,12 @@ mlx5_txq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, rte_errno = ENOMEM; goto error; } - __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED); + __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED); tmpl->type = MLX5_TXQ_TYPE_STANDARD; LIST_INSERT_HEAD(&priv->txqsctrl, tmpl, next); return tmpl; error: + mlx5_mr_btree_free(&tmpl->txq.mr_ctrl.cache_bh); mlx5_free(tmpl); return NULL; } @@ -1185,7 +1186,7 @@ mlx5_txq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, tmpl->txq.idx = idx; tmpl->hairpin_conf = *hairpin_conf; tmpl->type = MLX5_TXQ_TYPE_HAIRPIN; - __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED); + __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED); LIST_INSERT_HEAD(&priv->txqsctrl, tmpl, next); return tmpl; } @@ -1210,7 +1211,7 @@ mlx5_txq_get(struct rte_eth_dev *dev, uint16_t idx) if (txq_data) { ctrl = container_of(txq_data, struct mlx5_txq_ctrl, txq); - __atomic_add_fetch(&ctrl->refcnt, 1, __ATOMIC_RELAXED); + __atomic_fetch_add(&ctrl->refcnt, 1, __ATOMIC_RELAXED); } return ctrl; } @@ -1249,8 +1250,8 @@ mlx5_txq_release(struct rte_eth_dev *dev, uint16_t idx) txq_ctrl->txq.fcqs = NULL; } txq_free_elts(txq_ctrl); + dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED; } - dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED; if (!__atomic_load_n(&txq_ctrl->refcnt, __ATOMIC_RELAXED)) { if (txq_ctrl->type == MLX5_TXQ_TYPE_STANDARD) mlx5_mr_btree_free(&txq_ctrl->txq.mr_ctrl.cache_bh);