X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmvpp2%2Fmrvl_ethdev.c;h=9c7fe13f7fa40676c93c82d9f8033cc323d9abef;hb=369ce46248c0605d31bd29ebaa4474309a875176;hp=43dd4c4c3ff4d0ea54e00111717fa5ed10448f6f;hpb=45ea4c59e875e0702ed8a1a00a796ea6199edad3;p=dpdk.git

diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 43dd4c4c3f..9c7fe13f7f 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -40,8 +40,10 @@
 /* prefetch shift */
 #define MRVL_MUSDK_PREFETCH_SHIFT 2
 
-/* TCAM has 25 entries reserved for uc/mc filter entries */
-#define MRVL_MAC_ADDRS_MAX 25
+/* TCAM has 25 entries reserved for uc/mc filter entries
+ * + 1 for primary mac address
+ */
+#define MRVL_MAC_ADDRS_MAX (1 + 25)
 #define MRVL_MATCH_LEN 16
 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
 /* Maximum allowable packet size */
@@ -50,28 +52,25 @@
 #define MRVL_IFACE_NAME_ARG "iface"
 #define MRVL_CFG_ARG "cfg"
 
-#define MRVL_BURST_SIZE 64
-
 #define MRVL_ARP_LENGTH 28
 
 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
 
 /** Port Rx offload capabilities */
-#define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
-			  DEV_RX_OFFLOAD_JUMBO_FRAME | \
-			  DEV_RX_OFFLOAD_CHECKSUM)
+#define MRVL_RX_OFFLOADS (RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
+			  RTE_ETH_RX_OFFLOAD_CHECKSUM)
 
 /** Port Tx offloads capabilities */
-#define MRVL_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \
-				  DEV_TX_OFFLOAD_UDP_CKSUM  | \
-				  DEV_TX_OFFLOAD_TCP_CKSUM)
+#define MRVL_TX_OFFLOAD_CHECKSUM (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \
+				  RTE_ETH_TX_OFFLOAD_UDP_CKSUM  | \
+				  RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
 #define MRVL_TX_OFFLOADS (MRVL_TX_OFFLOAD_CHECKSUM | \
-			  DEV_TX_OFFLOAD_MULTI_SEGS)
+			  RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
 
-#define MRVL_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \
-			      PKT_TX_TCP_CKSUM | \
-			      PKT_TX_UDP_CKSUM)
+#define MRVL_TX_PKT_OFFLOADS (RTE_MBUF_F_TX_IP_CKSUM | \
+			      RTE_MBUF_F_TX_TCP_CKSUM | \
+			      RTE_MBUF_F_TX_UDP_CKSUM)
 
 static const char * const valid_args[] = {
 	MRVL_IFACE_NAME_ARG,
@@ -88,6 +87,8 @@ static int used_bpools[PP2_NUM_PKT_PROC] = {
 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
+static int dummy_pool_id[PP2_NUM_PKT_PROC];
+struct pp2_bpool *dummy_pool[PP2_NUM_PKT_PROC] = {0};
 
 struct mrvl_ifnames {
 	const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
@@ -160,6 +161,8 @@ static int
 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 static int mrvl_promiscuous_enable(struct rte_eth_dev *dev);
 static int mrvl_allmulticast_enable(struct rte_eth_dev *dev);
+static int
+mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf);
 
 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 	#name, offsetof(struct pp2_ppio_statistics, name),	\
@@ -187,6 +190,112 @@ static struct {
 	MRVL_XSTATS_TBL_ENTRY(tx_errors)
 };
 
+static inline int
+mrvl_reserve_bit(int *bitmap, int max)
+{
+	int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
+
+	if (n >= max)
+		return -1;
+
+	*bitmap |= 1 << n;
+
+	return n;
+}
+
+static int
+mrvl_pp2_fixup_init(void)
+{
+	struct pp2_bpool_params bpool_params;
+	char			name[15];
+	int			err, i;
+
+	memset(dummy_pool, 0, sizeof(dummy_pool));
+	for (i = 0; i < pp2_get_num_inst(); i++) {
+		dummy_pool_id[i] = mrvl_reserve_bit(&used_bpools[i],
+					     PP2_BPOOL_NUM_POOLS);
+		if (dummy_pool_id[i] < 0) {
+			MRVL_LOG(ERR, "Can't find free pool\n");
+			return -1;
+		}
+
+		memset(name, 0, sizeof(name));
+		snprintf(name, sizeof(name), "pool-%d:%d", i, dummy_pool_id[i]);
+		memset(&bpool_params, 0, sizeof(bpool_params));
+		bpool_params.match = name;
+		bpool_params.buff_len = MRVL_PKT_OFFS;
+		bpool_params.dummy_short_pool = 1;
+		err = pp2_bpool_init(&bpool_params, &dummy_pool[i]);
+		if (err != 0 || !dummy_pool[i]) {
+			MRVL_LOG(ERR, "BPool init failed!\n");
+			used_bpools[i] &= ~(1 << dummy_pool_id[i]);
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * Initialize packet processor.
+ *
+ * @return
+ *   0 on success, negative error value otherwise.
+ */
+static int
+mrvl_init_pp2(void)
+{
+	struct pp2_init_params	init_params;
+	int			err;
+
+	memset(&init_params, 0, sizeof(init_params));
+	init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
+	init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
+	init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
+	if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
+		memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
+		       sizeof(struct pp2_parse_udfs));
+	err = pp2_init(&init_params);
+	if (err != 0) {
+		MRVL_LOG(ERR, "PP2 init failed");
+		return -1;
+	}
+
+	err = mrvl_pp2_fixup_init();
+	if (err != 0) {
+		MRVL_LOG(ERR, "PP2 fixup init failed");
+		return -1;
+	}
+
+	return 0;
+}
+
+static void
+mrvl_pp2_fixup_deinit(void)
+{
+	int i;
+
+	for (i = 0; i < PP2_NUM_PKT_PROC; i++) {
+		if (!dummy_pool[i])
+			continue;
+		pp2_bpool_deinit(dummy_pool[i]);
+		used_bpools[i] &= ~(1 << dummy_pool_id[i]);
+	}
+}
+
+/**
+ * Deinitialize packet processor.
+ *
+ * @return
+ *   0 on success, negative error value otherwise.
+ */
+static void
+mrvl_deinit_pp2(void)
+{
+	mrvl_pp2_fixup_deinit();
+	pp2_deinit();
+}
+
 static inline void
 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 {
@@ -203,6 +312,22 @@ mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 	sq->size++;
 }
 
+/**
+ * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
+ */
+static void
+mrvl_deinit_hifs(void)
+{
+	int i;
+
+	for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
+		if (hifs[i])
+			pp2_hif_deinit(hifs[i]);
+	}
+	used_hifs = MRVL_MUSDK_HIFS_RESERVED;
+	memset(hifs, 0, sizeof(hifs));
+}
+
 static inline void
 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 {
@@ -224,19 +349,6 @@ mrvl_get_bpool_size(int pp2_id, int pool_id)
 	return size;
 }
 
-static inline int
-mrvl_reserve_bit(int *bitmap, int max)
-{
-	int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
-
-	if (n >= max)
-		return -1;
-
-	*bitmap |= 1 << n;
-
-	return n;
-}
-
 static int
 mrvl_init_hif(int core_id)
 {
@@ -330,14 +442,14 @@ mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 
 	if (rss_conf->rss_hf == 0) {
 		priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
-	} else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
+	} else if (rss_conf->rss_hf & RTE_ETH_RSS_IPV4) {
 		priv->ppio_params.inqs_params.hash_type =
 			PP2_PPIO_HASH_T_2_TUPLE;
-	} else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
+	} else if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) {
 		priv->ppio_params.inqs_params.hash_type =
 			PP2_PPIO_HASH_T_5_TUPLE;
 		priv->rss_hf_tcp = 1;
-	} else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
+	} else if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) {
 		priv->ppio_params.inqs_params.hash_type =
 			PP2_PPIO_HASH_T_5_TUPLE;
 		priv->rss_hf_tcp = 0;
@@ -371,8 +483,8 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
 		return -EINVAL;
 	}
 
-	if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
-	    dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
+	if (dev->data->dev_conf.rxmode.mq_mode != RTE_ETH_MQ_RX_NONE &&
+	    dev->data->dev_conf.rxmode.mq_mode != RTE_ETH_MQ_RX_RSS) {
 		MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 			dev->data->dev_conf.rxmode.mq_mode);
 		return -EINVAL;
@@ -383,11 +495,14 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
 		return -EINVAL;
 	}
 
-	if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
-		dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
-				 MRVL_PP2_ETH_HDRS_LEN;
+	if (dev->data->dev_conf.rxmode.mtu > priv->max_mtu) {
+		MRVL_LOG(ERR, "MTU %u is larger than max_mtu %u\n",
+			 dev->data->dev_conf.rxmode.mtu,
+			 priv->max_mtu);
+		return -EINVAL;
+	}
 
-	if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+	if (dev->data->dev_conf.txmode.offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
 		priv->multiseg = 1;
 
 	ret = mrvl_configure_rxqs(priv, dev->data->port_id,
@@ -409,15 +524,21 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
 		return ret;
 
 	if (dev->data->nb_rx_queues == 1 &&
-	    dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
+	    dev->data->dev_conf.rxmode.mq_mode == RTE_ETH_MQ_RX_RSS) {
 		MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 		priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
-
+		priv->configured = 1;
 		return 0;
 	}
 
-	return mrvl_configure_rss(priv,
+	ret = mrvl_configure_rss(priv,
 			&dev->data->dev_conf.rx_adv_conf.rss_conf);
+	if (ret < 0)
+		return ret;
+
+	priv->configured = 1;
+
+	return 0;
 }
 
 /**
@@ -468,9 +589,6 @@ mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 		return -EINVAL;
 	}
 
-	dev->data->mtu = mtu;
-	dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
-
 	if (!priv->ppio)
 		return 0;
 
@@ -505,7 +623,7 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 	int ret;
 
 	if (!priv->ppio) {
-		dev->data->dev_link.link_status = ETH_LINK_UP;
+		dev->data->dev_link.link_status = RTE_ETH_LINK_UP;
 		return 0;
 	}
 
@@ -526,7 +644,7 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 		return ret;
 	}
 
-	dev->data->dev_link.link_status = ETH_LINK_UP;
+	dev->data->dev_link.link_status = RTE_ETH_LINK_UP;
 	return 0;
 }
 
@@ -546,14 +664,14 @@ mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 	int ret;
 
 	if (!priv->ppio) {
-		dev->data->dev_link.link_status = ETH_LINK_DOWN;
+		dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
 		return 0;
 	}
 	ret = pp2_ppio_disable(priv->ppio);
 	if (ret)
 		return ret;
 
-	dev->data->dev_link.link_status = ETH_LINK_DOWN;
+	dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
 	return 0;
 }
 
@@ -689,6 +807,18 @@ mrvl_dev_start(struct rte_eth_dev *dev)
 	snprintf(match, sizeof(match), "ppio-%d:%d",
 		 priv->pp_id, priv->ppio_id);
 	priv->ppio_params.match = match;
+	priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
+	priv->forward_bad_frames = 0;
+	priv->fill_bpool_buffs = MRVL_BURST_SIZE;
+
+	if (mrvl_cfg) {
+		priv->ppio_params.eth_start_hdr =
+			mrvl_cfg->port[dev->data->port_id].eth_start_hdr;
+		priv->forward_bad_frames =
+			mrvl_cfg->port[dev->data->port_id].forward_bad_frames;
+		priv->fill_bpool_buffs =
+			mrvl_cfg->port[dev->data->port_id].fill_bpool_buffs;
+	}
 
 	/*
 	 * Calculate the minimum bpool size for refill feature as follows:
@@ -763,7 +893,7 @@ mrvl_dev_start(struct rte_eth_dev *dev)
 	if (dev->data->all_multicast == 1)
 		mrvl_allmulticast_enable(dev);
 
-	if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
+	if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) {
 		ret = mrvl_populate_vlan_table(dev, 1);
 		if (ret) {
 			MRVL_LOG(ERR, "Failed to populate VLAN table");
@@ -772,8 +902,8 @@ mrvl_dev_start(struct rte_eth_dev *dev)
 	}
 
 	/* For default QoS config, don't start classifier. */
-	if (mrvl_qos_cfg  &&
-	    mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
+	if (mrvl_cfg  &&
+	    mrvl_cfg->port[dev->data->port_id].use_qos_global_defaults == 0) {
 		ret = mrvl_start_qos_mapping(priv);
 		if (ret) {
 			MRVL_LOG(ERR, "Failed to setup QoS mapping");
@@ -790,11 +920,20 @@ mrvl_dev_start(struct rte_eth_dev *dev)
 	if (dev->data->promiscuous == 1)
 		mrvl_promiscuous_enable(dev);
 
-	if (dev->data->dev_link.link_status == ETH_LINK_UP) {
+	if (priv->flow_ctrl) {
+		ret = mrvl_flow_ctrl_set(dev, &priv->fc_conf);
+		if (ret) {
+			MRVL_LOG(ERR, "Failed to configure flow control");
+			goto out;
+		}
+		priv->flow_ctrl = 0;
+	}
+
+	if (dev->data->dev_link.link_status == RTE_ETH_LINK_UP) {
 		ret = mrvl_dev_set_link_up(dev);
 		if (ret) {
 			MRVL_LOG(ERR, "Failed to set link up");
-			dev->data->dev_link.link_status = ETH_LINK_DOWN;
+			dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
 			goto out;
 		}
 	}
@@ -1063,27 +1202,30 @@ mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 
 	switch (ethtool_cmd_speed(&edata)) {
 	case SPEED_10:
-		dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_10M;
 		break;
 	case SPEED_100:
-		dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_100M;
 		break;
 	case SPEED_1000:
-		dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_1G;
+		break;
+	case SPEED_2500:
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_2_5G;
 		break;
 	case SPEED_10000:
-		dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_10G;
 		break;
 	default:
-		dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
+		dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_NONE;
 	}
 
-	dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
-							 ETH_LINK_HALF_DUPLEX;
-	dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
-							   ETH_LINK_FIXED;
+	dev->data->dev_link.link_duplex = edata.duplex ? RTE_ETH_LINK_FULL_DUPLEX :
+							 RTE_ETH_LINK_HALF_DUPLEX;
+	dev->data->dev_link.link_autoneg = edata.autoneg ? RTE_ETH_LINK_AUTONEG :
+							   RTE_ETH_LINK_FIXED;
 	pp2_ppio_get_link_state(priv->ppio, &link_up);
-	dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
+	dev->data->dev_link.link_status = link_up ? RTE_ETH_LINK_UP : RTE_ETH_LINK_DOWN;
 
 	return 0;
 }
@@ -1562,13 +1704,18 @@ mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
  *   Info structure output buffer.
  */
 static int
-mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
+mrvl_dev_infos_get(struct rte_eth_dev *dev,
 		   struct rte_eth_dev_info *info)
 {
-	info->speed_capa = ETH_LINK_SPEED_10M |
-			   ETH_LINK_SPEED_100M |
-			   ETH_LINK_SPEED_1G |
-			   ETH_LINK_SPEED_10G;
+	struct mrvl_priv *priv = dev->data->dev_private;
+
+	info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
+
+	info->speed_capa = RTE_ETH_LINK_SPEED_10M |
+			   RTE_ETH_LINK_SPEED_100M |
+			   RTE_ETH_LINK_SPEED_1G |
+			   RTE_ETH_LINK_SPEED_2_5G |
+			   RTE_ETH_LINK_SPEED_10G;
 
 	info->max_rx_queues = MRVL_PP2_RXQ_MAX;
 	info->max_tx_queues = MRVL_PP2_TXQ_MAX;
@@ -1588,14 +1735,15 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 	info->tx_offload_capa = MRVL_TX_OFFLOADS;
 	info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
 
-	info->flow_type_rss_offloads = ETH_RSS_IPV4 |
-				       ETH_RSS_NONFRAG_IPV4_TCP |
-				       ETH_RSS_NONFRAG_IPV4_UDP;
+	info->flow_type_rss_offloads = RTE_ETH_RSS_IPV4 |
+				       RTE_ETH_RSS_NONFRAG_IPV4_TCP |
+				       RTE_ETH_RSS_NONFRAG_IPV4_UDP;
 
 	/* By default packets are dropped if no descriptors are available */
 	info->default_rxconf.rx_drop_en = 1;
 
 	info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
+	info->max_mtu = priv->max_mtu;
 
 	return 0;
 }
@@ -1718,11 +1866,13 @@ static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 	uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
 	int ret;
 
-	if (mask & ETH_VLAN_STRIP_MASK)
+	if (mask & RTE_ETH_VLAN_STRIP_MASK) {
 		MRVL_LOG(ERR, "VLAN stripping is not supported\n");
+		return -ENOTSUP;
+	}
 
-	if (mask & ETH_VLAN_FILTER_MASK) {
-		if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
+	if (mask & RTE_ETH_VLAN_FILTER_MASK) {
+		if (rx_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
 			ret = mrvl_populate_vlan_table(dev, 1);
 		else
 			ret = mrvl_populate_vlan_table(dev, 0);
@@ -1731,8 +1881,10 @@ static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 			return ret;
 	}
 
-	if (mask & ETH_VLAN_EXTEND_MASK)
+	if (mask & RTE_ETH_VLAN_EXTEND_MASK) {
 		MRVL_LOG(ERR, "Extend VLAN not supported\n");
+		return -ENOTSUP;
+	}
 
 	return 0;
 }
@@ -1835,7 +1987,7 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 	struct mrvl_priv *priv = dev->data->dev_private;
 	struct mrvl_rxq *rxq;
 	uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
-	uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
+	uint32_t max_rx_pktlen = dev->data->mtu + RTE_ETHER_HDR_LEN;
 	int ret, tc, inq;
 	uint64_t offloads;
 
@@ -1850,17 +2002,15 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 		return -EFAULT;
 	}
 
-	frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
-		     MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
-	if (frame_size < max_rx_pkt_len) {
+	frame_size = buf_size - RTE_PKTMBUF_HEADROOM - MRVL_PKT_EFFEC_OFFS;
+	if (frame_size < max_rx_pktlen) {
 		MRVL_LOG(WARNING,
 			"Mbuf size must be increased to %u bytes to hold up "
 			"to %u bytes of data.",
-			buf_size + max_rx_pkt_len - frame_size,
-			max_rx_pkt_len);
-		dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
-		MRVL_LOG(INFO, "Setting max rx pkt len to %u",
-			dev->data->dev_conf.rxmode.max_rx_pkt_len);
+			max_rx_pktlen + buf_size - frame_size,
+			max_rx_pktlen);
+		dev->data->mtu = frame_size - RTE_ETHER_HDR_LEN;
+		MRVL_LOG(INFO, "Setting MTU to %u", dev->data->mtu);
 	}
 
 	if (dev->data->rx_queues[idx]) {
@@ -1874,7 +2024,7 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 
 	rxq->priv = priv;
 	rxq->mp = mp;
-	rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
+	rxq->cksum_enabled = offloads & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM;
 	rxq->queue_id = idx;
 	rxq->port_id = dev->data->port_id;
 	mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
@@ -1900,13 +2050,15 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 /**
  * DPDK callback to release the receive queue.
  *
- * @param rxq
- *   Generic receive queue pointer.
+ * @param dev
+ *   Pointer to Ethernet device structure.
+ * @param qid
+ *   Receive queue index.
  */
 static void
-mrvl_rx_queue_release(void *rxq)
+mrvl_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
 {
-	struct mrvl_rxq *q = rxq;
+	struct mrvl_rxq *q = dev->data->rx_queues[qid];
 	struct pp2_ppio_tc_params *tc_params;
 	int i, num, tc, inq;
 	struct pp2_hif *hif;
@@ -1987,13 +2139,15 @@ mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 /**
  * DPDK callback to release the transmit queue.
  *
- * @param txq
- *   Generic transmit queue pointer.
+ * @param dev
+ *   Pointer to Ethernet device structure.
+ * @param qid
+ *   Transmit queue index.
  */
 static void
-mrvl_tx_queue_release(void *txq)
+mrvl_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
 {
-	struct mrvl_txq *q = txq;
+	struct mrvl_txq *q = dev->data->tx_queues[qid];
 
 	if (!q)
 		return;
@@ -2018,16 +2172,32 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 	struct mrvl_priv *priv = dev->data->dev_private;
 	int ret, en;
 
-	if (!priv)
-		return -EPERM;
+	if (!priv->ppio) {
+		memcpy(fc_conf, &priv->fc_conf, sizeof(struct rte_eth_fc_conf));
+		return 0;
+	}
 
+	fc_conf->autoneg = 1;
 	ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
 	if (ret) {
 		MRVL_LOG(ERR, "Failed to read rx pause state");
 		return ret;
 	}
 
-	fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
+	fc_conf->mode = en ? RTE_ETH_FC_RX_PAUSE : RTE_ETH_FC_NONE;
+
+	ret = pp2_ppio_get_tx_pause(priv->ppio, &en);
+	if (ret) {
+		MRVL_LOG(ERR, "Failed to read tx pause state");
+		return ret;
+	}
+
+	if (en) {
+		if (fc_conf->mode == RTE_ETH_FC_NONE)
+			fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
+		else
+			fc_conf->mode = RTE_ETH_FC_FULL;
+	}
 
 	return 0;
 }
@@ -2047,30 +2217,67 @@ static int
 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 {
 	struct mrvl_priv *priv = dev->data->dev_private;
-
-	if (!priv)
-		return -EPERM;
+	struct pp2_ppio_tx_pause_params mrvl_pause_params;
+	int ret;
+	int rx_en, tx_en;
 
 	if (fc_conf->high_water ||
 	    fc_conf->low_water ||
 	    fc_conf->pause_time ||
-	    fc_conf->mac_ctrl_frame_fwd ||
-	    fc_conf->autoneg) {
+	    fc_conf->mac_ctrl_frame_fwd) {
 		MRVL_LOG(ERR, "Flowctrl parameter is not supported");
 
 		return -EINVAL;
 	}
 
-	if (fc_conf->mode == RTE_FC_NONE ||
-	    fc_conf->mode == RTE_FC_RX_PAUSE) {
-		int ret, en;
+	if (fc_conf->autoneg == 0) {
+		MRVL_LOG(ERR, "Flowctrl Autoneg disable is not supported");
+		return -EINVAL;
+	}
 
-		en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
-		ret = pp2_ppio_set_rx_pause(priv->ppio, en);
-		if (ret)
-			MRVL_LOG(ERR,
-				"Failed to change flowctrl on RX side");
+	if (!priv->ppio) {
+		memcpy(&priv->fc_conf, fc_conf, sizeof(struct rte_eth_fc_conf));
+		priv->flow_ctrl = 1;
+		return 0;
+	}
 
+	switch (fc_conf->mode) {
+	case RTE_ETH_FC_FULL:
+		rx_en = 1;
+		tx_en = 1;
+		break;
+	case RTE_ETH_FC_TX_PAUSE:
+		rx_en = 0;
+		tx_en = 1;
+		break;
+	case RTE_ETH_FC_RX_PAUSE:
+		rx_en = 1;
+		tx_en = 0;
+		break;
+	case RTE_ETH_FC_NONE:
+		rx_en = 0;
+		tx_en = 0;
+		break;
+	default:
+		MRVL_LOG(ERR, "Incorrect Flow control flag (%d)",
+			 fc_conf->mode);
+		return -EINVAL;
+	}
+
+	/* Set RX flow control */
+	ret = pp2_ppio_set_rx_pause(priv->ppio, rx_en);
+	if (ret) {
+		MRVL_LOG(ERR, "Failed to change RX flowctrl");
+		return ret;
+	}
+
+	/* Set TX flow control */
+	mrvl_pause_params.en = tx_en;
+	/* all inqs participate in xon/xoff decision */
+	mrvl_pause_params.use_tc_pause_inqs = 0;
+	ret = pp2_ppio_set_tx_pause(priv->ppio, &mrvl_pause_params);
+	if (ret) {
+		MRVL_LOG(ERR, "Failed to change TX flowctrl");
 		return ret;
 	}
 
@@ -2124,11 +2331,11 @@ mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
 	if (hash_type == PP2_PPIO_HASH_T_NONE)
 		rss_conf->rss_hf = 0;
 	else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
-		rss_conf->rss_hf = ETH_RSS_IPV4;
+		rss_conf->rss_hf = RTE_ETH_RSS_IPV4;
 	else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
-		rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
+		rss_conf->rss_hf = RTE_ETH_RSS_NONFRAG_IPV4_TCP;
 	else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
-		rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
+		rss_conf->rss_hf = RTE_ETH_RSS_NONFRAG_IPV4_UDP;
 
 	return 0;
 }
@@ -2138,32 +2345,18 @@ mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
  *
  * @param dev
  *   Pointer to the device structure.
- * @param filer_type
- *   Flow filter type.
- * @param filter_op
- *   Flow filter operation.
- * @param arg
+ * @param ops
  *   Pointer to pass the flow ops.
  *
  * @return
  *   0 on success, negative error value otherwise.
  */
 static int
-mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
-		     enum rte_filter_type filter_type,
-		     enum rte_filter_op filter_op, void *arg)
+mrvl_eth_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
+		      const struct rte_flow_ops **ops)
 {
-	switch (filter_type) {
-	case RTE_ETH_FILTER_GENERIC:
-		if (filter_op != RTE_ETH_FILTER_GET)
-			return -EINVAL;
-		*(const void **)arg = &mrvl_flow_ops;
-		return 0;
-	default:
-		MRVL_LOG(WARNING, "Filter type (%d) not supported",
-				filter_type);
-		return -EINVAL;
-	}
+	*ops = &mrvl_flow_ops;
+	return 0;
 }
 
 /**
@@ -2241,7 +2434,7 @@ static const struct eth_dev_ops mrvl_ops = {
 	.flow_ctrl_set = mrvl_flow_ctrl_set,
 	.rss_hash_update = mrvl_rss_hash_update,
 	.rss_hash_conf_get = mrvl_rss_hash_conf_get,
-	.filter_ctrl = mrvl_eth_filter_ctrl,
+	.flow_ops_get = mrvl_eth_flow_ops_get,
 	.mtr_ops_get = mrvl_mtr_ops_get,
 	.tm_ops_get = mrvl_tm_ops_get,
 };
@@ -2339,22 +2532,27 @@ mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
  *   Mbuf offload flags.
  */
 static inline uint64_t
-mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
+mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc, uint64_t packet_type)
 {
-	uint64_t flags;
+	uint64_t flags = 0;
 	enum pp2_inq_desc_status status;
 
-	status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
-	if (unlikely(status != PP2_DESC_ERR_OK))
-		flags = PKT_RX_IP_CKSUM_BAD;
-	else
-		flags = PKT_RX_IP_CKSUM_GOOD;
+	if (RTE_ETH_IS_IPV4_HDR(packet_type)) {
+		status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
+		if (unlikely(status != PP2_DESC_ERR_OK))
+			flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
+		else
+			flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+	}
 
-	status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
-	if (unlikely(status != PP2_DESC_ERR_OK))
-		flags |= PKT_RX_L4_CKSUM_BAD;
-	else
-		flags |= PKT_RX_L4_CKSUM_GOOD;
+	if (((packet_type & RTE_PTYPE_L4_UDP) == RTE_PTYPE_L4_UDP) ||
+	    ((packet_type & RTE_PTYPE_L4_TCP) == RTE_PTYPE_L4_TCP)) {
+		status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
+		if (unlikely(status != PP2_DESC_ERR_OK))
+			flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
+		else
+			flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
+	}
 
 	return flags;
 }
@@ -2421,7 +2619,8 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 
 		/* drop packet in case of mac, overrun or resource error */
 		status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
-		if (unlikely(status != PP2_DESC_ERR_OK)) {
+		if ((unlikely(status != PP2_DESC_ERR_OK)) &&
+			!(q->priv->forward_bad_frames)) {
 			struct pp2_buff_inf binf = {
 				.addr = rte_mbuf_data_iova_default(mbuf),
 				.cookie = (uint64_t)mbuf,
@@ -2446,7 +2645,9 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 		mbuf->l3_len = l4_offset - l3_offset;
 
 		if (likely(q->cksum_enabled))
-			mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
+			mbuf->ol_flags =
+				mrvl_desc_to_ol_flags(&descs[i],
+						      mbuf->packet_type);
 
 		rx_pkts[rx_done++] = mbuf;
 		q->bytes_recv += mbuf->pkt_len;
@@ -2457,7 +2658,7 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 
 		if (unlikely(num <= q->priv->bpool_min_size ||
 			     (!rx_done && num < q->priv->bpool_init_size))) {
-			mrvl_fill_bpool(q, MRVL_BURST_SIZE);
+			mrvl_fill_bpool(q, q->priv->fill_bpool_buffs);
 		} else if (unlikely(num > q->priv->bpool_max_size)) {
 			int i;
 			int pkt_to_remove = num - q->priv->bpool_init_size;
@@ -2510,18 +2711,18 @@ mrvl_prepare_proto_info(uint64_t ol_flags,
 	 * default value
 	 */
 	*l3_type = PP2_OUTQ_L3_TYPE_IPV4;
-	*gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
+	*gen_l3_cksum = ol_flags & RTE_MBUF_F_TX_IP_CKSUM ? 1 : 0;
 
-	if (ol_flags & PKT_TX_IPV6) {
+	if (ol_flags & RTE_MBUF_F_TX_IPV6) {
 		*l3_type = PP2_OUTQ_L3_TYPE_IPV6;
 		/* no checksum for ipv6 header */
 		*gen_l3_cksum = 0;
 	}
 
-	if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) {
+	if ((ol_flags & RTE_MBUF_F_TX_L4_MASK) == RTE_MBUF_F_TX_TCP_CKSUM) {
 		*l4_type = PP2_OUTQ_L4_TYPE_TCP;
 		*gen_l4_cksum = 1;
-	} else if ((ol_flags & PKT_TX_L4_MASK) ==  PKT_TX_UDP_CKSUM) {
+	} else if ((ol_flags & RTE_MBUF_F_TX_L4_MASK) ==  RTE_MBUF_F_TX_UDP_CKSUM) {
 		*l4_type = PP2_OUTQ_L4_TYPE_UDP;
 		*gen_l4_cksum = 1;
 	} else {
@@ -2840,37 +3041,6 @@ mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 	return nb_pkts;
 }
 
-/**
- * Initialize packet processor.
- *
- * @return
- *   0 on success, negative error value otherwise.
- */
-static int
-mrvl_init_pp2(void)
-{
-	struct pp2_init_params init_params;
-
-	memset(&init_params, 0, sizeof(init_params));
-	init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
-	init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
-	init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
-
-	return pp2_init(&init_params);
-}
-
-/**
- * Deinitialize packet processor.
- *
- * @return
- *   0 on success, negative error value otherwise.
- */
-static void
-mrvl_deinit_pp2(void)
-{
-	pp2_deinit();
-}
-
 /**
  * Create private device structure.
  *
@@ -2886,6 +3056,7 @@ mrvl_priv_create(const char *dev_name)
 	struct pp2_bpool_params bpool_params;
 	char match[MRVL_MATCH_LEN];
 	struct mrvl_priv *priv;
+	uint16_t max_frame_size;
 	int ret, bpool_bit;
 
 	priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
@@ -2897,6 +3068,14 @@ mrvl_priv_create(const char *dev_name)
 	if (ret)
 		goto out_free_priv;
 
+	ret = pp2_ppio_get_l4_cksum_max_frame_size(priv->pp_id, priv->ppio_id,
+						   &max_frame_size);
+	if (ret)
+		goto out_free_priv;
+
+	priv->max_mtu = max_frame_size + RTE_ETHER_CRC_LEN -
+		MRVL_PP2_ETH_HDRS_LEN;
+
 	bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
 				     PP2_BPOOL_NUM_POOLS);
 	if (bpool_bit < 0)
@@ -2975,7 +3154,7 @@ mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
 	eth_dev->dev_ops = &mrvl_ops;
 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 
-	eth_dev->data->dev_link.link_status = ETH_LINK_UP;
+	eth_dev->data->dev_link.link_status = RTE_ETH_LINK_UP;
 
 	rte_eth_dev_probing_finish(eth_dev);
 	return 0;
@@ -3010,22 +3189,6 @@ mrvl_get_ifnames(const char *key __rte_unused, const char *value,
 	return 0;
 }
 
-/**
- * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
- */
-static void
-mrvl_deinit_hifs(void)
-{
-	int i;
-
-	for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
-		if (hifs[i])
-			pp2_hif_deinit(hifs[i]);
-	}
-	used_hifs = MRVL_MUSDK_HIFS_RESERVED;
-	memset(hifs, 0, sizeof(hifs));
-}
-
 /**
  * DPDK callback to register the virtual device.
  *
@@ -3065,7 +3228,7 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
 	 * The below system initialization should be done only once,
 	 * on the first provided configuration file
 	 */
-	if (!mrvl_qos_cfg) {
+	if (!mrvl_cfg) {
 		cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
 		MRVL_LOG(INFO, "Parsing config file!");
 		if (cfgnum > 1) {
@@ -3073,7 +3236,7 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
 			goto out_free_kvlist;
 		} else if (cfgnum == 1) {
 			rte_kvargs_process(kvlist, MRVL_CFG_ARG,
-					   mrvl_get_qoscfg, &mrvl_qos_cfg);
+					   mrvl_get_cfg, &mrvl_cfg);
 		}
 	}
 
@@ -3151,4 +3314,4 @@ static struct rte_vdev_driver pmd_mrvl_drv = {
 
 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
-RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);
+RTE_LOG_REGISTER_DEFAULT(mrvl_logtype, NOTICE);