X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Focteontx%2Fbase%2Focteontx_pkovf.c;h=bf28bc79923138efb0bf7f08d9faa1ea5a58055d;hb=8716f9942a408a79a114ac0496e4e7d55bc9944c;hp=64e5d69b1a87c3a76c32fb4602fef43522dc8574;hpb=87cf4c6cca30201ae4d94ddf527e78bebec9680b;p=dpdk.git diff --git a/drivers/net/octeontx/base/octeontx_pkovf.c b/drivers/net/octeontx/base/octeontx_pkovf.c index 64e5d69b1a..bf28bc7992 100644 --- a/drivers/net/octeontx/base/octeontx_pkovf.c +++ b/drivers/net/octeontx/base/octeontx_pkovf.c @@ -1,34 +1,7 @@ -/* - * BSD LICENSE - * - * Copyright (C) Cavium Inc. 2017. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Cavium networks nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Cavium, Inc */ + #include #include #include @@ -46,11 +19,13 @@ struct octeontx_pko_iomem { uint8_t *va; - phys_addr_t iova; + rte_iova_t iova; size_t size; }; #define PKO_IOMEM_NULL (struct octeontx_pko_iomem){0, 0, 0} +#define PKO_VALID 0x1 +#define PKO_INUSE 0x2 struct octeontx_pko_fc_ctl_s { int64_t buf_cnt; @@ -60,13 +35,14 @@ struct octeontx_pko_fc_ctl_s { struct octeontx_pkovf { uint8_t *bar0; uint8_t *bar2; + uint8_t status; uint16_t domain; uint16_t vfid; }; struct octeontx_pko_vf_ctl_s { rte_spinlock_t lock; - + uint16_t global_domain; struct octeontx_pko_iomem fc_iomem; struct octeontx_pko_fc_ctl_s *fc_ctl; struct octeontx_pkovf pko[PKO_VF_MAX]; @@ -430,7 +406,7 @@ octeontx_pko_channel_query(struct octeontx_pko_vf_ctl_s *ctl, uint64_t chanid, curr.lmtline_va = ctl->pko[dq_vf].bar2; curr.ioreg_va = (void *)((uintptr_t)ctl->pko[dq_vf].bar0 + PKO_VF_DQ_OP_SEND((dq), 0)); - curr.fc_status_va = ctl->fc_ctl + dq; + curr.fc_status_va = ctl->fc_ctl + dq_num; octeontx_log_dbg("lmtline=%p ioreg_va=%p fc_status_va=%p", curr.lmtline_va, curr.ioreg_va, @@ -458,8 +434,10 @@ octeontx_pko_channel_query_dqs(int chanid, void *out, size_t out_elem_size, int octeontx_pko_vf_count(void) { + uint16_t global_domain = octeontx_get_global_domain(); int vf_cnt; + pko_vf_ctl.global_domain = global_domain; vf_cnt = 0; while (pko_vf_ctl.pko[vf_cnt].bar0) vf_cnt++; @@ -467,6 +445,47 @@ octeontx_pko_vf_count(void) return vf_cnt; } +size_t +octeontx_pko_get_vfid(void) +{ + size_t vf_cnt = octeontx_pko_vf_count(); + size_t vf_idx; + + + for (vf_idx = 0; vf_idx < vf_cnt; vf_idx++) { + if (!(pko_vf_ctl.pko[vf_idx].status & PKO_VALID)) + continue; + if (pko_vf_ctl.pko[vf_idx].status & PKO_INUSE) + continue; + + pko_vf_ctl.pko[vf_idx].status |= PKO_INUSE; + return pko_vf_ctl.pko[vf_idx].vfid; + } + + return SIZE_MAX; +} + +int +octeontx_pko_send_mtu(int port, int mtu) +{ + struct octeontx_mbox_hdr hdr; + int res; + mbox_pko_mtu_cfg_t cfg; + + cfg.mtu = mtu; + + hdr.coproc = OCTEONTX_PKO_COPROC; + hdr.msg = MBOX_PKO_MTU_CONFIG; + hdr.vfid = port; + + res = octeontx_mbox_send(&hdr, &cfg, sizeof(mbox_pko_mtu_cfg_t), + NULL, 0); + if (res < 0) + return -EACCES; + + return res; +} + int octeontx_pko_init_fc(const size_t pko_vf_count) { @@ -494,8 +513,10 @@ octeontx_pko_init_fc(const size_t pko_vf_count) /* Configure Flow-Control feature for all DQs of open VFs */ for (vf_idx = 0; vf_idx < pko_vf_count; vf_idx++) { - dq_ix = vf_idx * PKO_VF_NUM_DQ; + if (pko_vf_ctl.pko[vf_idx].domain != pko_vf_ctl.global_domain) + continue; + dq_ix = pko_vf_ctl.pko[vf_idx].vfid * PKO_VF_NUM_DQ; vf_bar0 = pko_vf_ctl.pko[vf_idx].bar0; reg = (pko_vf_ctl.fc_iomem.iova + @@ -506,6 +527,7 @@ octeontx_pko_init_fc(const size_t pko_vf_count) (0x1 << 0); /* ENABLE */ octeontx_write64(reg, vf_bar0 + PKO_VF_DQ_FC_CONFIG); + pko_vf_ctl.pko[vf_idx].status = PKO_VALID; octeontx_log_dbg("PKO: bar0 %p VF_idx %d DQ_FC_CFG=%" PRIx64 "", vf_bar0, (int)vf_idx, reg); @@ -555,6 +577,7 @@ pkovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) uint16_t domain; uint8_t *bar0; uint8_t *bar2; + static uint8_t vf_cnt; struct octeontx_pkovf *res; RTE_SET_USED(pci_drv); @@ -585,7 +608,7 @@ pkovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) return -EINVAL; } - res = &pko_vf_ctl.pko[vfid]; + res = &pko_vf_ctl.pko[vf_cnt++]; res->vfid = vfid; res->domain = domain; res->bar0 = bar0;