X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Focteontx%2Focteontx_ethdev.h;h=7246fb6d1d32603eb289d4b5908b016e38f7dd9e;hb=4710e16a4a7b53c9f2cf38e6f6af945e9af59c26;hp=1abe1703b95f2a8d4b7cb8024ca3cba537b55e33;hpb=5cbe184802aae6f3033617c7a281e9e33eaf41a1;p=dpdk.git diff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h index 1abe1703b9..7246fb6d1d 100644 --- a/drivers/net/octeontx/octeontx_ethdev.h +++ b/drivers/net/octeontx/octeontx_ethdev.h @@ -29,12 +29,48 @@ #define OCTEONTX_MAX_BGX_PORTS 4 #define OCTEONTX_MAX_LMAC_PER_BGX 4 -#define OCTEONTX_RX_OFFLOADS (DEV_RX_OFFLOAD_CHECKSUM | \ - DEV_RX_OFFLOAD_SCATTER | \ - DEV_RX_OFFLOAD_JUMBO_FRAME) - -#define OCTEONTX_TX_OFFLOADS (DEV_TX_OFFLOAD_MT_LOCKFREE | \ - DEV_TX_OFFLOAD_MBUF_FAST_FREE | \ +#define OCCTX_RX_NB_SEG_MAX 6 +#define OCCTX_INTR_POLL_INTERVAL_MS 1000 +/* VLAN tag inserted by OCCTX_TX_VTAG_ACTION. + * In Tx space is always reserved for this in FRS. + */ +#define OCCTX_MAX_VTAG_INS 2 +#define OCCTX_MAX_VTAG_ACT_SIZE (4 * OCCTX_MAX_VTAG_INS) + +/* HW config of frame size doesn't include FCS */ +#define OCCTX_MAX_HW_FRS 9212 +#define OCCTX_MIN_HW_FRS 60 + +/* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */ +#define OCCTX_L2_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \ + OCCTX_MAX_VTAG_ACT_SIZE) + +/* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */ +#define OCCTX_MAX_FRS \ + (OCCTX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - OCCTX_MAX_VTAG_ACT_SIZE) + +#define OCCTX_MIN_FRS (OCCTX_MIN_HW_FRS + RTE_ETHER_CRC_LEN) + +#define OCCTX_MAX_MTU (OCCTX_MAX_FRS - OCCTX_L2_OVERHEAD) + +#define OCTEONTX_RX_OFFLOADS ( \ + DEV_RX_OFFLOAD_CHECKSUM | \ + DEV_RX_OFFLOAD_SCTP_CKSUM | \ + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \ + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_JUMBO_FRAME | \ + DEV_RX_OFFLOAD_VLAN_FILTER) + +#define OCTEONTX_TX_OFFLOADS ( \ + DEV_TX_OFFLOAD_MBUF_FAST_FREE | \ + DEV_TX_OFFLOAD_MT_LOCKFREE | \ + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \ + DEV_TX_OFFLOAD_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_TCP_CKSUM | \ + DEV_TX_OFFLOAD_UDP_CKSUM | \ + DEV_TX_OFFLOAD_SCTP_CKSUM | \ DEV_TX_OFFLOAD_MULTI_SEGS) static inline struct octeontx_nic * @@ -46,6 +82,28 @@ octeontx_pmd_priv(struct rte_eth_dev *dev) extern uint16_t rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; +struct vlan_entry { + TAILQ_ENTRY(vlan_entry) next; + uint16_t vlan_id; +}; + +TAILQ_HEAD(octeontx_vlan_filter_tbl, vlan_entry); + +struct octeontx_vlan_info { + struct octeontx_vlan_filter_tbl fltr_tbl; + uint8_t filter_on; +}; + +struct octeontx_fc_info { + enum rte_eth_fc_mode mode; /**< Link flow control mode */ + enum rte_eth_fc_mode def_mode; + uint16_t high_water; + uint16_t low_water; + uint16_t def_highmark; + uint16_t def_lowmark; + uint32_t rx_fifosz; +}; + /* Octeontx ethdev nic */ struct octeontx_nic { struct rte_eth_dev *dev; @@ -67,6 +125,7 @@ struct octeontx_nic { uint8_t link_up; uint8_t duplex; uint8_t speed; + uint16_t bgx_mtu; uint16_t mtu; uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; /* Rx port parameters */ @@ -82,6 +141,9 @@ struct octeontx_nic { uint16_t rx_offload_flags; uint64_t tx_offloads; uint16_t tx_offload_flags; + struct octeontx_vlan_info vlan_info; + int print_flag; + struct octeontx_fc_info fc; } __rte_cache_aligned; struct octeontx_txq { @@ -102,4 +164,24 @@ struct octeontx_rxq { void octeontx_set_tx_function(struct rte_eth_dev *dev); + +/* VLAN */ +int octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx); +int octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx); +int octeontx_dev_vlan_offload_init(struct rte_eth_dev *dev); +int octeontx_dev_vlan_offload_fini(struct rte_eth_dev *eth_dev); +int octeontx_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); +int octeontx_dev_vlan_filter_set(struct rte_eth_dev *dev, + uint16_t vlan_id, int on); +int octeontx_dev_set_link_up(struct rte_eth_dev *eth_dev); +int octeontx_dev_set_link_down(struct rte_eth_dev *eth_dev); + +/* Flow control */ +int octeontx_dev_flow_ctrl_init(struct rte_eth_dev *dev); +int octeontx_dev_flow_ctrl_fini(struct rte_eth_dev *dev); +int octeontx_dev_flow_ctrl_get(struct rte_eth_dev *dev, + struct rte_eth_fc_conf *fc_conf); +int octeontx_dev_flow_ctrl_set(struct rte_eth_dev *dev, + struct rte_eth_fc_conf *fc_conf); + #endif /* __OCTEONTX_ETHDEV_H__ */