X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Focteontx2%2Fotx2_ethdev_ops.c;h=552e6bd43d2b433bae79be5ea2f1b84f697a8bf3;hb=437dbd2fd4289c32e2937a1e7dbe95645457dfff;hp=d715f40327865cdf798623b47766086efd68d924;hpb=53de676f8bfe3d4beca9ddd05538490ab273157d;p=dpdk.git

diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index d715f40327..552e6bd43d 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -17,6 +17,9 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 	struct nix_frs_cfg *req;
 	int rc;
 
+	if (dev->configured && otx2_ethdev_is_ptp_en(dev))
+		frame_size += NIX_TIMESYNC_RX_OFFSET;
+
 	/* Check if MTU is within the allowed range */
 	if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS)
 		return -EINVAL;
@@ -56,7 +59,7 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 	if (rc)
 		return rc;
 
-	if (frame_size > RTE_ETHER_MAX_LEN)
+	if (frame_size > NIX_L2_MAX_LEN)
 		dev->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
 	else
 		dev->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
@@ -70,22 +73,15 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 int
 otx2_nix_recalc_mtu(struct rte_eth_dev *eth_dev)
 {
-	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
 	struct rte_eth_dev_data *data = eth_dev->data;
-	struct rte_pktmbuf_pool_private *mbp_priv;
 	struct otx2_eth_rxq *rxq;
-	uint32_t buffsz;
 	uint16_t mtu;
 	int rc;
 
-	/* Get rx buffer size */
 	rxq = data->rx_queues[0];
-	mbp_priv = rte_mempool_get_priv(rxq->pool);
-	buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
 
 	/* Setup scatter mode if needed by jumbo */
-	if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz)
-		dev->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
+	otx2_nix_enable_mseg_on_jumbo(rxq);
 
 	/* Setup MTU based on max_rx_pkt_len */
 	mtu = data->dev_conf.rxmode.max_rx_pkt_len - NIX_L2_OVERHEAD;
@@ -146,8 +142,10 @@ otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev)
 int
 otx2_nix_promisc_disable(struct rte_eth_dev *eth_dev)
 {
-	otx2_nix_promisc_config(eth_dev, 0);
+	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	otx2_nix_promisc_config(eth_dev, dev->dmac_filter_enable);
 	nix_cgx_promisc_config(eth_dev, 0);
+	dev->dmac_filter_enable = false;
 
 	return 0;
 }
@@ -456,7 +454,7 @@ otx2_nix_fw_version_get(struct rte_eth_dev *eth_dev, char *fw_version,
 	rc = strlcpy(fw_version, (char *)dev->mkex_pfl_name, rc);
 
 	rc += 1; /* Add the size of '\0' */
-	if (fw_size < (uint32_t)rc)
+	if (fw_size < (size_t)rc)
 		return rc;
 
 	return 0;
@@ -474,24 +472,11 @@ otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool)
 }
 
 int
-otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
-			 enum rte_filter_type filter_type,
-			 enum rte_filter_op filter_op, void *arg)
+otx2_nix_dev_flow_ops_get(struct rte_eth_dev *eth_dev __rte_unused,
+			  const struct rte_flow_ops **ops)
 {
-	RTE_SET_USED(eth_dev);
-
-	if (filter_type != RTE_ETH_FILTER_GENERIC) {
-		otx2_err("Unsupported filter type %d", filter_type);
-		return -ENOTSUP;
-	}
-
-	if (filter_op == RTE_ETH_FILTER_GET) {
-		*(const void **)arg = &otx2_flow_ops;
-		return 0;
-	}
-
-	otx2_err("Invalid filter_op %d", filter_op);
-	return -EINVAL;
+	*ops = &otx2_flow_ops;
+	return 0;
 }
 
 static struct cgx_fw_data *
@@ -536,8 +521,7 @@ otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
 	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
 	struct cgx_fw_data *rsp;
 
-	if (!info->data || !info->length ||
-	    (info->offset + info->length > SFP_EEPROM_SIZE))
+	if (info->offset + info->length > SFP_EEPROM_SIZE)
 		return -EINVAL;
 
 	rsp = nix_get_fwdata(dev);
@@ -564,6 +548,11 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
 	devinfo->max_vfs = pci_dev->max_vfs;
 	devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD;
 	devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD;
+	if (dev->configured && otx2_ethdev_is_ptp_en(dev)) {
+		devinfo->max_mtu -=  NIX_TIMESYNC_RX_OFFSET;
+		devinfo->min_mtu -=  NIX_TIMESYNC_RX_OFFSET;
+		devinfo->max_rx_pktlen -= NIX_TIMESYNC_RX_OFFSET;
+	}
 
 	devinfo->rx_offload_capa = dev->rx_offload_capa;
 	devinfo->tx_offload_capa = dev->tx_offload_capa;
@@ -608,9 +597,17 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
 
 	/* Auto negotiation disabled */
 	devinfo->speed_capa = ETH_LINK_SPEED_FIXED;
-	devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
-				ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
-				ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G;
+	if (!otx2_dev_is_vf_or_sdp(dev) && !otx2_dev_is_lbk(dev)) {
+		devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
+			ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G;
+
+		/* 50G and 100G to be supported for board version C0
+		 * and above.
+		 */
+		if (!otx2_dev_is_Ax(dev))
+			devinfo->speed_capa |= ETH_LINK_SPEED_50G |
+					       ETH_LINK_SPEED_100G;
+	}
 
 	devinfo->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
 				RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;