X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fbase%2Fbcm_osal.c;h=693328f117c7983980e6b62d4026155c6a8f0c45;hb=0101a0ec621757850210fa084c2d4158404125e3;hp=1ccfad0a394a595b3aa192117c4ce98d1ab4aadf;hpb=a39001d90dbd212e178619276183dc02b936c70c;p=dpdk.git diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c index 1ccfad0a39..693328f117 100644 --- a/drivers/net/qede/base/bcm_osal.c +++ b/drivers/net/qede/base/bcm_osal.c @@ -1,9 +1,7 @@ -/* - * Copyright (c) 2016 QLogic Corporation. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2016 - 2018 Cavium Inc. * All rights reserved. - * www.qlogic.com - * - * See LICENSE.qede_pmd for copyright and licensing details. + * www.cavium.com */ #include @@ -19,7 +17,7 @@ /* Array of memzone pointers */ static const struct rte_memzone *ecore_mz_mapping[RTE_MAX_MEMZONE]; /* Counter to track current memzone allocated */ -uint16_t ecore_mz_count; +static uint16_t ecore_mz_count; unsigned long qede_log2_align(unsigned long n) { @@ -133,10 +131,10 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev, snprintf(mz_name, sizeof(mz_name) - 1, "%lx", (unsigned long)rte_get_timer_cycles()); if (core_id == (unsigned int)LCORE_ID_ANY) - core_id = 0; + core_id = rte_get_master_lcore(); socket_id = rte_lcore_to_socket_id(core_id); - mz = rte_memzone_reserve_aligned(mz_name, size, - socket_id, 0, RTE_CACHE_LINE_SIZE); + mz = rte_memzone_reserve_aligned(mz_name, size, socket_id, + RTE_MEMZONE_IOVA_CONTIG, RTE_CACHE_LINE_SIZE); if (!mz) { DP_ERR(p_dev, "Unable to allocate DMA memory " "of size %zu bytes - %s\n", @@ -144,11 +142,12 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev, *phys = 0; return OSAL_NULL; } - *phys = mz->phys_addr; + *phys = mz->iova; ecore_mz_mapping[ecore_mz_count++] = mz; - DP_VERBOSE(p_dev, ECORE_MSG_PROBE, - "size=%zu phys=0x%" PRIx64 " virt=%p on socket=%u\n", - mz->len, mz->phys_addr, mz->addr, socket_id); + DP_VERBOSE(p_dev, ECORE_MSG_SP, + "Allocated dma memory size=%zu phys=0x%lx" + " virt=%p core=%d\n", + mz->len, (unsigned long)mz->iova, mz->addr, core_id); return mz->addr; } @@ -171,9 +170,10 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev, snprintf(mz_name, sizeof(mz_name) - 1, "%lx", (unsigned long)rte_get_timer_cycles()); if (core_id == (unsigned int)LCORE_ID_ANY) - core_id = 0; + core_id = rte_get_master_lcore(); socket_id = rte_lcore_to_socket_id(core_id); - mz = rte_memzone_reserve_aligned(mz_name, size, socket_id, 0, align); + mz = rte_memzone_reserve_aligned(mz_name, size, socket_id, + RTE_MEMZONE_IOVA_CONTIG, align); if (!mz) { DP_ERR(p_dev, "Unable to allocate DMA memory " "of size %zu bytes - %s\n", @@ -181,11 +181,12 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev, *phys = 0; return OSAL_NULL; } - *phys = mz->phys_addr; + *phys = mz->iova; ecore_mz_mapping[ecore_mz_count++] = mz; - DP_VERBOSE(p_dev, ECORE_MSG_PROBE, - "aligned memory size=%zu phys=0x%" PRIx64 " virt=%p core=%d\n", - mz->len, mz->phys_addr, mz->addr, core_id); + DP_VERBOSE(p_dev, ECORE_MSG_SP, + "Allocated aligned dma memory size=%zu phys=0x%lx" + " virt=%p core=%d\n", + mz->len, (unsigned long)mz->iova, mz->addr, core_id); return mz->addr; } @@ -194,10 +195,15 @@ void osal_dma_free_mem(struct ecore_dev *p_dev, dma_addr_t phys) uint16_t j; for (j = 0 ; j < ecore_mz_count; j++) { - if (phys == ecore_mz_mapping[j]->phys_addr) { + if (phys == ecore_mz_mapping[j]->iova) { DP_VERBOSE(p_dev, ECORE_MSG_SP, "Free memzone %s\n", ecore_mz_mapping[j]->name); rte_memzone_free(ecore_mz_mapping[j]); + while (j < ecore_mz_count - 1) { + ecore_mz_mapping[j] = ecore_mz_mapping[j + 1]; + j++; + } + ecore_mz_count--; return; } } @@ -247,11 +253,58 @@ qede_get_mcp_proto_stats(struct ecore_dev *edev, if (type == ECORE_MCP_LAN_STATS) { ecore_get_vport_stats(edev, &lan_stats); - stats->lan_stats.ucast_rx_pkts = lan_stats.rx_ucast_pkts; - stats->lan_stats.ucast_tx_pkts = lan_stats.tx_ucast_pkts; + + /* @DPDK */ + stats->lan_stats.ucast_rx_pkts = lan_stats.common.rx_ucast_pkts; + stats->lan_stats.ucast_tx_pkts = lan_stats.common.tx_ucast_pkts; + stats->lan_stats.fcs_err = -1; } else { DP_INFO(edev, "Statistics request type %d not supported\n", type); } } + +void +qede_hw_err_notify(struct ecore_hwfn *p_hwfn, enum ecore_hw_err_type err_type) +{ + char err_str[64]; + + switch (err_type) { + case ECORE_HW_ERR_FAN_FAIL: + strcpy(err_str, "Fan Failure"); + break; + case ECORE_HW_ERR_MFW_RESP_FAIL: + strcpy(err_str, "MFW Response Failure"); + break; + case ECORE_HW_ERR_HW_ATTN: + strcpy(err_str, "HW Attention"); + break; + case ECORE_HW_ERR_DMAE_FAIL: + strcpy(err_str, "DMAE Failure"); + break; + case ECORE_HW_ERR_RAMROD_FAIL: + strcpy(err_str, "Ramrod Failure"); + break; + case ECORE_HW_ERR_FW_ASSERT: + strcpy(err_str, "FW Assertion"); + break; + default: + strcpy(err_str, "Unknown"); + } + + DP_ERR(p_hwfn, "HW error occurred [%s]\n", err_str); + ecore_int_attn_clr_enable(p_hwfn->p_dev, true); +} + +u32 qede_crc32(u32 crc, u8 *ptr, u32 length) +{ + int i; + + while (length--) { + crc ^= *ptr++; + for (i = 0; i < 8; i++) + crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); + } + return crc; +}