X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fbase%2Fbcm_osal.h;h=8b2faec5b6ff1651985d4462f44be3d3313ab852;hb=1e8d75d8059701fd15876416be06064735ec5e87;hp=70b1a7fa1c5e9e8546bf253ace2eeda65a139c56;hpb=e916697f8e894200086c6b9b9b972ed14f42b530;p=dpdk.git diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h index 70b1a7fa1c..8b2faec5b6 100644 --- a/drivers/net/qede/base/bcm_osal.h +++ b/drivers/net/qede/base/bcm_osal.h @@ -1,14 +1,13 @@ -/* - * Copyright (c) 2016 QLogic Corporation. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2016 - 2018 Cavium Inc. * All rights reserved. - * www.qlogic.com - * - * See LICENSE.qede_pmd for copyright and licensing details. + * www.cavium.com */ #ifndef __BCM_OSAL_H #define __BCM_OSAL_H +#include #include #include #include @@ -30,7 +29,7 @@ enum ecore_mcp_protocol_type; union ecore_mcp_protocol_stats; enum ecore_hw_err_type; -void qed_link_update(struct ecore_hwfn *hwfn, struct ecore_ptt *ptt); +void qed_link_update(struct ecore_hwfn *hwfn); #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN #undef __BIG_ENDIAN @@ -46,6 +45,8 @@ void qed_link_update(struct ecore_hwfn *hwfn, struct ecore_ptt *ptt); #define OSAL_WARN(arg1, arg2, arg3, ...) (0) +#define UNUSED(x) (void)(x) + /* Memory Types */ typedef uint8_t u8; typedef uint16_t u16; @@ -61,7 +62,7 @@ typedef u32 OSAL_BE32; #define osal_uintptr_t uintptr_t -typedef phys_addr_t dma_addr_t; +typedef rte_iova_t dma_addr_t; typedef rte_spinlock_t osal_spinlock_t; @@ -71,10 +72,6 @@ typedef size_t osal_size_t; typedef intptr_t osal_int_ptr_t; -typedef int bool; -#define true 1 -#define false 0 - #define nothing do {} while (0) /* Delays */ @@ -148,8 +145,8 @@ void osal_dma_free_mem(struct ecore_dev *edev, dma_addr_t phys); ((u8 *)(uintptr_t)(_p_hwfn->doorbells) + \ (_db_addr)), (u32)_val) -#define DIRECT_REG_WR64(hwfn, addr, value) nothing -#define DIRECT_REG_RD64(hwfn, addr) 0 +#define DIRECT_REG_RD64(hwfn, addr) rte_read64(addr) +#define DIRECT_REG_WR64(hwfn, addr, value) rte_write64((value), (addr)) /* Mutexes */ @@ -165,7 +162,12 @@ typedef pthread_mutex_t osal_mutex_t; #define OSAL_SPIN_LOCK_INIT(lock) rte_spinlock_init(lock) #define OSAL_SPIN_LOCK(lock) rte_spinlock_lock(lock) #define OSAL_SPIN_UNLOCK(lock) rte_spinlock_unlock(lock) -#define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) nothing +#define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \ + do { \ + UNUSED(lock); \ + flags = 0; \ + UNUSED(flags); \ + } while (0) #define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) nothing #define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing #define OSAL_SPIN_LOCK_DEALLOC(lock) nothing @@ -327,11 +329,14 @@ u32 qede_find_first_zero_bit(unsigned long *, u32); qede_find_first_zero_bit(bitmap, length) #define OSAL_BUILD_BUG_ON(cond) nothing -#define ETH_ALEN ETHER_ADDR_LEN +#define ETH_ALEN RTE_ETHER_ADDR_LEN +#define ETHER_TYPE_VLAN RTE_ETHER_TYPE_VLAN +#define ETHER_TYPE_QINQ RTE_ETHER_TYPE_QINQ #define OSAL_BITMAP_WEIGHT(bitmap, count) 0 -#define OSAL_LINK_UPDATE(hwfn, ptt) qed_link_update(hwfn, ptt) +#define OSAL_LINK_UPDATE(hwfn) qed_link_update(hwfn) +#define OSAL_TRANSCEIVER_UPDATE(hwfn) nothing #define OSAL_DCBX_AEN(hwfn, mib_type) nothing /* SR-IOV channel */ @@ -350,6 +355,7 @@ u32 qede_find_first_zero_bit(unsigned long *, u32); #define OSAL_IOV_GET_OS_TYPE() 0 #define OSAL_IOV_VF_MSG_TYPE(hwfn, vfid, vf_msg_type) nothing #define OSAL_IOV_PF_RESP_TYPE(hwfn, vfid, pf_resp_type) nothing +#define OSAL_IOV_VF_VPORT_STOP(hwfn, vf) nothing u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len, u8 *input_buf, u32 max_size, u8 *unzip_buf); @@ -369,7 +375,7 @@ void qede_hw_err_notify(struct ecore_hwfn *p_hwfn, qede_hw_err_notify(hwfn, err_type) #define OSAL_NVM_IS_ACCESS_ENABLED(hwfn) (1) -#define OSAL_NUM_ACTIVE_CPU() 0 +#define OSAL_NUM_CPUS() 0 /* Utility functions */ @@ -420,6 +426,7 @@ u32 qede_osal_log2(u32); #define OSAL_PAGE_SIZE 4096 #define OSAL_CACHE_LINE_SIZE RTE_CACHE_LINE_SIZE #define OSAL_IOMEM volatile +#define OSAL_UNUSED __rte_unused #define OSAL_UNLIKELY(x) __builtin_expect(!!(x), 0) #define OSAL_MIN_T(type, __min1, __min2) \ ((type)(__min1) < (type)(__min2) ? (type)(__min1) : (type)(__min2)) @@ -439,5 +446,14 @@ u32 qede_crc32(u32 crc, u8 *ptr, u32 length); #define OSAL_CRC8(table, pdata, nbytes, crc) 0 #define OSAL_MFW_TLV_REQ(p_hwfn) nothing #define OSAL_MFW_FILL_TLV_DATA(type, buf, data) (0) +#define OSAL_HW_INFO_CHANGE(p_hwfn, change) nothing +#define OSAL_MFW_CMD_PREEMPT(p_hwfn) nothing #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, mask, b_update, tunn) 0 + +#define OSAL_DIV_S64(a, b) ((a) / (b)) +#define OSAL_LLDP_RX_TLVS(p_hwfn, tlv_buf, tlv_size) nothing +#define OSAL_GET_EPOCH(p_hwfn) 0 +#define OSAL_DBG_ALLOC_USER_DATA(p_hwfn, user_data_ptr) (0) +#define OSAL_DB_REC_OCCURRED(p_hwfn) nothing + #endif /* __BCM_OSAL_H */