X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fbase%2Fbcm_osal.h;h=a20b318fc609011ddbdfbae5630b4ff30335a5d8;hb=9514fa2d1adb3d18ce803c77c8df90c8e2d8bd11;hp=f15242d446505bbaecf09d6f202232e224420c3c;hpb=ec94dbc573625119a9ef101a07cd3773c32d8d96;p=dpdk.git diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h index f15242d446..a20b318fc6 100644 --- a/drivers/net/qede/base/bcm_osal.h +++ b/drivers/net/qede/base/bcm_osal.h @@ -18,10 +18,17 @@ #include #include #include +#include /* Forward declaration */ struct ecore_dev; struct ecore_hwfn; +struct ecore_vf_acquire_sw_info; +struct vf_pf_resc_request; +enum ecore_mcp_protocol_type; +union ecore_mcp_protocol_stats; + +void qed_link_update(struct ecore_hwfn *hwfn); #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN #undef __BIG_ENDIAN @@ -35,6 +42,8 @@ struct ecore_hwfn; #endif #endif +#define OSAL_WARN(arg1, arg2, arg3, ...) (0) + /* Memory Types */ typedef uint8_t u8; typedef uint16_t u16; @@ -105,18 +114,18 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *, dma_addr_t *, /* HW reads/writes */ -#define DIRECT_REG_RD(_dev, _reg_addr) \ - (*((volatile u32 *) (_reg_addr))) +#define DIRECT_REG_RD(_dev, _reg_addr) rte_read32(_reg_addr) #define REG_RD(_p_hwfn, _reg_offset) \ DIRECT_REG_RD(_p_hwfn, \ ((u8 *)(uintptr_t)(_p_hwfn->regview) + (_reg_offset))) -#define DIRECT_REG_WR16(_reg_addr, _val) \ - (*((volatile u16 *)(_reg_addr)) = _val) +#define DIRECT_REG_WR16(_reg_addr, _val) rte_write16((_val), (_reg_addr)) + +#define DIRECT_REG_WR(_dev, _reg_addr, _val) rte_write32((_val), (_reg_addr)) -#define DIRECT_REG_WR(_dev, _reg_addr, _val) \ - (*((volatile u32 *)(_reg_addr)) = _val) +#define DIRECT_REG_WR_RELAXED(_dev, _reg_addr, _val) \ + rte_write32_relaxed((_val), (_reg_addr)) #define REG_WR(_p_hwfn, _reg_offset, _val) \ DIRECT_REG_WR(NULL, \ @@ -126,9 +135,10 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *, dma_addr_t *, DIRECT_REG_WR16(((u8 *)(uintptr_t)(_p_hwfn->regview) + \ (_reg_offset)), (u16)_val) -#define DOORBELL(_p_hwfn, _db_addr, _val) \ - DIRECT_REG_WR(_p_hwfn, \ - ((u8 *)(uintptr_t)(_p_hwfn->doorbells) + (_db_addr)), (u32)_val) +#define DOORBELL(_p_hwfn, _db_addr, _val) \ + DIRECT_REG_WR_RELAXED((_p_hwfn), \ + ((u8 *)(uintptr_t)(_p_hwfn->doorbells) + \ + (_db_addr)), (u32)_val) /* Mutexes */ @@ -295,6 +305,10 @@ bool qede_test_bit(u32, unsigned long *); #define OSAL_TEST_BIT(bit, bitmap) \ qede_test_bit(bit, bitmap) +u32 qede_find_first_bit(unsigned long *, u32); +#define OSAL_FIND_FIRST_BIT(bitmap, length) \ + qede_find_first_bit(bitmap, length) + u32 qede_find_first_zero_bit(unsigned long *, u32); #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ qede_find_first_zero_bit(bitmap, length) @@ -302,7 +316,8 @@ u32 qede_find_first_zero_bit(unsigned long *, u32); #define OSAL_BUILD_BUG_ON(cond) nothing #define ETH_ALEN ETHER_ADDR_LEN -#define OSAL_LINK_UPDATE(hwfn) nothing +#define OSAL_LINK_UPDATE(hwfn) qed_link_update(hwfn) +#define OSAL_DCBX_AEN(hwfn, mib_type) nothing /* SR-IOV channel */ @@ -310,17 +325,23 @@ u32 qede_find_first_zero_bit(unsigned long *, u32); #define OSAL_VF_SEND_MSG2PF(dev, done, msg, reply_addr, msg_size, reply_size) 0 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) #define OSAL_PF_VF_MSG(hwfn, vfid) 0 +#define OSAL_PF_VF_MALICIOUS(hwfn, vfid) nothing #define OSAL_IOV_CHK_UCAST(hwfn, vfid, params) 0 #define OSAL_IOV_POST_START_VPORT(hwfn, vf, vport_id, opaque_fid) nothing #define OSAL_IOV_VF_ACQUIRE(hwfn, vfid) 0 #define OSAL_IOV_VF_CLEANUP(hwfn, vfid) nothing #define OSAL_IOV_VF_VPORT_UPDATE(hwfn, vfid, p_params, p_mask) 0 -#define OSAL_VF_FILL_ACQUIRE_RESC_REQ(_dev_p, _resc_req, _os_info) nothing #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(_dev_p, _resc_resp) 0 #define OSAL_IOV_GET_OS_TYPE() 0 +#define OSAL_IOV_VF_MSG_TYPE(hwfn, vfid, vf_msg_type) 0 +#define OSAL_IOV_PF_RESP_TYPE(hwfn, vfid, pf_resp_type) 0 u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len, u8 *input_buf, u32 max_size, u8 *unzip_buf); +void qede_vf_fill_driver_data(struct ecore_hwfn *, struct vf_pf_resc_request *, + struct ecore_vf_acquire_sw_info *); +#define OSAL_VF_FILL_ACQUIRE_RESC_REQ(_dev_p, _resc_req, _os_info) \ + qede_vf_fill_driver_data(_dev_p, _resc_req, _os_info) #define OSAL_UNZIP_DATA(p_hwfn, input_len, buf, max_size, unzip_buf) \ qede_unzip_data(p_hwfn, input_len, buf, max_size, unzip_buf) @@ -367,6 +388,8 @@ u32 qede_osal_log2(u32); #define OSAL_ARRAY_SIZE(arr) RTE_DIM(arr) #define OSAL_SPRINTF(name, pattern, ...) \ sprintf(name, pattern, ##__VA_ARGS__) +#define OSAL_SNPRINTF(buf, size, format, ...) \ + snprintf(buf, size, format, ##__VA_ARGS__) #define OSAL_STRLEN(string) strlen(string) #define OSAL_STRCPY(dst, string) strcpy(dst, string) #define OSAL_STRNCPY(dst, string, len) strncpy(dst, string, len) @@ -383,7 +406,11 @@ u32 qede_osal_log2(u32); #define OSAL_MAX_T(type, __max1, __max2) \ ((type)(__max1) > (type)(__max2) ? (type)(__max1) : (type)(__max2)) -#define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) (0) +void qede_get_mcp_proto_stats(struct ecore_dev *, enum ecore_mcp_protocol_type, + union ecore_mcp_protocol_stats *); +#define OSAL_GET_PROTOCOL_STATS(dev, type, stats) \ + qede_get_mcp_proto_stats(dev, type, stats) + #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) #endif /* __BCM_OSAL_H */