X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fbase%2Fecore_dcbx.c;h=ccd4383bbb17c2b813b3d3f4de5074dbab00f9af;hb=f97b56f9f12eef610f4274bd5fb1c68b604bbb3b;hp=97fd48457b580636a6c863930fa5d9c6fe42f5fd;hpb=81dba2b2ff61ae1b2f5b45d6a93ccd82bf0cbfdb;p=dpdk.git diff --git a/drivers/net/qede/base/ecore_dcbx.c b/drivers/net/qede/base/ecore_dcbx.c index 97fd48457b..ccd4383bbb 100644 --- a/drivers/net/qede/base/ecore_dcbx.c +++ b/drivers/net/qede/base/ecore_dcbx.c @@ -1,9 +1,7 @@ -/* - * Copyright (c) 2016 QLogic Corporation. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2016 - 2018 Cavium Inc. * All rights reserved. - * www.qlogic.com - * - * See LICENSE.qede_pmd for copyright and licensing details. + * www.cavium.com */ #include "bcm_osal.h" @@ -131,7 +129,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 pri) static void ecore_dcbx_set_params(struct ecore_dcbx_results *p_data, - struct ecore_hwfn *p_hwfn, + struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, bool enable, u8 prio, u8 tc, enum dcbx_protocol_type type, enum ecore_pci_personality personality) @@ -149,21 +147,31 @@ ecore_dcbx_set_params(struct ecore_dcbx_results *p_data, } p_data->arr[type].update = UPDATE_DCB_DSCP; + /* Do not add valn tag 0 when DCB is enabled and port is in UFP mode */ + if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits)) + p_data->arr[type].dont_add_vlan0 = true; + /* QM reconf data */ if (p_hwfn->hw_info.personality == personality) p_hwfn->hw_info.offload_tc = tc; + + /* Configure dcbx vlan priority in doorbell block for roce EDPM */ + if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) && + (type == DCBX_PROTOCOL_ROCE)) { + ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); + ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP, prio << 1); + } } /* Update app protocol data and hw_info fields with the TLV info */ static void ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data, - struct ecore_hwfn *p_hwfn, + struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, bool enable, u8 prio, u8 tc, enum dcbx_protocol_type type) { enum ecore_pci_personality personality; enum dcbx_protocol_type id; - const char *name; /* @DPDK */ int i; for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) { @@ -173,9 +181,8 @@ ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data, continue; personality = ecore_dcbx_app_update[i].personality; - name = ecore_dcbx_app_update[i].name; - ecore_dcbx_set_params(p_data, p_hwfn, enable, + ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable, prio, tc, type, personality); } } @@ -218,21 +225,20 @@ ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn, *type = DCBX_PROTOCOL_ETH; } else { *type = DCBX_MAX_PROTOCOL_TYPE; - DP_ERR(p_hwfn, - "No action required, App TLV id = 0x%x" - " app_prio_bitmap = 0x%x\n", - id, app_prio_bitmap); + DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, + "No action required, App TLV entry = 0x%x\n", + app_prio_bitmap); return false; } return true; } -/* Parse app TLV's to update TC information in hw_info structure for +/* Parse app TLV's to update TC information in hw_info structure for * reconfiguring QM. Get protocol specific data for PF update ramrod command. */ static enum _ecore_status_t -ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, +ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, struct ecore_dcbx_results *p_data, struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl, int count, u8 dcbx_version) @@ -281,8 +287,8 @@ ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, enable = true; } - ecore_dcbx_update_app_info(p_data, p_hwfn, enable, - priority, tc, type); + ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, + enable, priority, tc, type); } } @@ -303,9 +309,10 @@ ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, if (p_data->arr[type].update) continue; - enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; - ecore_dcbx_update_app_info(p_data, p_hwfn, enable, - priority, tc, type); + /* if no app tlv was present, don't override in FW */ + ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, + p_data->arr[DCBX_PROTOCOL_ETH].enable, + priority, tc, type); } return ECORE_SUCCESS; @@ -315,17 +322,17 @@ ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, * reconfiguring QM. Get protocol specific data for PF update ramrod command. */ static enum _ecore_status_t -ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn) +ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt) { struct dcbx_app_priority_feature *p_app; - enum _ecore_status_t rc = ECORE_SUCCESS; - struct ecore_dcbx_results data = { 0 }; struct dcbx_app_priority_entry *p_tbl; + struct ecore_dcbx_results data; struct dcbx_ets_feature *p_ets; struct ecore_hw_info *p_info; u32 pri_tc_tbl, flags; u8 dcbx_version; int num_entries; + enum _ecore_status_t rc = ECORE_SUCCESS; flags = p_hwfn->p_dcbx_info->operational.flags; dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION); @@ -339,7 +346,8 @@ ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn) p_info = &p_hwfn->hw_info; num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); - rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, + OSAL_MEMSET(&data, 0, sizeof(struct ecore_dcbx_results)); + rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, num_entries, dcbx_version); if (rc != ECORE_SUCCESS) return rc; @@ -363,9 +371,9 @@ ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn, struct ecore_dcbx_mib_meta_data *p_data, enum ecore_mib_read_type type) { - enum _ecore_status_t rc = ECORE_SUCCESS; u32 prefix_seq_num, suffix_seq_num; int read_count = 0; + enum _ecore_status_t rc = ECORE_SUCCESS; /* The data is considered to be valid only if both sequence numbers are * the same. @@ -684,9 +692,9 @@ static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn, OSAL_MEMCPY(params->lldp_local.local_chassis_id, p_local->local_chassis_id, - OSAL_ARRAY_SIZE(p_local->local_chassis_id)); + sizeof(params->lldp_local.local_chassis_id)); OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id, - OSAL_ARRAY_SIZE(p_local->local_port_id)); + sizeof(params->lldp_local.local_port_id)); } static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn, @@ -698,9 +706,9 @@ static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn, OSAL_MEMCPY(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, - OSAL_ARRAY_SIZE(p_remote->peer_chassis_id)); + sizeof(params->lldp_remote.peer_chassis_id)); OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id, - OSAL_ARRAY_SIZE(p_remote->peer_port_id)); + sizeof(params->lldp_remote.peer_port_id)); } static enum _ecore_status_t @@ -859,7 +867,7 @@ static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn, DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); } - return rc; + return ECORE_SUCCESS; } /* @@ -880,10 +888,8 @@ ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, if (type == ECORE_DCBX_OPERATIONAL_MIB) { ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get); - rc = ecore_dcbx_process_mib_info(p_hwfn); + rc = ecore_dcbx_process_mib_info(p_hwfn, p_ptt); if (!rc) { - bool enabled; - /* reconfigure tcs of QM queues according * to negotiation results */ @@ -891,22 +897,24 @@ ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, /* update storm FW with negotiation results */ ecore_sp_pf_update_dcbx(p_hwfn); - - /* set eagle enigne 1 flow control workaround - * according to negotiation results - */ - enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled; } } ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); - /* Update the DSCP to TC mapping bit if required */ + /* Update the DSCP to TC mapping enable bit if required */ if ((type == ECORE_DCBX_OPERATIONAL_MIB) && p_hwfn->p_dcbx_info->dscp_nig_update) { u8 val = !!p_hwfn->p_dcbx_info->get.dscp.enabled; + u32 addr = NIG_REG_DSCP_TO_TC_MAP_ENABLE; + + rc = ecore_all_ppfids_wr(p_hwfn, p_ptt, addr, val); + if (rc != ECORE_SUCCESS) { + DP_NOTICE(p_hwfn, false, + "Failed to update the DSCP to TC mapping enable bit\n"); + return rc; + } - ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE, val); p_hwfn->p_dcbx_info->dscp_nig_update = false; } @@ -920,7 +928,7 @@ enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn) p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_hwfn->p_dcbx_info)); if (!p_hwfn->p_dcbx_info) { - DP_NOTICE(p_hwfn, true, + DP_NOTICE(p_hwfn, false, "Failed to allocate `struct ecore_dcbx_info'"); return ECORE_NOMEM; } @@ -945,6 +953,7 @@ static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, p_data->dcb_tc = p_src->arr[type].tc; p_data->dscp_enable_flag = p_src->arr[type].dscp_enable; p_data->dscp_val = p_src->arr[type].dscp_val; + p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0; } /* Set pf update ramrod command params */ @@ -1164,6 +1173,9 @@ ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn, local_admin->config = DCBX_CONFIG_VERSION_DISABLED; } + DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx version = %d\n", + local_admin->config); + if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG) ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, ¶ms->config.params); @@ -1537,3 +1549,59 @@ ecore_lldp_set_system_tlvs(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, return rc; } + +enum _ecore_status_t +ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn, + u8 dscp_index, u8 *p_dscp_pri) +{ + struct ecore_dcbx_get *p_dcbx_info; + enum _ecore_status_t rc; + + if (dscp_index >= ECORE_DCBX_DSCP_SIZE) { + DP_ERR(p_hwfn, "Invalid dscp index %d\n", dscp_index); + return ECORE_INVAL; + } + + p_dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL, + sizeof(*p_dcbx_info)); + if (!p_dcbx_info) + return ECORE_NOMEM; + + OSAL_MEMSET(p_dcbx_info, 0, sizeof(*p_dcbx_info)); + rc = ecore_dcbx_query_params(p_hwfn, p_dcbx_info, + ECORE_DCBX_OPERATIONAL_MIB); + if (rc) { + OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); + return rc; + } + + *p_dscp_pri = p_dcbx_info->dscp.dscp_pri_map[dscp_index]; + OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); + + return ECORE_SUCCESS; +} + +enum _ecore_status_t +ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, + u8 dscp_index, u8 pri_val) +{ + struct ecore_dcbx_set dcbx_set; + enum _ecore_status_t rc; + + if (dscp_index >= ECORE_DCBX_DSCP_SIZE || + pri_val >= ECORE_MAX_PFC_PRIORITIES) { + DP_ERR(p_hwfn, "Invalid dscp params: index = %d pri = %d\n", + dscp_index, pri_val); + return ECORE_INVAL; + } + + OSAL_MEMSET(&dcbx_set, 0, sizeof(dcbx_set)); + rc = ecore_dcbx_get_config_params(p_hwfn, &dcbx_set); + if (rc) + return rc; + + dcbx_set.override_flags = ECORE_DCBX_OVERRIDE_DSCP_CFG; + dcbx_set.dscp.dscp_pri_map[dscp_index] = pri_val; + + return ecore_dcbx_config_params(p_hwfn, p_ptt, &dcbx_set, 1); +}