X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fbase%2Fecore_sp_commands.c;h=9860a62b5b27bb877b68708a7823dbac3740e006;hb=2e542da709371ee51d61d74c9a1b357ad34ae13e;hp=49a5ff552310ad8c40bdf67fa129d89b95ea0469;hpb=e290ccf8c6b0ce99c4642123e7693112a51e4246;p=dpdk.git

diff --git a/drivers/net/qede/base/ecore_sp_commands.c b/drivers/net/qede/base/ecore_sp_commands.c
index 49a5ff5523..9860a62b5b 100644
--- a/drivers/net/qede/base/ecore_sp_commands.c
+++ b/drivers/net/qede/base/ecore_sp_commands.c
@@ -355,14 +355,16 @@ enum _ecore_status_t ecore_sp_pf_start(struct ecore_hwfn *p_hwfn,
 		p_ramrod->outer_tag_config.inner_to_outer_pri_map[i] = i;
 
 	/* enable_stag_pri_change should be set if port is in BD mode or,
-	 * UFP with Host Control mode or, UFP with DCB over base interface.
+	 * UFP with Host Control mode.
 	 */
 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits)) {
-		if ((p_hwfn->ufp_info.pri_type == ECORE_UFP_PRI_OS) ||
-		    (p_hwfn->p_dcbx_info->results.dcbx_enabled))
+		if (p_hwfn->ufp_info.pri_type == ECORE_UFP_PRI_OS)
 			p_ramrod->outer_tag_config.enable_stag_pri_change = 1;
 		else
 			p_ramrod->outer_tag_config.enable_stag_pri_change = 0;
+
+		p_ramrod->outer_tag_config.outer_tag.tci |=
+			OSAL_CPU_TO_LE16(((u16)p_hwfn->ufp_info.tc << 13));
 	}
 
 	/* Place EQ address in RAMROD */
@@ -459,8 +461,7 @@ enum _ecore_status_t ecore_sp_pf_update_ufp(struct ecore_hwfn *p_hwfn)
 		return rc;
 
 	p_ent->ramrod.pf_update.update_enable_stag_pri_change = true;
-	if ((p_hwfn->ufp_info.pri_type == ECORE_UFP_PRI_OS) ||
-	    (p_hwfn->p_dcbx_info->results.dcbx_enabled))
+	if (p_hwfn->ufp_info.pri_type == ECORE_UFP_PRI_OS)
 		p_ent->ramrod.pf_update.enable_stag_pri_change = 1;
 	else
 		p_ent->ramrod.pf_update.enable_stag_pri_change = 0;
@@ -637,6 +638,10 @@ enum _ecore_status_t ecore_sp_heartbeat_ramrod(struct ecore_hwfn *p_hwfn)
 	if (rc != ECORE_SUCCESS)
 		return rc;
 
+	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits))
+		p_ent->ramrod.pf_update.mf_vlan |=
+			OSAL_CPU_TO_LE16(((u16)p_hwfn->ufp_info.tc << 13));
+
 	return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 }