X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fqede_ethdev.c;h=edc5b43b2cfdee9350ec5c2ea6da7e51c2e0ec99;hb=5526b0cbd50c757830b902e513281b835c98a2c1;hp=59129f25c329f7546753efc9de94bb1adf3f16a9;hpb=64c239b7f8b7e2dc3967254b59601abbde3f846c;p=dpdk.git diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c index 59129f25c3..edc5b43b2c 100644 --- a/drivers/net/qede/qede_ethdev.c +++ b/drivers/net/qede/qede_ethdev.c @@ -175,14 +175,14 @@ static void qede_interrupt_action(struct ecore_hwfn *p_hwfn) } static void -qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param) +qede_interrupt_handler(struct rte_intr_handle *handle, void *param) { struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param; struct qede_dev *qdev = eth_dev->data->dev_private; struct ecore_dev *edev = &qdev->edev; qede_interrupt_action(ECORE_LEADING_HWFN(edev)); - if (rte_intr_enable(ð_dev->pci_dev->intr_handle)) + if (rte_intr_enable(handle)) DP_ERR(edev, "rte_intr_enable failed\n"); } @@ -647,9 +647,11 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev, struct qede_dev *qdev = eth_dev->data->dev_private; struct ecore_dev *edev = &qdev->edev; struct qed_link_output link; + uint32_t speed_cap = 0; PMD_INIT_FUNC_TRACE(edev); + dev_info->pci_dev = RTE_DEV_TO_PCI(eth_dev->device); dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU + QEDE_ETH_OVERHEAD); dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN; @@ -681,7 +683,19 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev, memset(&link, 0, sizeof(struct qed_link_output)); qdev->ops->common->get_link(edev, &link); - dev_info->speed_capa = rte_eth_speed_bitflag(link.adv_speed, 0); + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G) + speed_cap |= ETH_LINK_SPEED_1G; + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G) + speed_cap |= ETH_LINK_SPEED_10G; + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G) + speed_cap |= ETH_LINK_SPEED_25G; + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G) + speed_cap |= ETH_LINK_SPEED_40G; + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G) + speed_cap |= ETH_LINK_SPEED_50G; + if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G) + speed_cap |= ETH_LINK_SPEED_100G; + dev_info->speed_capa = speed_cap; } /* return 0 means link status changed, -1 means not changed */ @@ -796,6 +810,7 @@ static void qede_poll_sp_sb_cb(void *param) static void qede_dev_close(struct rte_eth_dev *eth_dev) { + struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(eth_dev->device); struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev); struct ecore_dev *edev = QEDE_INIT_EDEV(qdev); int rc; @@ -822,9 +837,9 @@ static void qede_dev_close(struct rte_eth_dev *eth_dev) qdev->ops->common->remove(edev); - rte_intr_disable(ð_dev->pci_dev->intr_handle); + rte_intr_disable(&pci_dev->intr_handle); - rte_intr_callback_unregister(ð_dev->pci_dev->intr_handle, + rte_intr_callback_unregister(&pci_dev->intr_handle, qede_interrupt_handler, (void *)eth_dev); if (edev->num_hwfns > 1) @@ -960,6 +975,7 @@ qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) { xstats[stat_idx].value = *(uint64_t *)(((char *)&stats) + qede_xstats_strings[i].offset); + xstats[stat_idx].id = stat_idx; stat_idx++; } @@ -969,6 +985,7 @@ qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, xstats[stat_idx].value = *(uint64_t *)( ((char *)(qdev->fp_array[(qid)].rxq)) + qede_rxq_xstats_strings[i].offset); + xstats[stat_idx].id = stat_idx; stat_idx++; } } @@ -1390,7 +1407,8 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf) /* Extract key data structures */ adapter = eth_dev->data->dev_private; edev = &adapter->edev; - pci_addr = eth_dev->pci_dev->addr; + pci_dev = RTE_DEV_TO_PCI(eth_dev->device); + pci_addr = pci_dev->addr; PMD_INIT_FUNC_TRACE(edev); @@ -1407,8 +1425,6 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf) return 0; } - pci_dev = eth_dev->pci_dev; - rte_eth_copy_pci_info(eth_dev, pci_dev); qed_ops = qed_get_eth_ops(); @@ -1429,10 +1445,10 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf) qede_update_pf_params(edev); - rte_intr_callback_register(ð_dev->pci_dev->intr_handle, + rte_intr_callback_register(&pci_dev->intr_handle, qede_interrupt_handler, (void *)eth_dev); - if (rte_intr_enable(ð_dev->pci_dev->intr_handle)) { + if (rte_intr_enable(&pci_dev->intr_handle)) { DP_ERR(edev, "rte_intr_enable() failed\n"); return -ENODEV; } @@ -1655,5 +1671,7 @@ static struct eth_driver rte_qede_pmd = { RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv); RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map); +RTE_PMD_REGISTER_KMOD_DEP(net_qede, "* igb_uio | uio_pci_generic | vfio"); RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv); RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map); +RTE_PMD_REGISTER_KMOD_DEP(net_qede_vf, "* igb_uio | vfio");