X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fqede%2Fqede_if.h;h=1693a243f9457b636b2694639e1aad8791b3e0e0;hb=05b405d581486651305551a9f7295f40388d95db;hp=0a1f7db30777c82a14a8c19a8a1d969aea9949b4;hpb=de5588af0b0a23c4fa49dddcb125ee59b63bb179;p=dpdk.git diff --git a/drivers/net/qede/qede_if.h b/drivers/net/qede/qede_if.h index 0a1f7db307..1693a243f9 100644 --- a/drivers/net/qede/qede_if.h +++ b/drivers/net/qede/qede_if.h @@ -1,9 +1,7 @@ -/* - * Copyright (c) 2016 QLogic Corporation. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2016 - 2018 Cavium Inc. * All rights reserved. - * www.qlogic.com - * - * See LICENSE.qede_pmd for copyright and licensing details. + * www.cavium.com */ #ifndef _QEDE_IF_H @@ -19,7 +17,7 @@ enum ecore_int_mode; struct qed_dev_info { uint8_t num_hwfns; - uint8_t hw_mac[ETHER_ADDR_LEN]; + uint8_t hw_mac[RTE_ETHER_ADDR_LEN]; bool is_mf_default; /* FW version */ @@ -40,19 +38,51 @@ struct qed_dev_info { #define QED_MFW_VERSION_3_OFFSET 24 uint32_t flash_size; - uint8_t mf_mode; + bool b_arfs_capable; + bool b_inter_pf_switch; bool tx_switching; u16 mtu; + + bool smart_an; + + /* MBI version */ + uint32_t mbi_version; +#define QED_MBI_VERSION_0_MASK 0x000000FF +#define QED_MBI_VERSION_0_OFFSET 0 +#define QED_MBI_VERSION_1_MASK 0x0000FF00 +#define QED_MBI_VERSION_1_OFFSET 8 +#define QED_MBI_VERSION_2_MASK 0x00FF0000 +#define QED_MBI_VERSION_2_OFFSET 16 + + /* Out param for qede */ + bool vxlan_enable; + bool gre_enable; + bool geneve_enable; + + enum ecore_dev_type dev_type; }; -enum qed_sb_type { - QED_SB_TYPE_L2_QUEUE, - QED_SB_TYPE_STORAGE, - QED_SB_TYPE_CNQ, +struct qed_dev_eth_info { + struct qed_dev_info common; + + uint8_t num_queues; + uint8_t num_tc; + + struct rte_ether_addr port_mac; + uint16_t num_vlan_filters; + uint32_t num_mac_filters; + + /* Legacy VF - this affects the datapath */ + bool is_legacy; }; -enum qed_protocol { - QED_PROTOCOL_ETH, +#define INIT_STRUCT_FIELD(field, value) .field = value + +struct qed_eth_ops { + const struct qed_common_ops *common; + int (*fill_dev_info)(struct ecore_dev *edev, + struct qed_dev_eth_info *info); + void (*sriov_configure)(struct ecore_dev *edev, int num_vfs); }; struct qed_link_params { @@ -62,6 +92,7 @@ struct qed_link_params { #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS (1 << 1) #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED (1 << 2) #define QED_LINK_OVERRIDE_PAUSE_CONFIG (1 << 3) +#define QED_LINK_OVERRIDE_EEE_CONFIG (1 << 5) uint32_t override_flags; bool autoneg; uint32_t adv_speeds; @@ -70,6 +101,7 @@ struct qed_link_params { #define QED_LINK_PAUSE_RX_ENABLE (1 << 1) #define QED_LINK_PAUSE_TX_ENABLE (1 << 2) uint32_t pause_config; + struct ecore_link_eee_params eee; }; struct qed_link_output { @@ -80,9 +112,15 @@ struct qed_link_output { uint32_t speed; /* In Mb/s */ uint32_t adv_speed; /* Speed mask */ uint8_t duplex; /* In DUPLEX defs */ - uint8_t port; /* In PORT defs */ + uint16_t port; /* In PORT defs */ bool autoneg; uint32_t pause_config; + + /* EEE - capability & param */ + bool eee_supported; + bool eee_active; + u8 sup_caps; + struct ecore_link_eee_params eee; }; struct qed_slowpath_params { @@ -94,27 +132,13 @@ struct qed_slowpath_params { uint8_t name[NAME_SIZE]; }; -#define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */ - struct qed_common_cb_ops { void (*link_update)(void *dev, struct qed_link_output *link); }; -struct qed_selftest_ops { -/** - * @brief registers - Perform register tests - * - * @param edev - * - * @return 0 on success, error otherwise. - */ - int (*registers)(struct ecore_dev *edev); -}; - struct qed_common_ops { int (*probe)(struct ecore_dev *edev, struct rte_pci_device *pci_dev, - enum qed_protocol protocol, uint32_t dp_module, uint8_t dp_level, bool is_vf); void (*set_name)(struct ecore_dev *edev, char name[]); enum _ecore_status_t @@ -154,7 +178,11 @@ struct qed_common_ops { struct ecore_sb_info *sb_info, void *sb_virt_addr, dma_addr_t sb_phy_addr, - uint16_t sb_id, enum qed_sb_type type); + uint16_t sb_id); + + int (*get_sb_info)(struct ecore_dev *edev, + struct ecore_sb_info *sb, u16 qid, + struct ecore_sb_info_dbg *sb_dbg); bool (*can_link_change)(struct ecore_dev *edev); @@ -162,6 +190,55 @@ struct qed_common_ops { uint32_t dp_module, uint8_t dp_level); int (*send_drv_state)(struct ecore_dev *edev, bool active); + + /* ############### DEBUG *************************/ + + int (*dbg_grc)(struct ecore_dev *edev, + void *buffer, + u32 *num_dumped_bytes); + int (*dbg_grc_size)(struct ecore_dev *edev); + + int (*dbg_idle_chk)(struct ecore_dev *edev, + void *buffer, + u32 *num_dumped_bytes); + int (*dbg_idle_chk_size)(struct ecore_dev *edev); + + int (*dbg_reg_fifo)(struct ecore_dev *edev, + void *buffer, + u32 *num_dumped_bytes); + int (*dbg_reg_fifo_size)(struct ecore_dev *edev); + + int (*dbg_mcp_trace)(struct ecore_dev *edev, + void *buffer, + u32 *num_dumped_bytes); + int (*dbg_mcp_trace_size)(struct ecore_dev *edev); + + int (*dbg_protection_override)(struct ecore_dev *edev, void *buffer, + u32 *num_dumped_bytes); + int (*dbg_protection_override_size)(struct ecore_dev *edev); + + int (*dbg_igu_fifo_size)(struct ecore_dev *edev); + int (*dbg_igu_fifo)(struct ecore_dev *edev, void *buffer, + u32 *num_dumped_bytes); + + int (*dbg_fw_asserts)(struct ecore_dev *edev, void *buffer, + u32 *num_dumped_bytes); + + int (*dbg_fw_asserts_size)(struct ecore_dev *edev); + + int (*dbg_ilt)(struct ecore_dev *edev, void *buffer, + u32 *num_dumped_bytes); + + int (*dbg_ilt_size)(struct ecore_dev *edev); + + u8 (*dbg_get_debug_engine)(struct ecore_dev *edev); + void (*dbg_set_debug_engine)(struct ecore_dev *edev, + int engine_number); + }; +/* Externs */ + +const struct qed_eth_ops *qed_get_eth_ops(void); + #endif /* _QEDE_IF_H */