X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fbase%2Fef10_impl.h;h=2819ae6ed0b89c5f56edc3c4e517db75c585543b;hb=e7feaba71c02418796afbe4356840e725ca6df6b;hp=deaadcbb71a29f986e692c57c738fb4e02af6b83;hpb=201f052a37ab965283d2df9d386623ee6084258d;p=dpdk.git diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h index deaadcbb71..2819ae6ed0 100644 --- a/drivers/net/sfc/base/ef10_impl.h +++ b/drivers/net/sfc/base/ef10_impl.h @@ -1,31 +1,7 @@ -/* - * Copyright (c) 2015-2016 Solarflare Communications Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause * - * The views and conclusions contained in the software and documentation are - * those of the authors and should not be interpreted as representing official - * policies, either expressed or implied, of the FreeBSD Project. + * Copyright (c) 2015-2018 Solarflare Communications Inc. + * All rights reserved. */ #ifndef _SYS_EF10_IMPL_H @@ -35,13 +11,27 @@ extern "C" { #endif -#if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD) -#define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS) -#elif EFSYS_OPT_HUNTINGTON -#define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS -#elif EFSYS_OPT_MEDFORD -#define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS -#endif + +/* Number of hardware PIO buffers (for compile-time resource dimensions) */ +#define EF10_MAX_PIOBUF_NBUFS (16) + +#if EFSYS_OPT_HUNTINGTON +# if (EF10_MAX_PIOBUF_NBUFS < HUNT_PIOBUF_NBUFS) +# error "EF10_MAX_PIOBUF_NBUFS too small" +# endif +#endif /* EFSYS_OPT_HUNTINGTON */ +#if EFSYS_OPT_MEDFORD +# if (EF10_MAX_PIOBUF_NBUFS < MEDFORD_PIOBUF_NBUFS) +# error "EF10_MAX_PIOBUF_NBUFS too small" +# endif +#endif /* EFSYS_OPT_MEDFORD */ +#if EFSYS_OPT_MEDFORD2 +# if (EF10_MAX_PIOBUF_NBUFS < MEDFORD2_PIOBUF_NBUFS) +# error "EF10_MAX_PIOBUF_NBUFS too small" +# endif +#endif /* EFSYS_OPT_MEDFORD2 */ + + /* * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could @@ -50,8 +40,9 @@ extern "C" { */ #define EF10_NVRAM_CHUNK 0x80 -/* Alignment requirement for value written to RX WPTR: - * the WPTR must be aligned to an 8 descriptor boundary +/* + * Alignment requirement for value written to RX WPTR: the WPTR must be aligned + * to an 8 descriptor boundary. */ #define EF10_RX_WPTR_ALIGN 8 @@ -199,6 +190,14 @@ extern __checkReturn efx_rc_t ef10_nic_init( __in efx_nic_t *enp); +extern __checkReturn boolean_t +ef10_nic_hw_unavailable( + __in efx_nic_t *enp); + +extern void +ef10_nic_set_hw_unavailable( + __in efx_nic_t *enp); + #if EFSYS_OPT_DIAG extern __checkReturn efx_rc_t @@ -462,7 +461,7 @@ ef10_nvram_partn_write( __in efx_nic_t *enp, __in uint32_t partn, __in unsigned int offset, - __out_bcount(size) caddr_t data, + __in_bcount(size) caddr_t data, __in size_t size); extern __checkReturn efx_rc_t @@ -486,17 +485,21 @@ ef10_nvram_partn_set_version( extern __checkReturn efx_rc_t ef10_nvram_buffer_validate( - __in efx_nic_t *enp, __in uint32_t partn, __in_bcount(buffer_size) caddr_t bufferp, __in size_t buffer_size); +extern void +ef10_nvram_buffer_init( + __out_bcount(buffer_size) + caddr_t bufferp, + __in size_t buffer_size); + extern __checkReturn efx_rc_t ef10_nvram_buffer_create( - __in efx_nic_t *enp, - __in uint16_t partn_type, - __in_bcount(buffer_size) + __in uint32_t partn_type, + __out_bcount(buffer_size) caddr_t bufferp, __in size_t buffer_size); @@ -505,8 +508,7 @@ ef10_nvram_buffer_find_item_start( __in_bcount(buffer_size) caddr_t bufferp, __in size_t buffer_size, - __out uint32_t *startp - ); + __out uint32_t *startp); extern __checkReturn efx_rc_t ef10_nvram_buffer_find_end( @@ -514,8 +516,7 @@ ef10_nvram_buffer_find_end( caddr_t bufferp, __in size_t buffer_size, __in uint32_t offset, - __out uint32_t *endp - ); + __out uint32_t *endp); extern __checkReturn __success(return != B_FALSE) boolean_t ef10_nvram_buffer_find_item( @@ -524,8 +525,17 @@ ef10_nvram_buffer_find_item( __in size_t buffer_size, __in uint32_t offset, __out uint32_t *startp, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); + +extern __checkReturn efx_rc_t +ef10_nvram_buffer_peek_item( + __in_bcount(buffer_size) + caddr_t bufferp, + __in size_t buffer_size, + __in uint32_t offset, + __out uint32_t *tagp, + __out uint32_t *lengthp, + __out uint32_t *value_offsetp); extern __checkReturn efx_rc_t ef10_nvram_buffer_get_item( @@ -534,11 +544,11 @@ ef10_nvram_buffer_get_item( __in size_t buffer_size, __in uint32_t offset, __in uint32_t length, - __out_bcount_part(item_max_size, *lengthp) - caddr_t itemp, - __in size_t item_max_size, - __out uint32_t *lengthp - ); + __out uint32_t *tagp, + __out_bcount_part(value_max_size, *lengthp) + caddr_t valuep, + __in size_t value_max_size, + __out uint32_t *lengthp); extern __checkReturn efx_rc_t ef10_nvram_buffer_insert_item( @@ -546,10 +556,21 @@ ef10_nvram_buffer_insert_item( caddr_t bufferp, __in size_t buffer_size, __in uint32_t offset, - __in_bcount(length) caddr_t keyp, + __in uint32_t tag, + __in_bcount(length) caddr_t valuep, + __in uint32_t length, + __out uint32_t *lengthp); + +extern __checkReturn efx_rc_t +ef10_nvram_buffer_modify_item( + __in_bcount(buffer_size) + caddr_t bufferp, + __in size_t buffer_size, + __in uint32_t offset, + __in uint32_t tag, + __in_bcount(length) caddr_t valuep, __in uint32_t length, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn efx_rc_t ef10_nvram_buffer_delete_item( @@ -558,15 +579,13 @@ ef10_nvram_buffer_delete_item( __in size_t buffer_size, __in uint32_t offset, __in uint32_t length, - __in uint32_t end - ); + __in uint32_t end); extern __checkReturn efx_rc_t ef10_nvram_buffer_finish( __in_bcount(buffer_size) caddr_t bufferp, - __in size_t buffer_size - ); + __in size_t buffer_size); #endif /* EFSYS_OPT_NVRAM */ @@ -668,7 +687,7 @@ ef10_tx_qcreate( __in unsigned int index, __in unsigned int label, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, __in uint16_t flags, __in efx_evq_t *eep, @@ -679,13 +698,13 @@ extern void ef10_tx_qdestroy( __in efx_txq_t *etp); -extern __checkReturn efx_rc_t +extern __checkReturn efx_rc_t ef10_tx_qpost( - __in efx_txq_t *etp, - __in_ecount(n) efx_buffer_t *eb, - __in unsigned int n, - __in unsigned int completed, - __inout unsigned int *addedp); + __in efx_txq_t *etp, + __in_ecount(ndescs) efx_buffer_t *ebp, + __in unsigned int ndescs, + __in unsigned int completed, + __inout unsigned int *addedp); extern void ef10_tx_qpush( @@ -772,6 +791,7 @@ extern void ef10_tx_qdesc_tso2_create( __in efx_txq_t *etp, __in uint16_t ipv4_id, + __in uint16_t outer_ipv4_id, __in uint32_t tcp_seq, __in uint16_t tcp_mss, __out_ecount(count) efx_desc_t *edp, @@ -783,6 +803,11 @@ ef10_tx_qdesc_vlantci_create( __in uint16_t vlan_tci, __out efx_desc_t *edp); +extern void +ef10_tx_qdesc_checksum_create( + __in efx_txq_t *etp, + __in uint16_t flags, + __out efx_desc_t *edp); #if EFSYS_OPT_QSTATS @@ -795,7 +820,7 @@ ef10_tx_qstats_update( typedef uint32_t efx_piobuf_handle_t; -#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1) +#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t)-1) extern __checkReturn efx_rc_t ef10_nic_pio_alloc( @@ -977,15 +1002,19 @@ extern void ef10_rx_qenable( __in efx_rxq_t *erp); +union efx_rxq_type_data_u; + extern __checkReturn efx_rc_t ef10_rx_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in unsigned int label, __in efx_rxq_type_t type, + __in const union efx_rxq_type_data_u *type_data, __in efsys_mem_t *esmp, __in size_t ndescs, __in uint32_t id, + __in unsigned int flags, __in efx_evq_t *eep, __in efx_rxq_t *erp); @@ -1034,7 +1063,7 @@ typedef struct ef10_filter_entry_s { * IPv4 or IPv6 outer frame, VXLAN, GENEVE or NVGRE packet type, and unicast or * multicast inner frames. */ -#define EFX_EF10_FILTER_ENCAP_FILTERS_MAX 12 +#define EFX_EF10_FILTER_ENCAP_FILTERS_MAX 12 typedef struct ef10_filter_table_s { ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS]; @@ -1134,7 +1163,8 @@ extern __checkReturn efx_rc_t efx_mcdi_get_port_modes( __in efx_nic_t *enp, __out uint32_t *modesp, - __out_opt uint32_t *current_modep); + __out_opt uint32_t *current_modep, + __out_opt uint32_t *default_modep); extern __checkReturn efx_rc_t ef10_nic_get_port_mode_bandwidth( @@ -1158,6 +1188,11 @@ efx_mcdi_get_clock( __out uint32_t *dpcpu_freqp); +extern __checkReturn efx_rc_t +efx_mcdi_get_rxdp_config( + __in efx_nic_t *enp, + __out uint32_t *end_paddingp); + extern __checkReturn efx_rc_t efx_mcdi_get_vector_cfg( __in efx_nic_t *enp, @@ -1165,20 +1200,27 @@ efx_mcdi_get_vector_cfg( __out_opt uint32_t *pf_nvecp, __out_opt uint32_t *vf_nvecp); -extern __checkReturn efx_rc_t -ef10_get_datapath_caps( - __in efx_nic_t *enp); - extern __checkReturn efx_rc_t ef10_get_privilege_mask( __in efx_nic_t *enp, __out uint32_t *maskp); +#if EFSYS_OPT_FW_SUBVARIANT_AWARE + extern __checkReturn efx_rc_t -ef10_external_port_mapping( +efx_mcdi_get_nic_global( __in efx_nic_t *enp, - __in uint32_t port, - __out uint8_t *external_portp); + __in uint32_t key, + __out uint32_t *valuep); + +extern __checkReturn efx_rc_t +efx_mcdi_set_nic_global( + __in efx_nic_t *enp, + __in uint32_t key, + __in uint32_t value); + +#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */ + #if EFSYS_OPT_RX_PACKED_STREAM @@ -1201,15 +1243,25 @@ ef10_external_port_mapping( /* Minimum space for packet in packed stream mode */ #define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \ P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \ - EFX_MAC_PDU_MIN + \ - EFX_RX_PACKED_STREAM_ALIGNMENT, \ - EFX_RX_PACKED_STREAM_ALIGNMENT) + EFX_MAC_PDU_MIN + \ + EFX_RX_PACKED_STREAM_ALIGNMENT, \ + EFX_RX_PACKED_STREAM_ALIGNMENT) /* Maximum number of credits */ #define EFX_RX_PACKED_STREAM_MAX_CREDITS 127 #endif /* EFSYS_OPT_RX_PACKED_STREAM */ +#if EFSYS_OPT_RX_ES_SUPER_BUFFER + +/* + * Maximum DMA length and buffer stride alignment. + * (see SF-119419-TC, 3.2) + */ +#define EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT 64 + +#endif + #ifdef __cplusplus } #endif