X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fbase%2Fefx.h;h=eb44279beb804309fcd2b1dde44fc4aee1fd31c3;hb=f5e50fb6283c07521f511012c0c8496826c2459c;hp=43157e2622f0836eef1df56a2c4c2f18985f8b9d;hpb=daa007afd04b40f903b02035b73c945b4a25efff;p=dpdk.git diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index 43157e2622..eb44279beb 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -40,13 +40,16 @@ extern "C" { #endif #define EFX_STATIC_ASSERT(_cond) \ - ((void)sizeof(char[(_cond) ? 1 : -1])) + ((void)sizeof (char[(_cond) ? 1 : -1])) #define EFX_ARRAY_SIZE(_array) \ - (sizeof(_array) / sizeof((_array)[0])) + (sizeof (_array) / sizeof ((_array)[0])) #define EFX_FIELD_OFFSET(_type, _field) \ - ((size_t) &(((_type *)0)->_field)) + ((size_t)&(((_type *)0)->_field)) + +/* The macro expands divider twice */ +#define EFX_DIV_ROUND_UP(_n, _d) (((_n) + (_d) - 1) / (_d)) /* Return codes */ @@ -555,7 +558,7 @@ efx_mac_stats_get_mask( #define EFX_MAC_STAT_SUPPORTED(_mask, _stat) \ ((_mask)[(_stat) / EFX_MAC_STATS_MASK_BITS_PER_PAGE] & \ - (1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1)))) + (1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1)))) #define EFX_MAC_STATS_SIZE 0x400 @@ -624,7 +627,7 @@ efx_mon_init( #define EFX_MON_STATS_PAGE_SIZE 0x100 #define EFX_MON_MASK_ELEMENT_SIZE 32 -/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 5d4ee5185e419abe */ +/* START MKCONFIG GENERATED MonitorHeaderStatsBlock aa0233c80156308e */ typedef enum efx_mon_stat_e { EFX_MON_STAT_2_5V, EFX_MON_STAT_VCCP1, @@ -703,6 +706,8 @@ typedef enum efx_mon_stat_e { EFX_MON_STAT_CONTROLLER_TDIODE_TEMP, EFX_MON_STAT_BOARD_FRONT_TEMP, EFX_MON_STAT_BOARD_BACK_TEMP, + EFX_MON_STAT_I1V8, + EFX_MON_STAT_I2V5, EFX_MON_NSTATS } efx_mon_stat_t; @@ -903,7 +908,8 @@ typedef enum efx_phy_media_type_e { EFX_PHY_MEDIA_NTYPES } efx_phy_media_type_t; -/* Get the type of medium currently used. If the board has ports for +/* + * Get the type of medium currently used. If the board has ports for * modules, a module is present, and we recognise the media type of * the module, then this will be the media type of the module. * Otherwise it will be the media type of the port. @@ -913,13 +919,13 @@ efx_phy_media_type_get( __in efx_nic_t *enp, __out efx_phy_media_type_t *typep); -extern efx_rc_t +extern __checkReturn efx_rc_t efx_phy_module_get_info( - __in efx_nic_t *enp, - __in uint8_t dev_addr, - __in uint8_t offset, - __in uint8_t len, - __out_bcount(len) uint8_t *data); + __in efx_nic_t *enp, + __in uint8_t dev_addr, + __in uint8_t offset, + __in uint8_t len, + __out_bcount(len) uint8_t *data); #if EFSYS_OPT_PHY_STATS @@ -1004,7 +1010,7 @@ typedef enum efx_bist_type_e { EFX_BIST_TYPE_PHY_CABLE_SHORT, EFX_BIST_TYPE_PHY_CABLE_LONG, EFX_BIST_TYPE_MC_MEM, /* Test the MC DMEM and IMEM */ - EFX_BIST_TYPE_SAT_MEM, /* Test the DMEM and IMEM of satellite cpus*/ + EFX_BIST_TYPE_SAT_MEM, /* Test the DMEM and IMEM of satellite cpus */ EFX_BIST_TYPE_REG, /* Test the register memories */ EFX_BIST_TYPE_NTYPES, } efx_bist_type_t; @@ -1035,8 +1041,10 @@ typedef enum efx_bist_value_e { EFX_BIST_PHY_CABLE_STATUS_C, EFX_BIST_PHY_CABLE_STATUS_D, EFX_BIST_FAULT_CODE, - /* Memory BIST specific values. These match to the MC_CMD_BIST_POLL - * response. */ + /* + * Memory BIST specific values. These match to the MC_CMD_BIST_POLL + * response. + */ EFX_BIST_MEM_TEST, EFX_BIST_MEM_ADDR, EFX_BIST_MEM_BUS, @@ -1088,6 +1096,14 @@ efx_bist_stop( #define EFX_FEATURE_FW_ASSISTED_TSO_V2 0x00002000 #define EFX_FEATURE_PACKED_STREAM 0x00004000 +typedef enum efx_tunnel_protocol_e { + EFX_TUNNEL_PROTOCOL_NONE = 0, + EFX_TUNNEL_PROTOCOL_VXLAN, + EFX_TUNNEL_PROTOCOL_GENEVE, + EFX_TUNNEL_PROTOCOL_NVGRE, + EFX_TUNNEL_NPROTOS +} efx_tunnel_protocol_t; + typedef struct efx_nic_cfg_s { uint32_t enc_board_type; uint32_t enc_phy_type; @@ -1119,6 +1135,7 @@ typedef struct efx_nic_cfg_s { uint32_t enc_rx_prefix_size; uint32_t enc_rx_buf_align_start; uint32_t enc_rx_buf_align_end; + uint32_t enc_rx_scale_max_exclusive_contexts; #if EFSYS_OPT_LOOPBACK efx_qword_t enc_loopback_types[EFX_LINK_NMODES]; #endif /* EFSYS_OPT_LOOPBACK */ @@ -1187,6 +1204,7 @@ typedef struct efx_nic_cfg_s { boolean_t enc_rx_var_packed_stream_supported; boolean_t enc_pm_and_rxdp_counters; boolean_t enc_mac_stats_40g_tx_size_bins; + uint32_t enc_tunnel_encapsulations_supported; /* External port identifier */ uint8_t enc_external_port; uint32_t enc_mcdi_max_payload_length; @@ -1196,7 +1214,7 @@ typedef struct efx_nic_cfg_s { uint32_t enc_required_pcie_bandwidth_mbps; uint32_t enc_max_pcie_link_gen; /* Firmware verifies integrity of NVRAM updates */ - uint32_t enc_fw_verified_nvram_update_required; + uint32_t enc_nvram_update_verify_result_supported; } efx_nic_cfg_t; #define EFX_PCI_FUNCTION_IS_PF(_encp) ((_encp)->enc_vf == 0xffff) @@ -1211,6 +1229,24 @@ extern const efx_nic_cfg_t * efx_nic_cfg_get( __in efx_nic_t *enp); +typedef struct efx_nic_fw_info_s { + /* Basic FW version information */ + uint16_t enfi_mc_fw_version[4]; + /* + * If datapath capabilities can be detected, + * additional FW information is to be shown + */ + boolean_t enfi_dpcpu_fw_ids_valid; + /* Rx and Tx datapath CPU FW IDs */ + uint16_t enfi_rx_dpcpu_fw_id; + uint16_t enfi_tx_dpcpu_fw_id; +} efx_nic_fw_info_t; + +extern __checkReturn efx_rc_t +efx_nic_get_fw_version( + __in efx_nic_t *enp, + __out efx_nic_fw_info_t *enfip); + /* Driver resource limits (minimum required/maximum usable). */ typedef struct efx_drv_limits_s { uint32_t edl_min_evq_count; @@ -1353,6 +1389,7 @@ typedef enum efx_nvram_type_e { EFX_NVRAM_DYNAMIC_CFG, EFX_NVRAM_LICENSE, EFX_NVRAM_UEFIROM, + EFX_NVRAM_MUM_FIRMWARE, EFX_NVRAM_NTYPES, } efx_nvram_type_t; @@ -1383,7 +1420,8 @@ efx_nvram_rw_start( extern __checkReturn efx_rc_t efx_nvram_rw_finish( __in efx_nic_t *enp, - __in efx_nvram_type_t type); + __in efx_nvram_type_t type, + __out_opt uint32_t *verify_resultp); extern __checkReturn efx_rc_t efx_nvram_get_version( @@ -1400,6 +1438,14 @@ efx_nvram_read_chunk( __out_bcount(size) caddr_t data, __in size_t size); +extern __checkReturn efx_rc_t +efx_nvram_read_backup( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size); + extern __checkReturn efx_rc_t efx_nvram_set_version( __in efx_nic_t *enp, @@ -1593,7 +1639,7 @@ efx_ev_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, __in uint32_t us, __in uint32_t flags, @@ -1750,8 +1796,7 @@ typedef __checkReturn boolean_t typedef __checkReturn boolean_t (*efx_mac_stats_ev_t)( __in_opt void *arg, - __in uint32_t generation - ); + __in uint32_t generation); #endif /* EFSYS_OPT_MAC_STATS */ @@ -1855,6 +1900,9 @@ efx_rx_scatter_enable( __in unsigned int buf_size); #endif /* EFSYS_OPT_RX_SCATTER */ +/* Handle to represent use of the default RSS context. */ +#define EFX_RSS_CONTEXT_DEFAULT 0xffffffff + #if EFSYS_OPT_RX_SCALE typedef enum efx_rx_hash_alg_e { @@ -1874,30 +1922,44 @@ typedef enum efx_rx_hash_support_e { EFX_RX_HASH_AVAILABLE /* Insert hash with/without RSS */ } efx_rx_hash_support_t; +#define EFX_RSS_KEY_SIZE 40 /* RSS key size (bytes) */ #define EFX_RSS_TBL_SIZE 128 /* Rows in RX indirection table */ #define EFX_MAXRSS 64 /* RX indirection entry range */ #define EFX_MAXRSS_LEGACY 16 /* See bug16611 and bug17213 */ -typedef enum efx_rx_scale_support_e { - EFX_RX_SCALE_UNAVAILABLE = 0, /* Not supported */ +typedef enum efx_rx_scale_context_type_e { + EFX_RX_SCALE_UNAVAILABLE = 0, /* No RX scale context */ EFX_RX_SCALE_EXCLUSIVE, /* Writable key/indirection table */ EFX_RX_SCALE_SHARED /* Read-only key/indirection table */ -} efx_rx_scale_support_t; +} efx_rx_scale_context_type_t; extern __checkReturn efx_rc_t -efx_rx_hash_support_get( +efx_rx_hash_default_support_get( __in efx_nic_t *enp, __out efx_rx_hash_support_t *supportp); extern __checkReturn efx_rc_t -efx_rx_scale_support_get( +efx_rx_scale_default_support_get( __in efx_nic_t *enp, - __out efx_rx_scale_support_t *supportp); + __out efx_rx_scale_context_type_t *typep); + +extern __checkReturn efx_rc_t +efx_rx_scale_context_alloc( + __in efx_nic_t *enp, + __in efx_rx_scale_context_type_t type, + __in uint32_t num_queues, + __out uint32_t *rss_contextp); + +extern __checkReturn efx_rc_t +efx_rx_scale_context_free( + __in efx_nic_t *enp, + __in uint32_t rss_context); extern __checkReturn efx_rc_t efx_rx_scale_mode_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in efx_rx_hash_alg_t alg, __in efx_rx_hash_type_t type, __in boolean_t insert); @@ -1905,12 +1967,14 @@ efx_rx_scale_mode_set( extern __checkReturn efx_rc_t efx_rx_scale_tbl_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in_ecount(n) unsigned int *table, __in size_t n); extern __checkReturn efx_rc_t efx_rx_scale_key_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in_ecount(n) uint8_t *key, __in size_t n); @@ -1954,7 +2018,7 @@ efx_rx_qcreate( __in unsigned int label, __in efx_rxq_type_t type, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, __in efx_evq_t *eep, __deref_out efx_rxq_t **erpp); @@ -1969,14 +2033,14 @@ typedef struct efx_desc_s { efx_qword_t ed_eq; } efx_desc_t; -extern void +extern void efx_rx_qpost( - __in efx_rxq_t *erp, - __in_ecount(n) efsys_dma_addr_t *addrp, - __in size_t size, - __in unsigned int n, - __in unsigned int completed, - __in unsigned int added); + __in efx_rxq_t *erp, + __in_ecount(ndescs) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int ndescs, + __in unsigned int completed, + __in unsigned int added); extern void efx_rx_qpush( @@ -1986,14 +2050,8 @@ efx_rx_qpush( #if EFSYS_OPT_RX_PACKED_STREAM -/* - * Fake length for RXQ descriptors in packed stream mode - * to make hardware happy - */ -#define EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32 - extern void -efx_rx_qps_update_credits( +efx_rx_qpush_ps_credits( __in efx_rxq_t *erp); extern __checkReturn uint8_t * @@ -2049,13 +2107,14 @@ efx_tx_fini( #define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t)) #define EFX_TXQ_NBUFS(_ndescs) (EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE) #define EFX_TXQ_LIMIT(_ndescs) ((_ndescs) - 16) -#define EFX_TXQ_DC_NDESCS(_dcsize) (8 << _dcsize) #define EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */ -#define EFX_TXQ_CKSUM_IPV4 0x0001 -#define EFX_TXQ_CKSUM_TCPUDP 0x0002 -#define EFX_TXQ_FATSOV2 0x0004 +#define EFX_TXQ_CKSUM_IPV4 0x0001 +#define EFX_TXQ_CKSUM_TCPUDP 0x0002 +#define EFX_TXQ_FATSOV2 0x0004 +#define EFX_TXQ_CKSUM_INNER_IPV4 0x0008 +#define EFX_TXQ_CKSUM_INNER_TCPUDP 0x0010 extern __checkReturn efx_rc_t efx_tx_qcreate( @@ -2070,13 +2129,13 @@ efx_tx_qcreate( __deref_out efx_txq_t **etpp, __out unsigned int *addedp); -extern __checkReturn efx_rc_t +extern __checkReturn efx_rc_t efx_tx_qpost( - __in efx_txq_t *etp, - __in_ecount(n) efx_buffer_t *eb, - __in unsigned int n, - __in unsigned int completed, - __inout unsigned int *addedp); + __in efx_txq_t *etp, + __in_ecount(ndescs) efx_buffer_t *eb, + __in unsigned int ndescs, + __in unsigned int completed, + __inout unsigned int *addedp); extern __checkReturn efx_rc_t efx_tx_qpace( @@ -2196,6 +2255,7 @@ efx_tx_qdestroy( #define EFX_IPPROTO_TCP 6 #define EFX_IPPROTO_UDP 17 +#define EFX_IPPROTO_GRE 47 /* Use RSS to spread across multiple queues */ #define EFX_FILTER_FLAG_RX_RSS 0x01 @@ -2214,6 +2274,10 @@ efx_tx_qdestroy( typedef unsigned int efx_filter_flags_t; +/* + * Flags which specify the fields to match on. The values are the same as in the + * MC_CMD_FILTER_OP/MC_CMD_FILTER_OP_EXT commands. + */ typedef enum efx_filter_match_flags_e { EFX_FILTER_MATCH_REM_HOST = 0x0001, /* Match by remote IP host * address */ @@ -2228,6 +2292,10 @@ typedef enum efx_filter_match_flags_e { EFX_FILTER_MATCH_OUTER_VID = 0x0100, /* Match by outer VLAN ID */ EFX_FILTER_MATCH_IP_PROTO = 0x0200, /* Match by IP transport * protocol */ + /* For encapsulated packets, match all multicast inner frames */ + EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST = 0x01000000, + /* For encapsulated packets, match all unicast inner frames */ + EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST = 0x02000000, /* Match otherwise-unmatched multicast and broadcast packets */ EFX_FILTER_MATCH_UNKNOWN_MCAST_DST = 0x40000000, /* Match otherwise-unmatched unicast packets */ @@ -2253,26 +2321,26 @@ typedef enum efx_filter_priority_s { */ typedef struct efx_filter_spec_s { - uint32_t efs_match_flags; - uint32_t efs_priority:2; - uint32_t efs_flags:6; - uint32_t efs_dmaq_id:12; - uint32_t efs_rss_context; - uint16_t efs_outer_vid; - uint16_t efs_inner_vid; - uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN]; - uint8_t efs_rem_mac[EFX_MAC_ADDR_LEN]; - uint16_t efs_ether_type; - uint8_t efs_ip_proto; - uint16_t efs_loc_port; - uint16_t efs_rem_port; - efx_oword_t efs_rem_host; - efx_oword_t efs_loc_host; + uint32_t efs_match_flags; + uint32_t efs_priority:2; + uint32_t efs_flags:6; + uint32_t efs_dmaq_id:12; + uint32_t efs_rss_context; + uint16_t efs_outer_vid; + uint16_t efs_inner_vid; + uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN]; + uint8_t efs_rem_mac[EFX_MAC_ADDR_LEN]; + uint16_t efs_ether_type; + uint8_t efs_ip_proto; + efx_tunnel_protocol_t efs_encap_type; + uint16_t efs_loc_port; + uint16_t efs_rem_port; + efx_oword_t efs_rem_host; + efx_oword_t efs_loc_host; } efx_filter_spec_t; /* Default values for use in filter specifications */ -#define EFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT 0xffffffff #define EFX_FILTER_SPEC_RX_DMAQ_ID_DROP 0xfff #define EFX_FILTER_SPEC_VID_UNSPEC 0xffff @@ -2300,9 +2368,10 @@ efx_filter_restore( extern __checkReturn efx_rc_t efx_filter_supported_filters( - __in efx_nic_t *enp, - __out uint32_t *list, - __out size_t *length); + __in efx_nic_t *enp, + __out_ecount(buffer_length) uint32_t *buffer, + __in size_t buffer_length, + __out size_t *list_lengthp); extern void efx_filter_spec_init_rx( @@ -2338,6 +2407,11 @@ efx_filter_spec_set_eth_local( __in uint16_t vid, __in const uint8_t *addr); +extern void +efx_filter_spec_set_ether_type( + __inout efx_filter_spec_t *spec, + __in uint16_t ether_type); + extern __checkReturn efx_rc_t efx_filter_spec_set_uc_def( __inout efx_filter_spec_t *spec); @@ -2346,6 +2420,24 @@ extern __checkReturn efx_rc_t efx_filter_spec_set_mc_def( __inout efx_filter_spec_t *spec); +typedef enum efx_filter_inner_frame_match_e { + EFX_FILTER_INNER_FRAME_MATCH_OTHER = 0, + EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_MCAST_DST, + EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_UCAST_DST +} efx_filter_inner_frame_match_t; + +extern __checkReturn efx_rc_t +efx_filter_spec_set_encap_type( + __inout efx_filter_spec_t *spec, + __in efx_tunnel_protocol_t encap_type, + __in efx_filter_inner_frame_match_t inner_frame_match); + +#if EFSYS_OPT_RX_SCALE +extern __checkReturn efx_rc_t +efx_filter_spec_set_rss_context( + __inout efx_filter_spec_t *spec, + __in uint32_t rss_context); +#endif #endif /* EFSYS_OPT_FILTER */ /* HASH */ @@ -2420,8 +2512,7 @@ efx_lic_find_start( __in_bcount(buffer_size) caddr_t bufferp, __in size_t buffer_size, - __out uint32_t *startp - ); + __out uint32_t *startp); extern __checkReturn efx_rc_t efx_lic_find_end( @@ -2430,8 +2521,7 @@ efx_lic_find_end( caddr_t bufferp, __in size_t buffer_size, __in uint32_t offset, - __out uint32_t *endp - ); + __out uint32_t *endp); extern __checkReturn __success(return != B_FALSE) boolean_t efx_lic_find_key( @@ -2441,15 +2531,13 @@ efx_lic_find_key( __in size_t buffer_size, __in uint32_t offset, __out uint32_t *startp, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn __success(return != B_FALSE) boolean_t efx_lic_validate_key( __in efx_nic_t *enp, __in_bcount(length) caddr_t keyp, - __in uint32_t length - ); + __in uint32_t length); extern __checkReturn efx_rc_t efx_lic_read_key( @@ -2462,8 +2550,7 @@ efx_lic_read_key( __out_bcount_part(key_max_size, *lengthp) caddr_t keyp, __in size_t key_max_size, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn efx_rc_t efx_lic_write_key( @@ -2474,8 +2561,7 @@ efx_lic_write_key( __in uint32_t offset, __in_bcount(length) caddr_t keyp, __in uint32_t length, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); __checkReturn efx_rc_t efx_lic_delete_key( @@ -2486,24 +2572,21 @@ efx_lic_delete_key( __in uint32_t offset, __in uint32_t length, __in uint32_t end, - __out uint32_t *deltap - ); + __out uint32_t *deltap); extern __checkReturn efx_rc_t efx_lic_create_partition( __in efx_nic_t *enp, __in_bcount(buffer_size) caddr_t bufferp, - __in size_t buffer_size - ); + __in size_t buffer_size); extern __checkReturn efx_rc_t efx_lic_finish_partition( __in efx_nic_t *enp, __in_bcount(buffer_size) caddr_t bufferp, - __in size_t buffer_size - ); + __in size_t buffer_size); #endif /* EFSYS_OPT_LICENSING */