X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fbase%2Fmedford_nic.c;h=6dc895f5b774bec1901f2ad87f881f8aef12801a;hb=c6034a20d9e221dc6125db57e4378520af3a515d;hp=daa1478ce8343a32b77d1ad74a0236ea0e2ed495;hpb=01a22b15b4cbcc65552ff5ba88ea2d8905bbb7ab;p=dpdk.git diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c index daa1478ce8..6dc895f5b7 100644 --- a/drivers/net/sfc/base/medford_nic.c +++ b/drivers/net/sfc/base/medford_nic.c @@ -47,27 +47,11 @@ medford_board_cfg( __in efx_nic_t *enp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - uint32_t mask; uint32_t sysclk, dpcpu_clk; uint32_t end_padding; uint32_t bandwidth; efx_rc_t rc; - /* - * FIXME: Likely to be incomplete and incorrect. - * Parts of this should be shared with Huntington. - */ - - /* Medford has a fixed 8Kbyte VI window size */ - EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP == 8192); - - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8192); - encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; - /* * Enable firmware workarounds for hardware errata. * Expected responses are: @@ -147,16 +131,6 @@ medford_board_cfg( encp->enc_piobuf_size = MEDFORD_PIOBUF_SIZE; encp->enc_piobuf_min_alloc_size = MEDFORD_MIN_PIO_ALLOC_SIZE; - /* - * Get the current privilege mask. Note that this may be modified - * dynamically, so this value is informational only. DO NOT use - * the privilege mask to check for sufficient privileges, as that - * can result in time-of-check/time-of-use bugs. - */ - if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0) - goto fail4; - encp->enc_privilege_mask = mask; - /* * Medford stores a single global copy of VPD, not per-PF as on * Huntington. @@ -165,14 +139,12 @@ medford_board_cfg( rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth); if (rc != 0) - goto fail5; + goto fail4; encp->enc_required_pcie_bandwidth_mbps = bandwidth; encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3; return (0); -fail5: - EFSYS_PROBE(fail5); fail4: EFSYS_PROBE(fail4); fail3: