X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fbase%2Fsiena_nic.c;h=bd5e8ceb8ab499651ec8f35a82aae193a9307381;hb=d789705873d47d70a3ba0a6a4dfb83fb629d3464;hp=fca17171bdce8c29e3557ddd1c464bcc5e133b9b;hpb=161c9ab395d5984967c33446f2d699c68bc9dd29;p=dpdk.git

diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index fca17171bd..bd5e8ceb8a 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright (c) 2009-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2009-2019 Solarflare Communications Inc.
  */
 
 #include "efx.h"
@@ -104,6 +104,10 @@ siena_board_cfg(
 	encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
 		FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
 
+	encp->enc_ev_desc_size = SIENA_EVQ_DESC_SIZE;
+	encp->enc_rx_desc_size = SIENA_RXQ_DESC_SIZE;
+	encp->enc_tx_desc_size = SIENA_TXQ_DESC_SIZE;
+
 	/* When hash header insertion is enabled, Siena inserts 16 bytes */
 	encp->enc_rx_prefix_size = 16;
 
@@ -149,7 +153,14 @@ siena_board_cfg(
 	encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq);
 	encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq);
 
-	encp->enc_txq_max_ndescs = 4096;
+	encp->enc_evq_max_nevs = SIENA_EVQ_MAXNEVS;
+	encp->enc_evq_min_nevs = SIENA_EVQ_MINNEVS;
+
+	encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
+	encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
+
+	encp->enc_txq_max_ndescs = SIENA_TXQ_MAXNDESCS;
+	encp->enc_txq_min_ndescs = SIENA_TXQ_MINNDESCS;
 
 	encp->enc_buftbl_limit = SIENA_SRAM_ROWS -
 	    (encp->enc_txq_limit * EFX_TXQ_DC_NDESCS(EFX_TXQ_DC_SIZE)) -