X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fefsys.h;h=0405d02bb275366aced57538880ffd4dc2ab3180;hb=c0802544d9e35042fe93f43fa4970e76011942eb;hp=0f941e61068c92cdc91b305398dc43223177b4a7;hpb=7b9891769f4b5396bbf8cb6d1f4cc5d7ac8f1c7a;p=dpdk.git

diff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h
index 0f941e6106..0405d02bb2 100644
--- a/drivers/net/sfc/efsys.h
+++ b/drivers/net/sfc/efsys.h
@@ -1,5 +1,7 @@
 /*-
- * Copyright (c) 2016 Solarflare Communications Inc.
+ *   BSD LICENSE
+ *
+ * Copyright (c) 2016-2017 Solarflare Communications Inc.
  * All rights reserved.
  *
  * This software was jointly developed between OKTET Labs (under contract
@@ -43,6 +45,7 @@
 #include <rte_common.h>
 #include <rte_malloc.h>
 #include <rte_log.h>
+#include <rte_io.h>
 
 #include "sfc_debug.h"
 
@@ -176,7 +179,7 @@ prefetch_read_once(const volatile void *addr)
 /* MCDI is required for SFN7xxx and SFN8xx */
 #define EFSYS_OPT_MCDI 1
 #define EFSYS_OPT_MCDI_LOGGING 1
-#define EFSYS_OPT_MCDI_PROXY_AUTH 0
+#define EFSYS_OPT_MCDI_PROXY_AUTH 1
 
 #define EFSYS_OPT_MAC_STATS 1
 
@@ -195,7 +198,7 @@ prefetch_read_once(const volatile void *addr)
 #define EFSYS_OPT_BOOTCFG 0
 
 #define EFSYS_OPT_DIAG 0
-#define EFSYS_OPT_RX_SCALE 0
+#define EFSYS_OPT_RX_SCALE 1
 #define EFSYS_OPT_QSTATS 0
 /* Filters support is required for SFN7xxx and SFN8xx */
 #define EFSYS_OPT_FILTER 1
@@ -440,7 +443,7 @@ typedef struct efsys_bar_s {
 									\
 		_addr = (volatile uint32_t *)(_base + (_offset));	\
 		rte_rmb();						\
-		(_edp)->ed_u32[0] = _addr[0];				\
+		(_edp)->ed_u32[0] = rte_read32_relaxed(_addr);		\
 									\
 		EFSYS_PROBE2(bar_readd, unsigned int, (_offset),	\
 					 uint32_t, (_edp)->ed_u32[0]);	\
@@ -463,7 +466,7 @@ typedef struct efsys_bar_s {
 									\
 		_addr = (volatile uint64_t *)(_base + (_offset));	\
 		rte_rmb();						\
-		(_eqp)->eq_u64[0] = _addr[0];				\
+		(_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);		\
 									\
 		EFSYS_PROBE3(bar_readq, unsigned int, (_offset),	\
 					 uint32_t, (_eqp)->eq_u32[1],	\
@@ -487,6 +490,7 @@ typedef struct efsys_bar_s {
 									\
 		_addr = (volatile __m128i *)(_base + (_offset));	\
 		rte_rmb();						\
+		/* There is no rte_read128_relaxed() yet */		\
 		(_eop)->eo_u128[0] = _addr[0];				\
 									\
 		EFSYS_PROBE5(bar_reado, unsigned int, (_offset),	\
@@ -518,7 +522,7 @@ typedef struct efsys_bar_s {
 					 uint32_t, (_edp)->ed_u32[0]);	\
 									\
 		_addr = (volatile uint32_t *)(_base + (_offset));	\
-		_addr[0] = (_edp)->ed_u32[0];				\
+		rte_write32_relaxed((_edp)->ed_u32[0], _addr);		\
 		rte_wmb();						\
 									\
 		_NOTE(CONSTANTCONDITION);				\
@@ -542,7 +546,7 @@ typedef struct efsys_bar_s {
 					 uint32_t, (_eqp)->eq_u32[0]);	\
 									\
 		_addr = (volatile uint64_t *)(_base + (_offset));	\
-		_addr[0] = (_eqp)->eq_u64[0];				\
+		rte_write64_relaxed((_eqp)->eq_u64[0], _addr);		\
 		rte_wmb();						\
 									\
 		SFC_BAR_UNLOCK(_esbp);					\
@@ -580,6 +584,7 @@ typedef struct efsys_bar_s {
 					 uint32_t, (_eop)->eo_u32[0]);	\
 									\
 		_addr = (volatile __m128i *)(_base + (_offset));	\
+		/* There is no rte_write128_relaxed() yet */		\
 		_addr[0] = (_eop)->eo_u128[0];				\
 		rte_wmb();						\
 									\
@@ -609,7 +614,7 @@ typedef struct efsys_bar_s {
 /* BARRIERS */
 
 #define EFSYS_MEM_READ_BARRIER()	rte_rmb()
-#define EFSYS_PIO_WRITE_BARRIER()	rte_wmb()
+#define EFSYS_PIO_WRITE_BARRIER()	rte_io_wmb()
 
 /* DMA SYNC */
 
@@ -620,7 +625,9 @@ typedef struct efsys_bar_s {
  */
 
 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)	((void)0)
-#define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)	((void)0)
+
+/* Just avoid store and compiler (impliciltly) reordering */
+#define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)	rte_wmb()
 
 /* TIMESTAMP */