X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_dp.h;h=7fd8f34b0f281d7b6d8c814aa289268f42c795e9;hb=f1893715ce88c405b99860043468466b2e89ca02;hp=b142532d9096ae8dab62aef96477688554f57cb9;hpb=44c0947bae498735c551e3bee563926602e54e64;p=dpdk.git diff --git a/drivers/net/sfc/sfc_dp.h b/drivers/net/sfc/sfc_dp.h index b142532d90..7fd8f34b0f 100644 --- a/drivers/net/sfc/sfc_dp.h +++ b/drivers/net/sfc/sfc_dp.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright (c) 2017-2018 Solarflare Communications Inc. - * All rights reserved. + * Copyright(c) 2019-2021 Xilinx, Inc. + * Copyright(c) 2017-2019 Solarflare Communications Inc. * * This software was jointly developed between OKTET Labs (under contract * for Solarflare) and Solarflare Communications, Inc. @@ -15,6 +15,8 @@ #include +#include "sfc_log.h" + #ifdef __cplusplus extern "C" { #endif @@ -40,6 +42,16 @@ enum sfc_dp_type { /** Datapath queue run-time information */ struct sfc_dp_queue { + /* + * Typically the structure is located at the end of Rx/Tx queue + * data structure and not used on datapath. So, it is not a + * problem to have extra fields even if not used. However, + * put stats at top of the structure to be closer to fields + * used on datapath or reap to have more chances to be cache-hot. + */ + uint32_t rx_dbells; + uint32_t tx_dbells; + uint16_t port_id; uint16_t queue_id; struct rte_pci_addr pci_addr; @@ -49,6 +61,11 @@ void sfc_dp_queue_init(struct sfc_dp_queue *dpq, uint16_t port_id, uint16_t queue_id, const struct rte_pci_addr *pci_addr); +/* Maximum datapath log level to be included in build. */ +#ifndef SFC_DP_LOG_LEVEL +#define SFC_DP_LOG_LEVEL RTE_LOG_NOTICE +#endif + /* * Helper macro to define datapath logging macros and have uniform * logging. @@ -58,10 +75,12 @@ void sfc_dp_queue_init(struct sfc_dp_queue *dpq, const struct sfc_dp_queue *_dpq = (dpq); \ const struct rte_pci_addr *_addr = &(_dpq)->pci_addr; \ \ - RTE_LOG(level, PMD, \ + if (RTE_LOG_ ## level > SFC_DP_LOG_LEVEL) \ + break; \ + SFC_GENERIC_LOG(level, \ RTE_FMT("%s " PCI_PRI_FMT \ " #%" PRIu16 ".%" PRIu16 ": " \ - RTE_FMT_HEAD(__VA_ARGS__,) "\n", \ + RTE_FMT_HEAD(__VA_ARGS__ ,), \ dp_name, \ _addr->domain, _addr->bus, \ _addr->devid, _addr->function, \ @@ -77,12 +96,22 @@ struct sfc_dp { enum sfc_dp_type type; /* Mask of required hardware/firmware capabilities */ unsigned int hw_fw_caps; -#define SFC_DP_HW_FW_CAP_EF10 0x1 +#define SFC_DP_HW_FW_CAP_EF10 0x1 +#define SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER 0x2 +#define SFC_DP_HW_FW_CAP_RX_EFX 0x4 +#define SFC_DP_HW_FW_CAP_TX_EFX 0x8 +#define SFC_DP_HW_FW_CAP_EF100 0x10 }; /** List of datapath variants */ TAILQ_HEAD(sfc_dp_list, sfc_dp); +typedef unsigned int sfc_sw_index_t; +#define SFC_SW_INDEX_INVALID ((sfc_sw_index_t)(UINT_MAX)) + +typedef int32_t sfc_ethdev_qid_t; +#define SFC_ETHDEV_QID_INVALID ((sfc_ethdev_qid_t)(-1)) + /* Check if available HW/FW capabilities are sufficient for the datapath */ static inline bool sfc_dp_match_hw_fw_caps(const struct sfc_dp *dp, unsigned int avail_caps)