X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_dp_rx.h;h=2101fd7547540164d51cf24438b64771cf3f7949;hb=6cf2f95d4dfbae8c8b4ea31ec899e750dcbc62bb;hp=cb745e602475e2e7d379230fc51f8520002b7cac;hpb=08d23c67edfb1b9f1bff6aa24e9d1d6f710ade09;p=dpdk.git diff --git a/drivers/net/sfc/sfc_dp_rx.h b/drivers/net/sfc/sfc_dp_rx.h index cb745e6024..2101fd7547 100644 --- a/drivers/net/sfc/sfc_dp_rx.h +++ b/drivers/net/sfc/sfc_dp_rx.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright (c) 2017-2018 Solarflare Communications Inc. - * All rights reserved. + * Copyright(c) 2019-2020 Xilinx, Inc. + * Copyright(c) 2017-2019 Solarflare Communications Inc. * * This software was jointly developed between OKTET Labs (under contract * for Solarflare) and Solarflare Communications, Inc. @@ -28,6 +28,14 @@ struct sfc_dp_rxq { struct sfc_dp_queue dpq; }; +/** Datapath receive queue descriptor number limitations */ +struct sfc_dp_rx_hw_limits { + unsigned int rxq_max_entries; + unsigned int rxq_min_entries; + unsigned int evq_max_entries; + unsigned int evq_min_entries; +}; + /** * Datapath receive queue creation information. * @@ -66,6 +74,8 @@ struct sfc_dp_rx_qcreate_info { /** DMA-mapped Rx descriptors ring */ void *rxq_hw_ring; + /** Event queue index in hardware */ + unsigned int evq_hw_index; /** Associated event queue size */ unsigned int evq_entries; /** Hardware event ring */ @@ -114,6 +124,7 @@ typedef int (sfc_dp_rx_pool_ops_supported_t)(const char *pool); * @return 0 or positive errno. */ typedef int (sfc_dp_rx_qsize_up_rings_t)(uint16_t nb_rx_desc, + struct sfc_dp_rx_hw_limits *limits, struct rte_mempool *mb_pool, unsigned int *rxq_entries, unsigned int *evq_entries, @@ -184,15 +195,31 @@ typedef unsigned int (sfc_dp_rx_qdesc_npending_t)(struct sfc_dp_rxq *dp_rxq); /** Check Rx descriptor status */ typedef int (sfc_dp_rx_qdesc_status_t)(struct sfc_dp_rxq *dp_rxq, uint16_t offset); +/** Enable Rx interrupts */ +typedef int (sfc_dp_rx_intr_enable_t)(struct sfc_dp_rxq *dp_rxq); + +/** Disable Rx interrupts */ +typedef int (sfc_dp_rx_intr_disable_t)(struct sfc_dp_rxq *dp_rxq); /** Receive datapath definition */ struct sfc_dp_rx { struct sfc_dp dp; unsigned int features; -#define SFC_DP_RX_FEAT_SCATTER 0x1 -#define SFC_DP_RX_FEAT_MULTI_PROCESS 0x2 -#define SFC_DP_RX_FEAT_TUNNELS 0x4 +#define SFC_DP_RX_FEAT_MULTI_PROCESS 0x1 +#define SFC_DP_RX_FEAT_FLOW_FLAG 0x2 +#define SFC_DP_RX_FEAT_FLOW_MARK 0x4 +#define SFC_DP_RX_FEAT_INTR 0x8 + /** + * Rx offload capabilities supported by the datapath on device + * level only if HW/FW supports it. + */ + uint64_t dev_offload_capa; + /** + * Rx offload capabilities supported by the datapath per-queue + * if HW/FW supports it. + */ + uint64_t queue_offload_capa; sfc_dp_rx_get_dev_info_t *get_dev_info; sfc_dp_rx_pool_ops_supported_t *pool_ops_supported; sfc_dp_rx_qsize_up_rings_t *qsize_up_rings; @@ -206,6 +233,8 @@ struct sfc_dp_rx { sfc_dp_rx_supported_ptypes_get_t *supported_ptypes_get; sfc_dp_rx_qdesc_npending_t *qdesc_npending; sfc_dp_rx_qdesc_status_t *qdesc_status; + sfc_dp_rx_intr_enable_t *intr_enable; + sfc_dp_rx_intr_disable_t *intr_disable; eth_rx_burst_t pkt_burst; }; @@ -225,6 +254,15 @@ sfc_dp_find_rx_by_caps(struct sfc_dp_list *head, unsigned int avail_caps) return (p == NULL) ? NULL : container_of(p, struct sfc_dp_rx, dp); } +static inline uint64_t +sfc_dp_rx_offload_capa(const struct sfc_dp_rx *dp_rx) +{ + return dp_rx->dev_offload_capa | dp_rx->queue_offload_capa; +} + +/** Get Rx datapath ops by the datapath RxQ handle */ +const struct sfc_dp_rx *sfc_dp_rx_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq); + extern struct sfc_dp_rx sfc_efx_rx; extern struct sfc_dp_rx sfc_ef10_rx; extern struct sfc_dp_rx sfc_ef10_essb_rx;