X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_ef10_rx.c;h=a43554a1356b6e769acdd8fa0b1e98424306b65c;hb=57ddbf7edd9c5041603e224fbbb62c11ce423135;hp=f2fc6e70a18ebe48e08172895a2e23c0e74f7b00;hpb=1245e3fabca3634034db14a80734e47e4f3b28b1;p=dpdk.git diff --git a/drivers/net/sfc/sfc_ef10_rx.c b/drivers/net/sfc/sfc_ef10_rx.c index f2fc6e70a1..a43554a135 100644 --- a/drivers/net/sfc/sfc_ef10_rx.c +++ b/drivers/net/sfc/sfc_ef10_rx.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright (c) 2016-2018 Solarflare Communications Inc. - * All rights reserved. + * Copyright(c) 2019-2020 Xilinx, Inc. + * Copyright(c) 2016-2019 Solarflare Communications Inc. * * This software was jointly developed between OKTET Labs (under contract * for Solarflare) and Solarflare Communications, Inc. @@ -21,6 +21,7 @@ #include "efx_regs.h" #include "efx_regs_ef10.h" +#include "sfc_debug.h" #include "sfc_tweak.h" #include "sfc_dp_rx.h" #include "sfc_kvargs.h" @@ -32,6 +33,9 @@ #define sfc_ef10_rx_err(dpq, ...) \ SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, ERR, dpq, __VA_ARGS__) +#define sfc_ef10_rx_info(dpq, ...) \ + SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, INFO, dpq, __VA_ARGS__) + /** * Maximum number of descriptors/buffers in the Rx ring. * It should guarantee that corresponding event queue never overfill. @@ -219,6 +223,18 @@ sfc_ef10_rx_pending(struct sfc_ef10_rxq *rxq, struct rte_mbuf **rx_pkts, return rx_pkts; } +/* + * Below Rx pseudo-header (aka Rx prefix) accessors rely on the + * following fields layout. + */ +static const efx_rx_prefix_layout_t sfc_ef10_rx_prefix_layout = { + .erpl_fields = { + [EFX_RX_PREFIX_FIELD_RSS_HASH] = + { 0, sizeof(uint32_t) * CHAR_BIT, B_FALSE }, + [EFX_RX_PREFIX_FIELD_LENGTH] = + { 8 * CHAR_BIT, sizeof(uint16_t) * CHAR_BIT, B_FALSE }, + } +}; static uint16_t sfc_ef10_rx_pseudo_hdr_get_len(const uint8_t *pseudo_hdr) { @@ -671,6 +687,8 @@ sfc_ef10_rx_qcreate(uint16_t port_id, uint16_t queue_id, ER_DZ_EVQ_RPTR_REG_OFST + (info->evq_hw_index << info->vi_window_shift); + sfc_ef10_rx_info(&rxq->dp.dpq, "RxQ doorbell is %p", rxq->doorbell); + *dp_rxqp = &rxq->dp; return 0; @@ -694,7 +712,8 @@ sfc_ef10_rx_qdestroy(struct sfc_dp_rxq *dp_rxq) static sfc_dp_rx_qstart_t sfc_ef10_rx_qstart; static int -sfc_ef10_rx_qstart(struct sfc_dp_rxq *dp_rxq, unsigned int evq_read_ptr) +sfc_ef10_rx_qstart(struct sfc_dp_rxq *dp_rxq, unsigned int evq_read_ptr, + const efx_rx_prefix_layout_t *pinfo) { struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq); @@ -702,6 +721,10 @@ sfc_ef10_rx_qstart(struct sfc_dp_rxq *dp_rxq, unsigned int evq_read_ptr) SFC_ASSERT(rxq->pending == 0); SFC_ASSERT(rxq->added == 0); + if (pinfo->erpl_length != rxq->prefix_size || + efx_rx_prefix_layout_check(pinfo, &sfc_ef10_rx_prefix_layout) != 0) + return ENOTSUP; + sfc_ef10_rx_qrefill(rxq); rxq->evq_read_ptr = evq_read_ptr; @@ -796,7 +819,8 @@ struct sfc_dp_rx sfc_ef10_rx = { .features = SFC_DP_RX_FEAT_MULTI_PROCESS | SFC_DP_RX_FEAT_INTR, .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM | - DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM, + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_RX_OFFLOAD_RSS_HASH, .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER, .get_dev_info = sfc_ef10_rx_get_dev_info, .qsize_up_rings = sfc_ef10_rx_qsize_up_rings,