X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_ethdev.c;h=52ba7b67b052762becffc82ad5c77aa55b621b7e;hb=31d7c6f7d424c533b0a4dd9b4408b814ac7852f1;hp=6e6eb16860c7cbb9df78318dd9fe115a0ded2a52;hpb=30410493759f4bae3f65497737661e27b93c2d0e;p=dpdk.git diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c index 6e6eb16860..52ba7b67b0 100644 --- a/drivers/net/sfc/sfc_ethdev.c +++ b/drivers/net/sfc/sfc_ethdev.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright(c) 2019-2020 Xilinx, Inc. + * Copyright(c) 2019-2021 Xilinx, Inc. * Copyright(c) 2016-2019 Solarflare Communications Inc. * * This software was jointly developed between OKTET Labs (under contract @@ -8,8 +8,8 @@ */ #include -#include -#include +#include +#include #include #include #include @@ -93,6 +93,7 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); struct sfc_rss *rss = &sas->rss; + struct sfc_mae *mae = &sa->mae; uint64_t txq_offloads_def = 0; sfc_log_init(sa, "entry"); @@ -102,6 +103,8 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; + dev_info->max_vfs = sa->sriov.num_vfs; + /* Autonegotiation may be disabled */ dev_info->speed_capa = ETH_LINK_SPEED_FIXED; if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) @@ -185,6 +188,12 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; + if (mae->status == SFC_MAE_STATUS_SUPPORTED) { + dev_info->switch_info.name = dev->device->driver->name; + dev_info->switch_info.domain_id = mae->switch_domain_id; + dev_info->switch_info.port_id = mae->switch_port_id; + } + return 0; } @@ -274,7 +283,7 @@ sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) return ret; } -static void +static int sfc_dev_stop(struct rte_eth_dev *dev) { struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); @@ -286,6 +295,8 @@ sfc_dev_stop(struct rte_eth_dev *dev) sfc_adapter_unlock(sa); sfc_log_init(sa, "done"); + + return 0; } static int @@ -322,11 +333,7 @@ static void sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) { free(dev->process_private); - dev->process_private = NULL; - dev->dev_ops = NULL; - dev->tx_pkt_prepare = NULL; - dev->tx_pkt_burst = NULL; - dev->rx_pkt_burst = NULL; + rte_eth_dev_release_port(dev); } static int @@ -378,7 +385,6 @@ sfc_dev_close(struct rte_eth_dev *dev) /* Required for logging, so cleanup last */ sa->eth_dev = NULL; - dev->process_private = NULL; free(sa); return 0; @@ -634,10 +640,19 @@ sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; + + /* CRC is included in these stats, but shouldn't be */ + stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; + stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; } else { stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; + + /* CRC is included in these stats, but shouldn't be */ + stats->ibytes -= mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; + stats->obytes -= mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; + /* * Take into account stats which are whenever supported * on EF10. If some stat is not supported by current @@ -952,7 +967,8 @@ sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, encp->enc_rx_prefix_size, - scatter_enabled, &error)) { + scatter_enabled, + encp->enc_rx_scatter_max, &error)) { sfc_err(sa, "MTU check for RxQ %u failed: %s", i, error); return EINVAL; @@ -1010,7 +1026,7 @@ sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) * The driver does not use it, but other PMDs update jumbo frame * flag and max_rx_pkt_len when MTU is set. */ - if (mtu > RTE_ETHER_MAX_LEN) { + if (mtu > RTE_ETHER_MTU) { struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; } @@ -1544,8 +1560,15 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev, struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; unsigned int efx_hash_types; + uint32_t contexts[] = {EFX_RSS_CONTEXT_DEFAULT, rss->dummy_rss_context}; + unsigned int n_contexts; + unsigned int mode_i = 0; + unsigned int key_i = 0; + unsigned int i = 0; int rc = 0; + n_contexts = rss->dummy_rss_context == EFX_RSS_CONTEXT_DEFAULT ? 1 : 2; + if (sfc_sa2shared(sa)->isolated) return -ENOTSUP; @@ -1572,19 +1595,24 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev, if (rc != 0) goto fail_rx_hf_rte_to_efx; - rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, - rss->hash_alg, efx_hash_types, B_TRUE); - if (rc != 0) - goto fail_scale_mode_set; + for (mode_i = 0; mode_i < n_contexts; mode_i++) { + rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], + rss->hash_alg, efx_hash_types, + B_TRUE); + if (rc != 0) + goto fail_scale_mode_set; + } if (rss_conf->rss_key != NULL) { if (sa->state == SFC_ADAPTER_STARTED) { - rc = efx_rx_scale_key_set(sa->nic, - EFX_RSS_CONTEXT_DEFAULT, - rss_conf->rss_key, - sizeof(rss->key)); - if (rc != 0) - goto fail_scale_key_set; + for (key_i = 0; key_i < n_contexts; key_i++) { + rc = efx_rx_scale_key_set(sa->nic, + contexts[key_i], + rss_conf->rss_key, + sizeof(rss->key)); + if (rc != 0) + goto fail_scale_key_set; + } } rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); @@ -1597,12 +1625,20 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev, return 0; fail_scale_key_set: - if (efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, - EFX_RX_HASHALG_TOEPLITZ, - rss->hash_types, B_TRUE) != 0) - sfc_err(sa, "failed to restore RSS mode"); + for (i = 0; i < key_i; i++) { + if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, + sizeof(rss->key)) != 0) + sfc_err(sa, "failed to restore RSS key"); + } fail_scale_mode_set: + for (i = 0; i < mode_i; i++) { + if (efx_rx_scale_mode_set(sa->nic, contexts[i], + EFX_RX_HASHALG_TOEPLITZ, + rss->hash_types, B_TRUE) != 0) + sfc_err(sa, "failed to restore RSS mode"); + } + fail_rx_hf_rte_to_efx: sfc_adapter_unlock(sa); return -rc; @@ -1715,59 +1751,11 @@ bad_reta_entry: } static int -sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, - enum rte_filter_op filter_op, - void *arg) +sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, + const struct rte_flow_ops **ops) { - struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); - int rc = ENOTSUP; - - sfc_log_init(sa, "entry"); - - switch (filter_type) { - case RTE_ETH_FILTER_NONE: - sfc_err(sa, "Global filters configuration not supported"); - break; - case RTE_ETH_FILTER_MACVLAN: - sfc_err(sa, "MACVLAN filters not supported"); - break; - case RTE_ETH_FILTER_ETHERTYPE: - sfc_err(sa, "EtherType filters not supported"); - break; - case RTE_ETH_FILTER_FLEXIBLE: - sfc_err(sa, "Flexible filters not supported"); - break; - case RTE_ETH_FILTER_SYN: - sfc_err(sa, "SYN filters not supported"); - break; - case RTE_ETH_FILTER_NTUPLE: - sfc_err(sa, "NTUPLE filters not supported"); - break; - case RTE_ETH_FILTER_TUNNEL: - sfc_err(sa, "Tunnel filters not supported"); - break; - case RTE_ETH_FILTER_FDIR: - sfc_err(sa, "Flow Director filters not supported"); - break; - case RTE_ETH_FILTER_HASH: - sfc_err(sa, "Hash filters not supported"); - break; - case RTE_ETH_FILTER_GENERIC: - if (filter_op != RTE_ETH_FILTER_GET) { - rc = EINVAL; - } else { - *(const void **)arg = &sfc_flow_ops; - rc = 0; - } - break; - default: - sfc_err(sa, "Unknown filter type %u", filter_type); - break; - } - - sfc_log_init(sa, "exit: %d", -rc); - SFC_ASSERT(rc >= 0); - return -rc; + *ops = &sfc_flow_ops; + return 0; } static int @@ -1850,7 +1838,7 @@ static const struct eth_dev_ops sfc_eth_dev_ops = { .reta_query = sfc_dev_rss_reta_query, .rss_hash_update = sfc_dev_rss_hash_update, .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, - .filter_ctrl = sfc_dev_filter_ctrl, + .flow_ops_get = sfc_dev_flow_ops_get, .set_mc_addr_list = sfc_set_mc_addr_list, .rxq_info_get = sfc_rx_queue_info_get, .txq_info_get = sfc_tx_queue_info_get, @@ -1901,6 +1889,11 @@ sfc_eth_dev_set_ops(struct rte_eth_dev *dev) case EFX_FAMILY_MEDFORD: case EFX_FAMILY_MEDFORD2: avail_caps |= SFC_DP_HW_FW_CAP_EF10; + avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; + avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; + break; + case EFX_FAMILY_RIVERHEAD: + avail_caps |= SFC_DP_HW_FW_CAP_EF100; break; default: break; @@ -2123,10 +2116,12 @@ sfc_register_dp(void) /* Register once */ if (TAILQ_EMPTY(&sfc_dp_head)) { /* Prefer EF10 datapath */ + sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); + sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); @@ -2145,6 +2140,13 @@ sfc_eth_dev_init(struct rte_eth_dev *dev) const struct rte_ether_addr *from; int ret; + if (sfc_efx_dev_class_get(pci_dev->device.devargs) != + SFC_EFX_DEV_CLASS_NET) { + SFC_GENERIC_LOG(DEBUG, + "Incompatible device class: skip probing, should be probed by other sfc driver."); + return 1; + } + sfc_register_dp(); logtype_main = sfc_register_logtype(&pci_dev->addr, @@ -2190,6 +2192,8 @@ sfc_eth_dev_init(struct rte_eth_dev *dev) /* Copy PCI device info to the dev->data */ rte_eth_copy_pci_info(dev, pci_dev); + dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; rc = sfc_kvargs_parse(sa); if (rc != 0) @@ -2277,6 +2281,7 @@ static const struct rte_pci_id pci_id_sfc_efx_map[] = { { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, + { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, { .vendor_id = 0 /* sentinel */ } };