X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_ethdev.c;h=6dffc1c4c5160f1174c5f24e0c9382af6f493b1b;hb=df1bfde4ff0d;hp=4e49180b9b55e12b1674ff9186c5da7029e50b7c;hpb=16e42e91ea3b3a2afbf7920caea475dcc20af05b;p=dpdk.git diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c index 4e49180b9b..6dffc1c4c5 100644 --- a/drivers/net/sfc/sfc_ethdev.c +++ b/drivers/net/sfc/sfc_ethdev.c @@ -1,5 +1,7 @@ /*- - * Copyright (c) 2016 Solarflare Communications Inc. + * BSD LICENSE + * + * Copyright (c) 2016-2017 Solarflare Communications Inc. * All rights reserved. * * This software was jointly developed between OKTET Labs (under contract @@ -30,6 +32,7 @@ #include #include #include +#include #include "efx.h" @@ -40,12 +43,66 @@ #include "sfc_ev.h" #include "sfc_rx.h" #include "sfc_tx.h" +#include "sfc_flow.h" +#include "sfc_dp.h" +#include "sfc_dp_rx.h" + +static struct sfc_dp_list sfc_dp_head = + TAILQ_HEAD_INITIALIZER(sfc_dp_head); + +static int +sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) +{ + struct sfc_adapter *sa = dev->data->dev_private; + efx_nic_fw_info_t enfi; + int ret; + int rc; + + /* + * Return value of the callback is likely supposed to be + * equal to or greater than 0, nevertheless, if an error + * occurs, it will be desirable to pass it to the caller + */ + if ((fw_version == NULL) || (fw_size == 0)) + return -EINVAL; + rc = efx_nic_get_fw_version(sa->nic, &enfi); + if (rc != 0) + return -rc; + + ret = snprintf(fw_version, fw_size, + "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, + enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], + enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); + if (ret < 0) + return ret; + + if (enfi.enfi_dpcpu_fw_ids_valid) { + size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); + int ret_extra; + + ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, + fw_size - dpcpu_fw_ids_offset, + " rx%" PRIx16 " tx%" PRIx16, + enfi.enfi_rx_dpcpu_fw_id, + enfi.enfi_tx_dpcpu_fw_id); + if (ret_extra < 0) + return ret_extra; + + ret += ret_extra; + } + + if (fw_size < (size_t)(++ret)) + return ret; + else + return 0; +} static void sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) { struct sfc_adapter *sa = dev->data->dev_private; + const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); sfc_log_init(sa, "entry"); @@ -77,8 +134,22 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_TX_OFFLOAD_UDP_CKSUM | DEV_TX_OFFLOAD_TCP_CKSUM; - dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOVLANOFFL | - ETH_TXQ_FLAGS_NOXSUMSCTP; + dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; + if (!encp->enc_hw_tx_insert_vlan_enabled) + dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; + else + dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; + +#if EFSYS_OPT_RX_SCALE + if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { + dev_info->reta_size = EFX_RSS_TBL_SIZE; + dev_info->hash_key_size = SFC_RSS_KEY_SIZE; + dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; + } +#endif + + if (sa->tso) + dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; @@ -96,6 +167,14 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; } +static const uint32_t * +sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) +{ + struct sfc_adapter *sa = dev->data->dev_private; + + return sa->dp_rx->supported_ptypes_get(); +} + static int sfc_dev_configure(struct rte_eth_dev *dev) { @@ -155,17 +234,21 @@ sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) sfc_log_init(sa, "entry"); - if (sa->state != SFC_ADAPTER_STARTED) - return 0; - retry: EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); - if (wait_to_complete) { + if (sa->state != SFC_ADAPTER_STARTED) { + sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); + if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, + *(uint64_t *)&old_link, + *(uint64_t *)¤t_link)) + goto retry; + } else if (wait_to_complete) { efx_link_mode_t link_mode; - efx_port_poll(sa->nic, &link_mode); + if (efx_port_poll(sa->nic, &link_mode) != 0) + link_mode = EFX_LINK_UNKNOWN; sfc_port_link_mode_to_info(link_mode, ¤t_link); if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, @@ -329,7 +412,7 @@ sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, if (rc != 0) goto fail_rx_qinit; - dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq; + dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; sfc_adapter_unlock(sa); @@ -344,13 +427,15 @@ fail_rx_qinit: static void sfc_rx_queue_release(void *queue) { - struct sfc_rxq *rxq = queue; + struct sfc_dp_rxq *dp_rxq = queue; + struct sfc_rxq *rxq; struct sfc_adapter *sa; unsigned int sw_index; - if (rxq == NULL) + if (dp_rxq == NULL) return; + rxq = sfc_rxq_by_dp_rxq(dp_rxq); sa = rxq->evq->sa; sfc_adapter_lock(sa); @@ -488,6 +573,27 @@ unlock: rte_spinlock_unlock(&port->mac_stats_lock); } +static void +sfc_stats_reset(struct rte_eth_dev *dev) +{ + struct sfc_adapter *sa = dev->data->dev_private; + struct sfc_port *port = &sa->port; + int rc; + + if (sa->state != SFC_ADAPTER_STARTED) { + /* + * The operation cannot be done if port is not started; it + * will be scheduled to be done during the next port start + */ + port->mac_stats_reset_pending = B_TRUE; + return; + } + + rc = sfc_port_reset_mac_stats(sa); + if (rc != 0) + sfc_err(sa, "failed to reset statistics (rc = %d)", rc); +} + static int sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, unsigned int xstats_count) @@ -768,33 +874,33 @@ sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, uint32_t nb_mc_addr) { struct sfc_adapter *sa = dev->data->dev_private; - uint8_t *mc_addrs_p; - uint8_t *mc_addrs; + struct sfc_port *port = &sa->port; + uint8_t *mc_addrs = port->mcast_addrs; int rc; unsigned int i; - if (nb_mc_addr > EFX_MAC_MULTICAST_LIST_MAX) { + if (mc_addrs == NULL) + return -ENOBUFS; + + if (nb_mc_addr > port->max_mcast_addrs) { sfc_err(sa, "too many multicast addresses: %u > %u", - nb_mc_addr, EFX_MAC_MULTICAST_LIST_MAX); + nb_mc_addr, port->max_mcast_addrs); return -EINVAL; } - mc_addrs_p = rte_calloc("mc-addrs", nb_mc_addr, EFX_MAC_ADDR_LEN, 0); - if (mc_addrs_p == NULL) - return -ENOMEM; - - mc_addrs = mc_addrs_p; - for (i = 0; i < nb_mc_addr; ++i) { (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, EFX_MAC_ADDR_LEN); mc_addrs += EFX_MAC_ADDR_LEN; } - rc = efx_mac_multicast_list_set(sa->nic, mc_addrs_p, nb_mc_addr); + port->nb_mcast_addrs = nb_mc_addr; - rte_free(mc_addrs_p); + if (sa->state != SFC_ADAPTER_STARTED) + return 0; + rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, + port->nb_mcast_addrs); if (rc != 0) sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); @@ -802,6 +908,407 @@ sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, return -rc; } +static void +sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, + struct rte_eth_rxq_info *qinfo) +{ + struct sfc_adapter *sa = dev->data->dev_private; + struct sfc_rxq_info *rxq_info; + struct sfc_rxq *rxq; + + sfc_adapter_lock(sa); + + SFC_ASSERT(rx_queue_id < sa->rxq_count); + + rxq_info = &sa->rxq_info[rx_queue_id]; + rxq = rxq_info->rxq; + SFC_ASSERT(rxq != NULL); + + qinfo->mp = rxq->refill_mb_pool; + qinfo->conf.rx_free_thresh = rxq->refill_threshold; + qinfo->conf.rx_drop_en = 1; + qinfo->conf.rx_deferred_start = rxq_info->deferred_start; + qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); + qinfo->nb_desc = rxq_info->entries; + + sfc_adapter_unlock(sa); +} + +static void +sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, + struct rte_eth_txq_info *qinfo) +{ + struct sfc_adapter *sa = dev->data->dev_private; + struct sfc_txq_info *txq_info; + + sfc_adapter_lock(sa); + + SFC_ASSERT(tx_queue_id < sa->txq_count); + + txq_info = &sa->txq_info[tx_queue_id]; + SFC_ASSERT(txq_info->txq != NULL); + + memset(qinfo, 0, sizeof(*qinfo)); + + qinfo->conf.txq_flags = txq_info->txq->flags; + qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; + qinfo->conf.tx_deferred_start = txq_info->deferred_start; + qinfo->nb_desc = txq_info->entries; + + sfc_adapter_unlock(sa); +} + +static uint32_t +sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + struct sfc_adapter *sa = dev->data->dev_private; + + sfc_log_init(sa, "RxQ=%u", rx_queue_id); + + return sfc_rx_qdesc_npending(sa, rx_queue_id); +} + +static int +sfc_rx_descriptor_done(void *queue, uint16_t offset) +{ + struct sfc_dp_rxq *dp_rxq = queue; + + return sfc_rx_qdesc_done(dp_rxq, offset); +} + +static int +sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + struct sfc_adapter *sa = dev->data->dev_private; + int rc; + + sfc_log_init(sa, "RxQ=%u", rx_queue_id); + + sfc_adapter_lock(sa); + + rc = EINVAL; + if (sa->state != SFC_ADAPTER_STARTED) + goto fail_not_started; + + rc = sfc_rx_qstart(sa, rx_queue_id); + if (rc != 0) + goto fail_rx_qstart; + + sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; + + sfc_adapter_unlock(sa); + + return 0; + +fail_rx_qstart: +fail_not_started: + sfc_adapter_unlock(sa); + SFC_ASSERT(rc > 0); + return -rc; +} + +static int +sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + struct sfc_adapter *sa = dev->data->dev_private; + + sfc_log_init(sa, "RxQ=%u", rx_queue_id); + + sfc_adapter_lock(sa); + sfc_rx_qstop(sa, rx_queue_id); + + sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; + + sfc_adapter_unlock(sa); + + return 0; +} + +static int +sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) +{ + struct sfc_adapter *sa = dev->data->dev_private; + int rc; + + sfc_log_init(sa, "TxQ = %u", tx_queue_id); + + sfc_adapter_lock(sa); + + rc = EINVAL; + if (sa->state != SFC_ADAPTER_STARTED) + goto fail_not_started; + + rc = sfc_tx_qstart(sa, tx_queue_id); + if (rc != 0) + goto fail_tx_qstart; + + sa->txq_info[tx_queue_id].deferred_started = B_TRUE; + + sfc_adapter_unlock(sa); + return 0; + +fail_tx_qstart: + +fail_not_started: + sfc_adapter_unlock(sa); + SFC_ASSERT(rc > 0); + return -rc; +} + +static int +sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) +{ + struct sfc_adapter *sa = dev->data->dev_private; + + sfc_log_init(sa, "TxQ = %u", tx_queue_id); + + sfc_adapter_lock(sa); + + sfc_tx_qstop(sa, tx_queue_id); + + sa->txq_info[tx_queue_id].deferred_started = B_FALSE; + + sfc_adapter_unlock(sa); + return 0; +} + +#if EFSYS_OPT_RX_SCALE +static int +sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, + struct rte_eth_rss_conf *rss_conf) +{ + struct sfc_adapter *sa = dev->data->dev_private; + + if ((sa->rss_channels == 1) || + (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) + return -ENOTSUP; + + sfc_adapter_lock(sa); + + /* + * Mapping of hash configuration between RTE and EFX is not one-to-one, + * hence, conversion is done here to derive a correct set of ETH_RSS + * flags which corresponds to the active EFX configuration stored + * locally in 'sfc_adapter' and kept up-to-date + */ + rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); + rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; + if (rss_conf->rss_key != NULL) + rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); + + sfc_adapter_unlock(sa); + + return 0; +} + +static int +sfc_dev_rss_hash_update(struct rte_eth_dev *dev, + struct rte_eth_rss_conf *rss_conf) +{ + struct sfc_adapter *sa = dev->data->dev_private; + unsigned int efx_hash_types; + int rc = 0; + + if ((sa->rss_channels == 1) || + (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { + sfc_err(sa, "RSS is not available"); + return -ENOTSUP; + } + + if ((rss_conf->rss_key != NULL) && + (rss_conf->rss_key_len != sizeof(sa->rss_key))) { + sfc_err(sa, "RSS key size is wrong (should be %lu)", + sizeof(sa->rss_key)); + return -EINVAL; + } + + if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { + sfc_err(sa, "unsupported hash functions requested"); + return -EINVAL; + } + + sfc_adapter_lock(sa); + + efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); + + rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, + efx_hash_types, B_TRUE); + if (rc != 0) + goto fail_scale_mode_set; + + if (rss_conf->rss_key != NULL) { + if (sa->state == SFC_ADAPTER_STARTED) { + rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, + sizeof(sa->rss_key)); + if (rc != 0) + goto fail_scale_key_set; + } + + rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); + } + + sa->rss_hash_types = efx_hash_types; + + sfc_adapter_unlock(sa); + + return 0; + +fail_scale_key_set: + if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, + sa->rss_hash_types, B_TRUE) != 0) + sfc_err(sa, "failed to restore RSS mode"); + +fail_scale_mode_set: + sfc_adapter_unlock(sa); + return -rc; +} + +static int +sfc_dev_rss_reta_query(struct rte_eth_dev *dev, + struct rte_eth_rss_reta_entry64 *reta_conf, + uint16_t reta_size) +{ + struct sfc_adapter *sa = dev->data->dev_private; + int entry; + + if ((sa->rss_channels == 1) || + (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) + return -ENOTSUP; + + if (reta_size != EFX_RSS_TBL_SIZE) + return -EINVAL; + + sfc_adapter_lock(sa); + + for (entry = 0; entry < reta_size; entry++) { + int grp = entry / RTE_RETA_GROUP_SIZE; + int grp_idx = entry % RTE_RETA_GROUP_SIZE; + + if ((reta_conf[grp].mask >> grp_idx) & 1) + reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; + } + + sfc_adapter_unlock(sa); + + return 0; +} + +static int +sfc_dev_rss_reta_update(struct rte_eth_dev *dev, + struct rte_eth_rss_reta_entry64 *reta_conf, + uint16_t reta_size) +{ + struct sfc_adapter *sa = dev->data->dev_private; + unsigned int *rss_tbl_new; + uint16_t entry; + int rc; + + + if ((sa->rss_channels == 1) || + (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { + sfc_err(sa, "RSS is not available"); + return -ENOTSUP; + } + + if (reta_size != EFX_RSS_TBL_SIZE) { + sfc_err(sa, "RETA size is wrong (should be %u)", + EFX_RSS_TBL_SIZE); + return -EINVAL; + } + + rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); + if (rss_tbl_new == NULL) + return -ENOMEM; + + sfc_adapter_lock(sa); + + rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); + + for (entry = 0; entry < reta_size; entry++) { + int grp_idx = entry % RTE_RETA_GROUP_SIZE; + struct rte_eth_rss_reta_entry64 *grp; + + grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; + + if (grp->mask & (1ull << grp_idx)) { + if (grp->reta[grp_idx] >= sa->rss_channels) { + rc = EINVAL; + goto bad_reta_entry; + } + rss_tbl_new[entry] = grp->reta[grp_idx]; + } + } + + rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); + if (rc == 0) + rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); + +bad_reta_entry: + sfc_adapter_unlock(sa); + + rte_free(rss_tbl_new); + + SFC_ASSERT(rc >= 0); + return -rc; +} +#endif + +static int +sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, + enum rte_filter_op filter_op, + void *arg) +{ + struct sfc_adapter *sa = dev->data->dev_private; + int rc = ENOTSUP; + + sfc_log_init(sa, "entry"); + + switch (filter_type) { + case RTE_ETH_FILTER_NONE: + sfc_err(sa, "Global filters configuration not supported"); + break; + case RTE_ETH_FILTER_MACVLAN: + sfc_err(sa, "MACVLAN filters not supported"); + break; + case RTE_ETH_FILTER_ETHERTYPE: + sfc_err(sa, "EtherType filters not supported"); + break; + case RTE_ETH_FILTER_FLEXIBLE: + sfc_err(sa, "Flexible filters not supported"); + break; + case RTE_ETH_FILTER_SYN: + sfc_err(sa, "SYN filters not supported"); + break; + case RTE_ETH_FILTER_NTUPLE: + sfc_err(sa, "NTUPLE filters not supported"); + break; + case RTE_ETH_FILTER_TUNNEL: + sfc_err(sa, "Tunnel filters not supported"); + break; + case RTE_ETH_FILTER_FDIR: + sfc_err(sa, "Flow Director filters not supported"); + break; + case RTE_ETH_FILTER_HASH: + sfc_err(sa, "Hash filters not supported"); + break; + case RTE_ETH_FILTER_GENERIC: + if (filter_op != RTE_ETH_FILTER_GET) { + rc = EINVAL; + } else { + *(const void **)arg = &sfc_flow_ops; + rc = 0; + } + break; + default: + sfc_err(sa, "Unknown filter type %u", filter_type); + break; + } + + sfc_log_init(sa, "exit: %d", -rc); + SFC_ASSERT(rc >= 0); + return -rc; +} + static const struct eth_dev_ops sfc_eth_dev_ops = { .dev_configure = sfc_dev_configure, .dev_start = sfc_dev_start, @@ -815,20 +1322,102 @@ static const struct eth_dev_ops sfc_eth_dev_ops = { .allmulticast_disable = sfc_dev_allmulti_disable, .link_update = sfc_dev_link_update, .stats_get = sfc_stats_get, + .stats_reset = sfc_stats_reset, .xstats_get = sfc_xstats_get, + .xstats_reset = sfc_stats_reset, .xstats_get_names = sfc_xstats_get_names, .dev_infos_get = sfc_dev_infos_get, + .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, .mtu_set = sfc_dev_set_mtu, + .rx_queue_start = sfc_rx_queue_start, + .rx_queue_stop = sfc_rx_queue_stop, + .tx_queue_start = sfc_tx_queue_start, + .tx_queue_stop = sfc_tx_queue_stop, .rx_queue_setup = sfc_rx_queue_setup, .rx_queue_release = sfc_rx_queue_release, + .rx_queue_count = sfc_rx_queue_count, + .rx_descriptor_done = sfc_rx_descriptor_done, .tx_queue_setup = sfc_tx_queue_setup, .tx_queue_release = sfc_tx_queue_release, .flow_ctrl_get = sfc_flow_ctrl_get, .flow_ctrl_set = sfc_flow_ctrl_set, .mac_addr_set = sfc_mac_addr_set, +#if EFSYS_OPT_RX_SCALE + .reta_update = sfc_dev_rss_reta_update, + .reta_query = sfc_dev_rss_reta_query, + .rss_hash_update = sfc_dev_rss_hash_update, + .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, +#endif + .filter_ctrl = sfc_dev_filter_ctrl, .set_mc_addr_list = sfc_set_mc_addr_list, + .rxq_info_get = sfc_rx_queue_info_get, + .txq_info_get = sfc_tx_queue_info_get, + .fw_version_get = sfc_fw_version_get, }; +static int +sfc_eth_dev_set_ops(struct rte_eth_dev *dev) +{ + struct sfc_adapter *sa = dev->data->dev_private; + unsigned int avail_caps = 0; + const char *rx_name = NULL; + int rc; + + if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED) + return -E_RTE_SECONDARY; + + rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, + sfc_kvarg_string_handler, &rx_name); + if (rc != 0) + goto fail_kvarg_rx_datapath; + + if (rx_name != NULL) { + sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); + if (sa->dp_rx == NULL) { + sfc_err(sa, "Rx datapath %s not found", rx_name); + rc = ENOENT; + goto fail_dp_rx; + } + if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { + sfc_err(sa, + "Insufficient Hw/FW capabilities to use Rx datapath %s", + rx_name); + rc = EINVAL; + goto fail_dp_rx; + } + } else { + sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); + if (sa->dp_rx == NULL) { + sfc_err(sa, "Rx datapath by caps %#x not found", + avail_caps); + rc = ENOENT; + goto fail_dp_rx; + } + } + + sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); + + dev->rx_pkt_burst = sa->dp_rx->pkt_burst; + + dev->tx_pkt_burst = sfc_xmit_pkts; + + dev->dev_ops = &sfc_eth_dev_ops; + + return 0; + +fail_dp_rx: +fail_kvarg_rx_datapath: + return rc; +} + +static void +sfc_register_dp(void) +{ + /* Register once */ + if (TAILQ_EMPTY(&sfc_dp_head)) + sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); +} + static int sfc_eth_dev_init(struct rte_eth_dev *dev) { @@ -838,6 +1427,8 @@ sfc_eth_dev_init(struct rte_eth_dev *dev) const efx_nic_cfg_t *encp; const struct ether_addr *from; + sfc_register_dp(); + /* Required for logging */ sa->eth_dev = dev; @@ -878,12 +1469,10 @@ sfc_eth_dev_init(struct rte_eth_dev *dev) from = (const struct ether_addr *)(encp->enc_mac_addr); ether_addr_copy(from, &dev->data->mac_addrs[0]); - dev->dev_ops = &sfc_eth_dev_ops; - dev->rx_pkt_burst = &sfc_recv_pkts; - dev->tx_pkt_burst = &sfc_xmit_pkts; - sfc_adapter_unlock(sa); + sfc_eth_dev_set_ops(dev); + sfc_log_init(sa, "done"); return 0; @@ -935,8 +1524,11 @@ sfc_eth_dev_uninit(struct rte_eth_dev *dev) static const struct rte_pci_id pci_id_sfc_efx_map[] = { { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, + { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, + { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, + { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, { .vendor_id = 0 /* sentinel */ } }; @@ -956,7 +1548,10 @@ static struct eth_driver sfc_efx_pmd = { RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); +RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, + SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " + SFC_KVARG_STATS_UPDATE_PERIOD_MS "= " SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);