X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fsfc_rx.c;h=3415dcad7e4a46d59d9c97aa4b6040aeb047bbe7;hb=2b6d6d71a0992220043b2f5c3b885c486e7921b7;hp=5d8c2765c8929cde456fd65d71caf05d89aa76f2;hpb=06b186a01da186f079588479ebfe0acec208345c;p=dpdk.git diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c index 5d8c2765c8..3415dcad7e 100644 --- a/drivers/net/sfc/sfc_rx.c +++ b/drivers/net/sfc/sfc_rx.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright (c) 2016-2018 Solarflare Communications Inc. - * All rights reserved. + * Copyright(c) 2019-2020 Xilinx, Inc. + * Copyright(c) 2016-2019 Solarflare Communications Inc. * * This software was jointly developed between OKTET Labs (under contract * for Solarflare) and Solarflare Communications, Inc. @@ -52,6 +52,19 @@ sfc_rx_qflush_failed(struct sfc_rxq_info *rxq_info) rxq_info->state &= ~SFC_RXQ_FLUSHING; } +static int +sfc_efx_rx_qprime(struct sfc_efx_rxq *rxq) +{ + int rc = 0; + + if (rxq->evq->read_ptr_primed != rxq->evq->read_ptr) { + rc = efx_ev_qprime(rxq->evq->common, rxq->evq->read_ptr); + if (rc == 0) + rxq->evq->read_ptr_primed = rxq->evq->read_ptr; + } + return rc; +} + static void sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq) { @@ -96,7 +109,7 @@ sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq) ++i, id = (id + 1) & rxq->ptr_mask) { m = objs[i]; - MBUF_RAW_ALLOC_CHECK(m); + __rte_mbuf_raw_sanity_check(m); rxd = &rxq->sw_desc[id]; rxd->mbuf = m; @@ -306,6 +319,9 @@ discard: sfc_efx_rx_qrefill(rxq); + if (rxq->flags & SFC_EFX_RXQ_FLAG_INTR_EN) + sfc_efx_rx_qprime(rxq); + return done_pkts; } @@ -360,6 +376,28 @@ sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset) return RTE_ETH_RX_DESC_UNAVAIL; } +boolean_t +sfc_rx_check_scatter(size_t pdu, size_t rx_buf_size, uint32_t rx_prefix_size, + boolean_t rx_scatter_enabled, uint32_t rx_scatter_max, + const char **error) +{ + uint32_t effective_rx_scatter_max; + uint32_t rx_scatter_bufs; + + effective_rx_scatter_max = rx_scatter_enabled ? rx_scatter_max : 1; + rx_scatter_bufs = EFX_DIV_ROUND_UP(pdu + rx_prefix_size, rx_buf_size); + + if (rx_scatter_bufs > effective_rx_scatter_max) { + if (rx_scatter_enabled) + *error = "Possible number of Rx scatter buffers exceeds maximum number"; + else + *error = "Rx scatter is disabled and RxQ mbuf pool object size is too small"; + return B_FALSE; + } + + return B_TRUE; +} + /** Get Rx datapath ops by the datapath RxQ handle */ const struct sfc_dp_rx * sfc_dp_rx_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq) @@ -481,14 +519,30 @@ sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq) rte_free(rxq); } + +/* Use qstop and qstart functions in the case of qstart failure */ +static sfc_dp_rx_qstop_t sfc_efx_rx_qstop; +static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge; + + static sfc_dp_rx_qstart_t sfc_efx_rx_qstart; static int sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq, - __rte_unused unsigned int evq_read_ptr) + __rte_unused unsigned int evq_read_ptr, + const efx_rx_prefix_layout_t *pinfo) { /* libefx-based datapath is specific to libefx-based PMD */ struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq); struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq); + int rc; + + /* + * libefx API is used to extract information from Rx prefix and + * it guarantees consistency. Just do length check to ensure + * that we reserved space in Rx buffers correctly. + */ + if (rxq->prefix_size != pinfo->erpl_length) + return ENOTSUP; rxq->common = crxq->common; @@ -498,10 +552,20 @@ sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq, rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING); + if (rxq->flags & SFC_EFX_RXQ_FLAG_INTR_EN) { + rc = sfc_efx_rx_qprime(rxq); + if (rc != 0) + goto fail_rx_qprime; + } + return 0; + +fail_rx_qprime: + sfc_efx_rx_qstop(dp_rxq, NULL); + sfc_efx_rx_qpurge(dp_rxq); + return rc; } -static sfc_dp_rx_qstop_t sfc_efx_rx_qstop; static void sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq, __rte_unused unsigned int *evq_read_ptr) @@ -516,7 +580,6 @@ sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq, */ } -static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge; static void sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq) { @@ -539,14 +602,43 @@ sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq) rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED; } +static sfc_dp_rx_intr_enable_t sfc_efx_rx_intr_enable; +static int +sfc_efx_rx_intr_enable(struct sfc_dp_rxq *dp_rxq) +{ + struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq); + int rc = 0; + + rxq->flags |= SFC_EFX_RXQ_FLAG_INTR_EN; + if (rxq->flags & SFC_EFX_RXQ_FLAG_STARTED) { + rc = sfc_efx_rx_qprime(rxq); + if (rc != 0) + rxq->flags &= ~SFC_EFX_RXQ_FLAG_INTR_EN; + } + return rc; +} + +static sfc_dp_rx_intr_disable_t sfc_efx_rx_intr_disable; +static int +sfc_efx_rx_intr_disable(struct sfc_dp_rxq *dp_rxq) +{ + struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq); + + /* Cannot disarm, just disable rearm */ + rxq->flags &= ~SFC_EFX_RXQ_FLAG_INTR_EN; + return 0; +} + struct sfc_dp_rx sfc_efx_rx = { .dp = { .name = SFC_KVARG_DATAPATH_EFX, .type = SFC_DP_RX, - .hw_fw_caps = 0, + .hw_fw_caps = SFC_DP_HW_FW_CAP_RX_EFX, }, - .features = SFC_DP_RX_FEAT_SCATTER | - SFC_DP_RX_FEAT_CHECKSUM, + .features = SFC_DP_RX_FEAT_INTR, + .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM | + DEV_RX_OFFLOAD_RSS_HASH, + .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER, .qsize_up_rings = sfc_efx_rx_qsize_up_rings, .qcreate = sfc_efx_rx_qcreate, .qdestroy = sfc_efx_rx_qdestroy, @@ -556,6 +648,8 @@ struct sfc_dp_rx sfc_efx_rx = { .supported_ptypes_get = sfc_efx_supported_ptypes_get, .qdesc_npending = sfc_efx_rx_qdesc_npending, .qdesc_status = sfc_efx_rx_qdesc_status, + .intr_enable = sfc_efx_rx_intr_enable, + .intr_disable = sfc_efx_rx_intr_disable, .pkt_burst = sfc_efx_recv_pkts, }; @@ -644,7 +738,8 @@ retry: sfc_warn(sa, "promiscuous mode will be disabled"); port->promisc = B_FALSE; - rc = sfc_set_rx_mode(sa); + sa->eth_dev->data->promiscuous = 0; + rc = sfc_set_rx_mode_unchecked(sa); if (rc != 0) return rc; @@ -657,7 +752,8 @@ retry: sfc_warn(sa, "all-multicast mode will be disabled"); port->allmulti = B_FALSE; - rc = sfc_set_rx_mode(sa); + sa->eth_dev->data->all_multicast = 0; + rc = sfc_set_rx_mode_unchecked(sa); if (rc != 0) return rc; @@ -673,6 +769,7 @@ sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index) struct sfc_rxq_info *rxq_info; struct sfc_rxq *rxq; struct sfc_evq *evq; + efx_rx_prefix_layout_t pinfo; int rc; sfc_log_init(sa, "sw_index=%u", sw_index); @@ -724,9 +821,13 @@ sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index) if (rc != 0) goto fail_rx_qcreate; + rc = efx_rx_prefix_get_layout(rxq->common, &pinfo); + if (rc != 0) + goto fail_prefix_get_layout; + efx_rx_qenable(rxq->common); - rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr); + rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr, &pinfo); if (rc != 0) goto fail_dp_qstart; @@ -745,11 +846,14 @@ sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index) return 0; fail_mac_filter_default_rxq_set: + sfc_rx_qflush(sa, sw_index); sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr); + rxq_info->state = SFC_RXQ_INITIALIZED; fail_dp_qstart: - sfc_rx_qflush(sa, sw_index); + efx_rx_qdestroy(rxq->common); +fail_prefix_get_layout: fail_rx_qcreate: fail_bad_contig_block_size: fail_mp_get_info: @@ -794,36 +898,32 @@ sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index) sfc_ev_qstop(rxq->evq); } -uint64_t -sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa) +static uint64_t +sfc_rx_get_offload_mask(struct sfc_adapter *sa) { const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); - uint64_t caps = 0; + uint64_t no_caps = 0; - caps |= DEV_RX_OFFLOAD_JUMBO_FRAME; + if (encp->enc_tunnel_encapsulations_supported == 0) + no_caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; - if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_CHECKSUM) { - caps |= DEV_RX_OFFLOAD_IPV4_CKSUM; - caps |= DEV_RX_OFFLOAD_UDP_CKSUM; - caps |= DEV_RX_OFFLOAD_TCP_CKSUM; - } + return ~no_caps; +} + +uint64_t +sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa) +{ + uint64_t caps = sa->priv.dp_rx->dev_offload_capa; - if (encp->enc_tunnel_encapsulations_supported && - (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS)) - caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; + caps |= DEV_RX_OFFLOAD_JUMBO_FRAME; - return caps; + return caps & sfc_rx_get_offload_mask(sa); } uint64_t sfc_rx_get_queue_offload_caps(struct sfc_adapter *sa) { - uint64_t caps = 0; - - if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_SCATTER) - caps |= DEV_RX_OFFLOAD_SCATTER; - - return caps; + return sa->priv.dp_rx->queue_offload_capa & sfc_rx_get_offload_mask(sa); } static int @@ -949,7 +1049,7 @@ sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool) * Start is aligned the same or better than end, * just align length. */ - buf_size = P2ALIGN(buf_size, nic_align_end); + buf_size = EFX_P2ALIGN(uint32_t, buf_size, nic_align_end); } return buf_size; @@ -975,6 +1075,7 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, struct sfc_dp_rx_qcreate_info info; struct sfc_dp_rx_hw_limits hw_limits; uint16_t rx_free_thresh; + const char *error; memset(&hw_limits, 0, sizeof(hw_limits)); hw_limits.rxq_max_entries = sa->rxq_max_entries; @@ -1005,10 +1106,12 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, goto fail_bad_conf; } - if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) && - (~offloads & DEV_RX_OFFLOAD_SCATTER)) { - sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool " - "object size is too small", sw_index); + if (!sfc_rx_check_scatter(sa->port.pdu, buf_size, + encp->enc_rx_prefix_size, + (offloads & DEV_RX_OFFLOAD_SCATTER), + encp->enc_rx_scatter_max, + &error)) { + sfc_err(sa, "RxQ %u MTU check failed: %s", sw_index, error); sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs " "PDU size %u plus Rx prefix %u bytes", sw_index, buf_size, (unsigned int)sa->port.pdu, @@ -1033,9 +1136,13 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE; if ((encp->enc_tunnel_encapsulations_supported != 0) && - (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS)) + (sfc_dp_rx_offload_capa(sa->priv.dp_rx) & + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) != 0) rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES; + if (offloads & DEV_RX_OFFLOAD_RSS_HASH) + rxq_info->type_flags |= EFX_RXQ_FLAG_RSS_HASH; + rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index, evq_entries, socket_id, &evq); if (rc != 0) @@ -1061,6 +1168,13 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, rxq_info->refill_threshold = RTE_MAX(rx_free_thresh, SFC_RX_REFILL_BULK); rxq_info->refill_mb_pool = mb_pool; + + if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0 && + (offloads & DEV_RX_OFFLOAD_RSS_HASH)) + rxq_info->rxq_flags = SFC_RXQ_FLAG_RSS_HASH; + else + rxq_info->rxq_flags = 0; + rxq->buf_size = buf_size; rc = sfc_dma_alloc(sa, "rxq", sw_index, @@ -1076,17 +1190,16 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, info.buf_size = buf_size; info.batch_max = encp->enc_rx_batch_max; info.prefix_size = encp->enc_rx_prefix_size; - - if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0) - info.flags |= SFC_RXQ_FLAG_RSS_HASH; - + info.flags = rxq_info->rxq_flags; info.rxq_entries = rxq_info->entries; info.rxq_hw_ring = rxq->mem.esm_base; + info.evq_hw_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index); info.evq_entries = evq_entries; info.evq_hw_ring = evq->mem.esm_base; info.hw_index = rxq->hw_index; info.mem_bar = sa->mem_bar.esb_base; info.vi_window_shift = encp->enc_vi_window_shift; + info.fcw_offset = sa->fcw_offset; rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index, &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr, @@ -1328,7 +1441,7 @@ sfc_rx_process_adv_conf_rss(struct sfc_adapter *sa, if (conf->rss_key != NULL) { if (conf->rss_key_len != sizeof(rss->key)) { - sfc_err(sa, "RSS key size is wrong (should be %lu)", + sfc_err(sa, "RSS key size is wrong (should be %zu)", sizeof(rss->key)); return EINVAL; }