X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Ftxgbe%2Ftxgbe_ethdev.c;h=7b42285b9edda7b6677c79c90f908727600563ad;hb=2e1ecb460db92bc9dcd2350ed48dfe0b504f380f;hp=0b0f9db7cb2a6ac4dc138a043440fa0970b666c4;hpb=295968d1740760337e16b0d7914875c5cac52850;p=dpdk.git diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 0b0f9db7cb..7b42285b9e 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -495,7 +495,7 @@ txgbe_parse_devargs(struct txgbe_hw *hw, struct rte_devargs *devargs) struct rte_kvargs *kvlist; u16 auto_neg = 1; u16 poll = 0; - u16 present = 1; + u16 present = 0; u16 sgmii = 0; u16 ffe_set = 0; u16 ffe_main = 27; @@ -548,7 +548,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) struct txgbe_dcb_config *dcb_config = TXGBE_DEV_DCB_CONFIG(eth_dev); struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev); struct txgbe_bw_conf *bw_conf = TXGBE_DEV_BW_CONF(eth_dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; const struct rte_memzone *mz; uint32_t ctrl_ext; uint16_t csum; @@ -821,10 +821,8 @@ static int txgbe_fdir_filter_uninit(struct rte_eth_dev *eth_dev) struct txgbe_hw_fdir_info *fdir_info = TXGBE_DEV_FDIR(eth_dev); struct txgbe_fdir_filter *fdir_filter; - if (fdir_info->hash_map) - rte_free(fdir_info->hash_map); - if (fdir_info->hash_handle) - rte_hash_free(fdir_info->hash_handle); + rte_free(fdir_info->hash_map); + rte_hash_free(fdir_info->hash_handle); while ((fdir_filter = TAILQ_FIRST(&fdir_info->fdir_list))) { TAILQ_REMOVE(&fdir_info->fdir_list, @@ -841,10 +839,8 @@ static int txgbe_l2_tn_filter_uninit(struct rte_eth_dev *eth_dev) struct txgbe_l2_tn_info *l2_tn_info = TXGBE_DEV_L2_TN(eth_dev); struct txgbe_l2_tn_filter *l2_tn_filter; - if (l2_tn_info->hash_map) - rte_free(l2_tn_info->hash_map); - if (l2_tn_info->hash_handle) - rte_hash_free(l2_tn_info->hash_handle); + rte_free(l2_tn_info->hash_map); + rte_hash_free(l2_tn_info->hash_handle); while ((l2_tn_filter = TAILQ_FIRST(&l2_tn_info->l2_tn_list))) { TAILQ_REMOVE(&l2_tn_info->l2_tn_list, @@ -1137,10 +1133,10 @@ txgbe_vlan_hw_strip_bitmap_set(struct rte_eth_dev *dev, uint16_t queue, bool on) rxq = dev->data->rx_queues[queue]; if (on) { - rxq->vlan_flags = PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED; + rxq->vlan_flags = RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED; rxq->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP; } else { - rxq->vlan_flags = PKT_RX_VLAN; + rxq->vlan_flags = RTE_MBUF_F_RX_VLAN; rxq->offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP; } } @@ -1620,7 +1616,7 @@ txgbe_dev_start(struct rte_eth_dev *dev) struct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev); struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; uint32_t intr_vector = 0; int err; bool link_up = false, negotiate = 0; @@ -1670,18 +1666,15 @@ txgbe_dev_start(struct rte_eth_dev *dev) return -1; } - if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { - intr_handle->intr_vec = - rte_zmalloc("intr_vec", - dev->data->nb_rx_queues * sizeof(int), 0); - if (intr_handle->intr_vec == NULL) { + if (rte_intr_dp_is_en(intr_handle)) { + if (rte_intr_vec_list_alloc(intr_handle, "intr_vec", + dev->data->nb_rx_queues)) { PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" " intr_vec", dev->data->nb_rx_queues); return -ENOMEM; } } - - /* confiugre msix for sleep until rx interrupt */ + /* configure msix for sleep until rx interrupt */ txgbe_configure_msix(dev); /* initialize transmission unit */ @@ -1861,7 +1854,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev) struct txgbe_hw *hw = TXGBE_DEV_HW(dev); struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; int vf; struct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev); @@ -1911,10 +1904,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev) /* Clean datapath event and queue/vec mapping */ rte_intr_efd_disable(intr_handle); - if (intr_handle->intr_vec != NULL) { - rte_free(intr_handle->intr_vec); - intr_handle->intr_vec = NULL; - } + rte_intr_vec_list_free(intr_handle); /* reset hierarchy commit */ tm_conf->committed = false; @@ -1943,6 +1933,7 @@ txgbe_dev_set_link_up(struct rte_eth_dev *dev) } else { /* Turn on the laser */ hw->mac.enable_tx_laser(hw); + hw->dev_start = true; txgbe_dev_link_update(dev, 0); } @@ -1963,6 +1954,7 @@ txgbe_dev_set_link_down(struct rte_eth_dev *dev) } else { /* Turn off the laser */ hw->mac.disable_tx_laser(hw); + hw->dev_start = false; txgbe_dev_link_update(dev, 0); } @@ -1977,7 +1969,7 @@ txgbe_dev_close(struct rte_eth_dev *dev) { struct txgbe_hw *hw = TXGBE_DEV_HW(dev); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; int retries = 0; int ret; @@ -2603,6 +2595,7 @@ txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_vfs = pci_dev->max_vfs; dev_info->max_vmdq_pools = RTE_ETH_64_POOLS; dev_info->vmdq_queue_num = dev_info->max_rx_queues; + dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP; dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev); dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) | dev_info->rx_queue_offload_capa); @@ -2699,7 +2692,7 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev, link.link_speed = RTE_ETH_SPEED_NUM_NONE; link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX; link.link_autoneg = !(dev->data->dev_conf.link_speeds & - RTE_ETH_LINK_AUTONEG); + RTE_ETH_LINK_SPEED_FIXED); hw->mac.get_link_status = true; @@ -2936,8 +2929,8 @@ txgbe_dev_interrupt_get_status(struct rte_eth_dev *dev, struct txgbe_hw *hw = TXGBE_DEV_HW(dev); struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); - if (intr_handle->type != RTE_INTR_HANDLE_UIO && - intr_handle->type != RTE_INTR_HANDLE_VFIO_MSIX) + if (rte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_UIO && + rte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_VFIO_MSIX) wr32(hw, TXGBE_PX_INTA, 1); /* clear all cause mask */ @@ -3103,7 +3096,7 @@ txgbe_dev_interrupt_delayed_handler(void *param) { struct rte_eth_dev *dev = (struct rte_eth_dev *)param; struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); struct txgbe_hw *hw = TXGBE_DEV_HW(dev); uint32_t eicr; @@ -3171,7 +3164,7 @@ txgbe_dev_led_on(struct rte_eth_dev *dev) struct txgbe_hw *hw; hw = TXGBE_DEV_HW(dev); - return txgbe_led_on(hw, 4) == 0 ? 0 : -ENOTSUP; + return txgbe_led_on(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP; } static int @@ -3180,7 +3173,7 @@ txgbe_dev_led_off(struct rte_eth_dev *dev) struct txgbe_hw *hw; hw = TXGBE_DEV_HW(dev); - return txgbe_led_off(hw, 4) == 0 ? 0 : -ENOTSUP; + return txgbe_led_off(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP; } static int @@ -3466,7 +3459,7 @@ txgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) * scattered packets when this feature has not been enabled before. */ if (dev_data->dev_started && !dev_data->scattered_rx && - (frame_size + 2 * TXGBE_VLAN_TAG_SIZE > + (frame_size + 2 * RTE_VLAN_HLEN > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) { PMD_INIT_LOG(ERR, "Stop port first."); return -EINVAL; @@ -3623,7 +3616,7 @@ static int txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; uint32_t mask; struct txgbe_hw *hw = TXGBE_DEV_HW(dev); @@ -3687,7 +3680,7 @@ txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction, wr32(hw, TXGBE_IVARMISC, tmp); } else { /* rx or tx causes */ - /* Workround for ICR lost */ + /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, TXGBE_IVAR(queue >> 1)); tmp &= ~(0xFF << idx); @@ -3705,7 +3698,7 @@ static void txgbe_configure_msix(struct rte_eth_dev *dev) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; struct txgbe_hw *hw = TXGBE_DEV_HW(dev); uint32_t queue_id, base = TXGBE_MISC_VEC_ID; uint32_t vec = TXGBE_MISC_VEC_ID; @@ -3739,8 +3732,10 @@ txgbe_configure_msix(struct rte_eth_dev *dev) queue_id++) { /* by default, 1:1 mapping */ txgbe_set_ivar_map(hw, 0, queue_id, vec); - intr_handle->intr_vec[queue_id] = vec; - if (vec < base + intr_handle->nb_efd - 1) + rte_intr_vec_list_index_set(intr_handle, + queue_id, vec); + if (vec < base + rte_intr_nb_efd_get(intr_handle) + - 1) vec++; } @@ -4390,7 +4385,7 @@ txgbe_timesync_disable(struct rte_eth_dev *dev) /* Disable L2 filtering of IEEE1588/802.1AS Ethernet frame types. */ wr32(hw, TXGBE_ETFLT(TXGBE_ETF_ID_1588), 0); - /* Stop incrementating the System Time registers. */ + /* Stop incrementing the System Time registers. */ wr32(hw, TXGBE_TSTIMEINC, 0); return 0;