X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Ftxgbe%2Ftxgbe_ethdev.c;h=90137d0ceb6bb2357fe524250b8be832f4936ec5;hb=3a123ba60a7158ec34bc680fb8d7c2fb7db07c9d;hp=73498935ca20379a243a79e9826c2667734f2f33;hpb=d15c7568e25d8c2b16ea78f641e276de3ed8bce5;p=dpdk.git diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 73498935ca..90137d0ceb 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include @@ -547,6 +547,12 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* Unlock any pending hardware semaphore */ txgbe_swfw_lock_reset(hw); +#ifdef RTE_LIB_SECURITY + /* Initialize security_ctx only for primary process*/ + if (txgbe_ipsec_ctx_create(eth_dev)) + return -ENOMEM; +#endif + /* Initialize DCB configuration*/ memset(dcb_config, 0, sizeof(struct txgbe_dcb_config)); txgbe_dcb_init(hw, dcb_config); @@ -704,6 +710,9 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* initialize bandwidth configuration info */ memset(bw_conf, 0, sizeof(struct txgbe_bw_conf)); + /* initialize Traffic Manager configuration */ + txgbe_tm_conf_init(eth_dev); + return 0; } @@ -1545,6 +1554,7 @@ txgbe_dev_start(struct rte_eth_dev *dev) int status; uint16_t vf, idx; uint32_t *link_speeds; + struct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev); PMD_INIT_FUNC_TRACE(); @@ -1748,6 +1758,11 @@ skip_link_setup: txgbe_l2_tunnel_conf(dev); txgbe_filter_restore(dev); + if (tm_conf->root && !tm_conf->committed) + PMD_DRV_LOG(WARNING, + "please call hierarchy_commit() " + "before starting the port"); + /* * Update link status right before return, because it may * start link configuration process in a separate thread. @@ -1780,6 +1795,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev) struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; int vf; + struct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev); if (hw->adapter_stopped) return 0; @@ -1832,6 +1848,9 @@ txgbe_dev_stop(struct rte_eth_dev *dev) intr_handle->intr_vec = NULL; } + /* reset hierarchy commit */ + tm_conf->committed = false; + adapter->rss_reta_updated = 0; wr32m(hw, TXGBE_LEDCTL, 0xFFFFFFFF, TXGBE_LEDCTL_SEL_MASK); @@ -1947,6 +1966,13 @@ txgbe_dev_close(struct rte_eth_dev *dev) /* clear all the filters list */ txgbe_filterlist_flush(); + /* Remove all Traffic Manager configuration */ + txgbe_tm_conf_uninit(dev); + +#ifdef RTE_LIB_SECURITY + rte_free(dev->security_ctx); +#endif + return ret; } @@ -3231,7 +3257,7 @@ txgbe_dev_rss_reta_update(struct rte_eth_dev *dev, if (!mask) continue; - reta = rd32a(hw, TXGBE_REG_RSSTBL, i >> 2); + reta = rd32at(hw, TXGBE_REG_RSSTBL, i >> 2); for (j = 0; j < 4; j++) { if (RS8(mask, j, 0x1)) { reta &= ~(MS32(8 * j, 0xFF)); @@ -3239,7 +3265,7 @@ txgbe_dev_rss_reta_update(struct rte_eth_dev *dev, 8 * j, 0xFF); } } - wr32a(hw, TXGBE_REG_RSSTBL, i >> 2, reta); + wr32at(hw, TXGBE_REG_RSSTBL, i >> 2, reta); } adapter->rss_reta_updated = 1; @@ -3272,7 +3298,7 @@ txgbe_dev_rss_reta_query(struct rte_eth_dev *dev, if (!mask) continue; - reta = rd32a(hw, TXGBE_REG_RSSTBL, i >> 2); + reta = rd32at(hw, TXGBE_REG_RSSTBL, i >> 2); for (j = 0; j < 4; j++) { if (RS8(mask, j, 0x1)) reta_conf[idx].reta[shift + j] = @@ -4095,7 +4121,7 @@ txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev, hw = TXGBE_DEV_HW(dev); mc_addr_list = (u8 *)mc_addr_set; - return txgbe_update_mc_addr_list(hw, mc_addr_list, nb_mc_addr, + return hw->mac.update_mc_addr_list(hw, mc_addr_list, nb_mc_addr, txgbe_dev_addr_list_itr, TRUE); } @@ -4498,6 +4524,7 @@ txgbe_rss_update_sp(enum txgbe_mac_type mac_type) { switch (mac_type) { case txgbe_mac_raptor: + case txgbe_mac_raptor_vf: return 1; default: return 0; @@ -5199,6 +5226,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = { .timesync_write_time = txgbe_timesync_write_time, .udp_tunnel_port_add = txgbe_dev_udp_tunnel_port_add, .udp_tunnel_port_del = txgbe_dev_udp_tunnel_port_del, + .tm_ops_get = txgbe_tm_ops_get, .tx_done_cleanup = txgbe_dev_tx_done_cleanup, };