X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Ftxgbe%2Ftxgbe_ipsec.c;h=445733f3ba46348fb04d42b267189710d2a8c0c8;hb=586e6028371764452b7dbae3b1f50adde87be80e;hp=daa523b204fb54c5b79abaad175d641ec5f08167;hpb=7d1a4d2fb6bbf6600c61520c0f5a843cb1357e29;p=dpdk.git diff --git a/drivers/net/txgbe/txgbe_ipsec.c b/drivers/net/txgbe/txgbe_ipsec.c index daa523b204..445733f3ba 100644 --- a/drivers/net/txgbe/txgbe_ipsec.c +++ b/drivers/net/txgbe/txgbe_ipsec.c @@ -1,8 +1,9 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2015-2020 + * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd. + * Copyright(c) 2010-2017 Intel Corporation */ -#include +#include #include #include @@ -145,11 +146,11 @@ txgbe_crypto_add_sa(struct txgbe_crypto_session *ic_session) reg_val = TXGBE_IPSRXIDX_ENA | TXGBE_IPSRXIDX_WRITE | TXGBE_IPSRXIDX_TB_IP | (ip_index << 3); if (priv->rx_ip_tbl[ip_index].ip.type == IPv4) { - wr32(hw, TXGBE_IPSRXADDR(0), 0); + uint32_t ipv4 = priv->rx_ip_tbl[ip_index].ip.ipv4; + wr32(hw, TXGBE_IPSRXADDR(0), rte_cpu_to_be_32(ipv4)); wr32(hw, TXGBE_IPSRXADDR(1), 0); wr32(hw, TXGBE_IPSRXADDR(2), 0); - wr32(hw, TXGBE_IPSRXADDR(3), - priv->rx_ip_tbl[ip_index].ip.ipv4); + wr32(hw, TXGBE_IPSRXADDR(3), 0); } else { wr32(hw, TXGBE_IPSRXADDR(0), priv->rx_ip_tbl[ip_index].ip.ipv6[0]); @@ -371,7 +372,7 @@ txgbe_crypto_create_session(void *device, aead_xform = &conf->crypto_xform->aead; if (conf->ipsec.direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS) { - if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_SECURITY) { + if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_SECURITY) { ic_session->op = TXGBE_OP_AUTHENTICATED_DECRYPTION; } else { PMD_DRV_LOG(ERR, "IPsec decryption not enabled\n"); @@ -379,7 +380,7 @@ txgbe_crypto_create_session(void *device, return -ENOTSUP; } } else { - if (dev_conf->txmode.offloads & DEV_TX_OFFLOAD_SECURITY) { + if (dev_conf->txmode.offloads & RTE_ETH_TX_OFFLOAD_SECURITY) { ic_session->op = TXGBE_OP_AUTHENTICATED_ENCRYPTION; } else { PMD_DRV_LOG(ERR, "IPsec encryption not enabled\n"); @@ -610,11 +611,11 @@ txgbe_crypto_enable_ipsec(struct rte_eth_dev *dev) tx_offloads = dev->data->dev_conf.txmode.offloads; /* sanity checks */ - if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) { + if (rx_offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) { PMD_DRV_LOG(ERR, "RSC and IPsec not supported"); return -1; } - if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) { + if (rx_offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) { PMD_DRV_LOG(ERR, "HW CRC strip needs to be enabled for IPsec"); return -1; } @@ -633,7 +634,7 @@ txgbe_crypto_enable_ipsec(struct rte_eth_dev *dev) reg |= TXGBE_SECRXCTL_CRCSTRIP; wr32(hw, TXGBE_SECRXCTL, reg); - if (rx_offloads & DEV_RX_OFFLOAD_SECURITY) { + if (rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) { wr32m(hw, TXGBE_SECRXCTL, TXGBE_SECRXCTL_ODSA, 0); reg = rd32m(hw, TXGBE_SECRXCTL, TXGBE_SECRXCTL_ODSA); if (reg != 0) { @@ -641,7 +642,7 @@ txgbe_crypto_enable_ipsec(struct rte_eth_dev *dev) return -1; } } - if (tx_offloads & DEV_TX_OFFLOAD_SECURITY) { + if (tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY) { wr32(hw, TXGBE_SECTXCTL, TXGBE_SECTXCTL_STFWD); reg = rd32(hw, TXGBE_SECTXCTL); if (reg != TXGBE_SECTXCTL_STFWD) {