X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=examples%2Fdpdk_qat%2Fmain.c;h=aa9b1d5cc05433676231a5a7e80ec5ff5310e88b;hb=f03723017a2a5ea421df821eb0ff9a0bfcacff4f;hp=62507fd88ed51cc3fa4bbfec562d538cce2e886d;hpb=3460012bcce6b5884ae20662a5e7191d3adcc71f;p=dpdk.git diff --git a/examples/dpdk_qat/main.c b/examples/dpdk_qat/main.c index 62507fd88e..aa9b1d5cc0 100644 --- a/examples/dpdk_qat/main.c +++ b/examples/dpdk_qat/main.c @@ -1,35 +1,34 @@ /*- * BSD LICENSE - * - * Copyright(c) 2010-2012 Intel Corporation. All rights reserved. + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: - * - * * Redistributions of source code must retain the above copyright + * + * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * */ #include @@ -48,7 +47,6 @@ #include #include #include -#include #include #include #include @@ -64,41 +62,17 @@ #include #include #include -#include #include #include #include #include -#include "main.h" #include "crypto.h" -#define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM) #define NB_MBUF (32 * 1024) -/* - * RX and TX Prefetch, Host, and Write-back threshold values should be - * carefully set for optimal performance. Consult the network - * controller's datasheet and supporting DPDK documentation for guidance - * on how these parameters should be set. - */ -#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ -#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ -#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ - -/* - * These default values are optimized for use with the Intel(R) 82599 10 GbE - * Controller and the DPDK ixgbe PMD. Consider using other values for other - * network controllers and/or network drivers. - */ -#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ -#define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ -#define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ - #define MAX_PKT_BURST 32 -#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */ - -#define SOCKET0 0 +#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ #define TX_QUEUE_FLUSH_MASK 0xFFFFFFFF #define TSC_COUNT_LIMIT 1000 @@ -121,6 +95,9 @@ static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS]; static unsigned enabled_port_mask = 0; static int promiscuous_on = 1; /**< Ports set in promiscuous mode on by default. */ +/* list of enabled ports */ +static uint32_t dst_ports[RTE_MAX_ETHPORTS]; + struct mbuf_table { uint16_t len; struct rte_mbuf *m_table[MAX_PKT_BURST]; @@ -159,6 +136,7 @@ static uint16_t nb_lcore_params = sizeof(lcore_params_array_default) / static struct rte_eth_conf port_conf = { .rxmode = { + .mq_mode = ETH_MQ_RX_RSS, .split_hdr_size = 0, .header_split = 0, /**< Header Split disabled */ .hw_ip_checksum = 1, /**< IP checksum offload enabled */ @@ -169,32 +147,14 @@ static struct rte_eth_conf port_conf = { .rx_adv_conf = { .rss_conf = { .rss_key = NULL, - .rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6, + .rss_hf = ETH_RSS_IP, }, }, .txmode = { - .mq_mode = ETH_DCB_NONE, - }, -}; - -static const struct rte_eth_rxconf rx_conf = { - .rx_thresh = { - .pthresh = RX_PTHRESH, - .hthresh = RX_HTHRESH, - .wthresh = RX_WTHRESH, + .mq_mode = ETH_MQ_TX_NONE, }, }; -static const struct rte_eth_txconf tx_conf = { - .tx_thresh = { - .pthresh = TX_PTHRESH, - .hthresh = TX_HTHRESH, - .wthresh = TX_WTHRESH, - }, - .tx_free_thresh = 0, /* Use PMD default values */ - .tx_rs_thresh = 0, /* Use PMD default values */ -}; - static struct rte_mempool * pktmbuf_pool[RTE_MAX_NUMA_NODES]; struct lcore_conf { @@ -316,19 +276,13 @@ nic_tx_send_packet(struct rte_mbuf *pkt, uint8_t port) qconf->tx_mbufs[port].len = len; } -static inline uint8_t -get_output_port(uint8_t input_port) -{ - RTE_BUILD_BUG_ON((RTE_MAX_ETHPORTS & 1) != 0); - return (uint8_t)(input_port ^ 1); -} - /* main processing loop */ static __attribute__((noreturn)) int main_loop(__attribute__((unused)) void *dummy) { uint32_t lcoreid; struct lcore_conf *qconf; + const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; lcoreid = rte_lcore_id(); qconf = &lcore_conf[lcoreid]; @@ -348,7 +302,7 @@ main_loop(__attribute__((unused)) void *dummy) tsc = rte_rdtsc(); diff_tsc = tsc - qconf->tsc; - if (unlikely(diff_tsc > BURST_TX_DRAIN)) { + if (unlikely(diff_tsc > drain_tsc)) { nic_tx_flush_queues(qconf); crypto_flush_tx_queue(lcoreid); qconf->tsc = tsc; @@ -370,8 +324,9 @@ main_loop(__attribute__((unused)) void *dummy) continue; /* Send packet to either QAT encrypt, QAT decrypt or NIC TX */ if (pkt_from_nic_rx) { - struct ipv4_hdr *ip = (struct ipv4_hdr *) (rte_pktmbuf_mtod(pkt, unsigned char *) + - sizeof(struct ether_hdr)); + struct ipv4_hdr *ip = rte_pktmbuf_mtod_offset(pkt, + struct ipv4_hdr *, + sizeof(struct ether_hdr)); if (ip->src_addr & rte_cpu_to_be_32(ACTION_ENCRYPT)) { if (CRYPTO_RESULT_FAIL == crypto_encrypt(pkt, (enum cipher_alg)((ip->src_addr >> 16) & 0xFF), @@ -389,10 +344,10 @@ main_loop(__attribute__((unused)) void *dummy) } } - port = get_output_port(pkt->pkt.in_port); + port = dst_ports[pkt->port]; /* Transmit the packet */ - nic_tx_send_packet(pkt, port); + nic_tx_send_packet(pkt, (uint8_t)port); } } @@ -548,7 +503,7 @@ parse_config(const char *q_arg) if(size >= sizeof(s)) return -1; - rte_snprintf(s, sizeof(s), "%.*s", size, p); + snprintf(s, sizeof(s), "%.*s", size, p); if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) return -1; for (i = 0; i < _NUM_FLD; i++) { @@ -634,19 +589,14 @@ parse_args(int argc, char **argv) static void print_ethaddr(const char *name, const struct ether_addr *eth_addr) { - printf ("%s%02X:%02X:%02X:%02X:%02X:%02X", name, - eth_addr->addr_bytes[0], - eth_addr->addr_bytes[1], - eth_addr->addr_bytes[2], - eth_addr->addr_bytes[3], - eth_addr->addr_bytes[4], - eth_addr->addr_bytes[5]); + char buf[ETHER_ADDR_FMT_SIZE]; + ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr); + printf("%s%s", name, buf); } static int init_mem(void) { - const unsigned flags = 0; int socketid; unsigned lcoreid; char s[64]; @@ -659,13 +609,10 @@ init_mem(void) return -1; } if (pktmbuf_pool[socketid] == NULL) { - rte_snprintf(s, sizeof(s), "mbuf_pool_%d", socketid); + snprintf(s, sizeof(s), "mbuf_pool_%d", socketid); pktmbuf_pool[socketid] = - rte_mempool_create(s, NB_MBUF, MBUF_SIZE, 32, - sizeof(struct rte_pktmbuf_pool_private), - rte_pktmbuf_pool_init, NULL, - rte_pktmbuf_init, NULL, - socketid, flags); + rte_pktmbuf_pool_create(s, NB_MBUF, 32, 0, + RTE_MBUF_DEFAULT_BUF_SIZE, socketid); if (pktmbuf_pool[socketid] == NULL) { printf("Cannot init mbuf pool on socket %d\n", socketid); return -1; @@ -677,7 +624,7 @@ init_mem(void) } int -MAIN(int argc, char **argv) +main(int argc, char **argv) { struct lcore_conf *qconf; struct rte_eth_link link; @@ -686,7 +633,8 @@ MAIN(int argc, char **argv) uint16_t queueid; unsigned lcoreid; uint32_t nb_tx_queue; - uint8_t portid, nb_rx_queue, queue, socketid; + uint8_t portid, nb_rx_queue, queue, socketid, last_port; + unsigned nb_ports_in_mask = 0; /* init EAL */ ret = rte_eal_init(argc, argv); @@ -700,19 +648,6 @@ MAIN(int argc, char **argv) if (ret < 0) return -1; - /* init driver */ -#ifdef RTE_LIBRTE_IGB_PMD - if (rte_igb_pmd_init() < 0) - rte_panic("Cannot init igb pmd\n"); -#endif -#ifdef RTE_LIBRTE_IXGBE_PMD - if (rte_ixgbe_pmd_init() < 0) - rte_panic("Cannot init ixgbe pmd\n"); -#endif - - if (rte_eal_pci_probe() < 0) - rte_panic("Cannot probe PCI\n"); - if (check_lcore_params() < 0) rte_panic("check_lcore_params failed\n"); @@ -725,12 +660,37 @@ MAIN(int argc, char **argv) return -1; nb_ports = rte_eth_dev_count(); - if (nb_ports > RTE_MAX_ETHPORTS) - nb_ports = RTE_MAX_ETHPORTS; if (check_port_config(nb_ports) < 0) rte_panic("check_port_config failed\n"); + /* reset dst_ports */ + for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) + dst_ports[portid] = 0; + last_port = 0; + + /* + * Each logical core is assigned a dedicated TX queue on each port. + */ + for (portid = 0; portid < nb_ports; portid++) { + /* skip ports that are not enabled */ + if ((enabled_port_mask & (1 << portid)) == 0) + continue; + + if (nb_ports_in_mask % 2) { + dst_ports[portid] = last_port; + dst_ports[last_port] = portid; + } + else + last_port = portid; + + nb_ports_in_mask++; + } + if (nb_ports_in_mask % 2) { + printf("Notice: odd number of ports in portmask.\n"); + dst_ports[last_port] = last_port; + } + /* initialize all ports */ for (portid = 0; portid < nb_ports; portid++) { /* skip ports that are not enabled */ @@ -772,7 +732,8 @@ MAIN(int argc, char **argv) printf("txq=%u,%d,%d ", lcoreid, queueid, socketid); fflush(stdout); ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd, - socketid, &tx_conf); + socketid, + NULL); if (ret < 0) rte_panic("rte_eth_tx_queue_setup: err=%d, " "port=%d\n", ret, portid); @@ -797,7 +758,9 @@ MAIN(int argc, char **argv) fflush(stdout); ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd, - socketid, &rx_conf, pktmbuf_pool[socketid]); + socketid, + NULL, + pktmbuf_pool[socketid]); if (ret < 0) rte_panic("rte_eth_rx_queue_setup: err=%d," "port=%d\n", ret, portid);