X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=examples%2Fqos_sched%2Fargs.c;h=10ca7bea61f303251651b122851acc22bbe8b7c8;hb=fdadccfa3fb97acf06641a5fa823b05de1cca0bb;hp=ddf9ba465fc8372a5ff6376295912ff4e9ddb1bb;hpb=6f41fe75e2dd8dd38f7bea7b9501edd4f9b72fa5;p=dpdk.git diff --git a/examples/qos_sched/args.c b/examples/qos_sched/args.c old mode 100755 new mode 100644 index ddf9ba465f..10ca7bea61 --- a/examples/qos_sched/args.c +++ b/examples/qos_sched/args.c @@ -1,34 +1,5 @@ -/*- - * BSD LICENSE - * - * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2010-2014 Intel Corporation */ #include @@ -51,7 +22,7 @@ #define MAX_OPT_VALUES 8 #define SYS_CPU_DIR "/sys/devices/system/cpu/cpu%u/topology/" -static uint32_t app_master_core = 1; +static uint32_t app_main_core = 1; static uint32_t app_numa_mask; static uint64_t app_used_core_mask = 0; static uint64_t app_used_port_mask = 0; @@ -68,8 +39,8 @@ static const char usage[] = " multiple pfc can be configured in command line \n" " \n" "Application optional parameters: \n" - " --i : run in interactive mode (default value is %u) \n" - " --mst I : master core index (default value is %u) \n" + " -i : run in interactive mode (default value is %u) \n" + " --mnc I : main core index (default value is %u) \n" " --rsz \"A, B, C\" : Ring sizes \n" " A = Size (in number of buffer descriptors) of each of the NIC RX \n" " rings read by the I/O RX lcores (default value is %u) \n" @@ -101,7 +72,7 @@ static const char usage[] = static void app_usage(const char *prgname) { - printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_master_core, + printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_main_core, APP_RX_DESC_DEFAULT, APP_RING_SIZE, APP_TX_DESC_DEFAULT, MAX_PKT_RX_BURST, PKT_ENQUEUE, PKT_DEQUEUE, MAX_PKT_TX_BURST, NB_MBUF, @@ -110,25 +81,20 @@ app_usage(const char *prgname) ); } -static inline int str_is(const char *str, const char *is) -{ - return (strcmp(str, is) == 0); -} /* returns core mask used by DPDK */ static uint64_t app_eal_core_mask(void) { - uint32_t i; uint64_t cm = 0; - struct rte_config *cfg = rte_eal_get_configuration(); + uint32_t i; - for (i = 0; i < RTE_MAX_LCORE; i++) { - if (cfg->lcore_role[i] == ROLE_RTE) + for (i = 0; i < APP_MAX_LCORE; i++) { + if (rte_lcore_has_role(i, ROLE_RTE)) cm |= (1ULL << i); } - cm |= (1ULL << cfg->master_lcore); + cm |= (1ULL << rte_get_main_lcore()); return cm; } @@ -142,7 +108,7 @@ app_cpu_core_count(void) char path[PATH_MAX]; uint32_t ncores = 0; - for(i = 0; i < RTE_MAX_LCORE; i++) { + for (i = 0; i < APP_MAX_LCORE; i++) { len = snprintf(path, sizeof(path), SYS_CPU_DIR, i); if (len <= 0 || (unsigned)len >= sizeof(path)) continue; @@ -162,7 +128,7 @@ static int app_parse_opt_vals(const char *conf_str, char separator, uint32_t n_vals, uint32_t *opt_vals) { char *string; - uint32_t i, n_tokens; + int i, n_tokens; char *tokens[MAX_OPT_VALUES]; if (conf_str == NULL || opt_vals == NULL || n_vals == 0 || n_vals > MAX_OPT_VALUES) @@ -175,9 +141,11 @@ app_parse_opt_vals(const char *conf_str, char separator, uint32_t n_vals, uint32 n_tokens = rte_strsplit(string, strnlen(string, 32), tokens, n_vals, separator); - for(i = 0; i < n_tokens; i++) { + if (n_tokens > MAX_OPT_VALUES) + return -1; + + for (i = 0; i < n_tokens; i++) opt_vals[i] = (uint32_t)atol(tokens[i]); - } free(string); @@ -243,14 +211,15 @@ app_parse_flow_conf(const char *conf_str) struct flow_conf *pconf; uint64_t mask; + memset(vals, 0, sizeof(vals)); ret = app_parse_opt_vals(conf_str, ',', 6, vals); if (ret < 4 || ret > 5) return ret; pconf = &qos_conf[nb_pfc]; - pconf->rx_port = (uint8_t)vals[0]; - pconf->tx_port = (uint8_t)vals[1]; + pconf->rx_port = vals[0]; + pconf->tx_port = vals[1]; pconf->rx_core = (uint8_t)vals[2]; pconf->wt_core = (uint8_t)vals[3]; if (ret == 5) @@ -264,19 +233,19 @@ app_parse_flow_conf(const char *conf_str) } if (pconf->rx_port >= RTE_MAX_ETHPORTS) { - RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu8" index\n", + RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu16" index\n", nb_pfc, pconf->rx_port); return -1; } if (pconf->tx_port >= RTE_MAX_ETHPORTS) { - RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu8" index\n", - nb_pfc, pconf->rx_port); + RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu16" index\n", + nb_pfc, pconf->tx_port); return -1; } mask = 1lu << pconf->rx_port; if (app_used_rx_port_mask & mask) { - RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu8" is used already\n", + RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu16" is used already\n", nb_pfc, pconf->rx_port); return -1; } @@ -285,7 +254,7 @@ app_parse_flow_conf(const char *conf_str) mask = 1lu << pconf->tx_port; if (app_used_tx_port_mask & mask) { - RTE_LOG(ERR, APP, "pfc %u: port %"PRIu8" is used already\n", + RTE_LOG(ERR, APP, "pfc %u: port %"PRIu16" is used already\n", nb_pfc, pconf->tx_port); return -1; } @@ -324,6 +293,25 @@ app_parse_burst_conf(const char *conf_str) return 0; } +enum { +#define OPT_PFC "pfc" + OPT_PFC_NUM = 256, +#define OPT_MNC "mnc" + OPT_MNC_NUM, +#define OPT_RSZ "rsz" + OPT_RSZ_NUM, +#define OPT_BSZ "bsz" + OPT_BSZ_NUM, +#define OPT_MSZ "msz" + OPT_MSZ_NUM, +#define OPT_RTH "rth" + OPT_RTH_NUM, +#define OPT_TTH "tth" + OPT_TTH_NUM, +#define OPT_CFG "cfg" + OPT_CFG_NUM, +}; + /* * Parses the argument given in the command line of the application, * calculates mask for used cores and initializes EAL with calculated core mask @@ -333,20 +321,19 @@ app_parse_args(int argc, char **argv) { int opt, ret; int option_index; - const char *optname; char *prgname = argv[0]; uint32_t i, nb_lcores; static struct option lgopts[] = { - { "pfc", 1, 0, 0 }, - { "mst", 1, 0, 0 }, - { "rsz", 1, 0, 0 }, - { "bsz", 1, 0, 0 }, - { "msz", 1, 0, 0 }, - { "rth", 1, 0, 0 }, - { "tth", 1, 0, 0 }, - { "cfg", 1, 0, 0 }, - { NULL, 0, 0, 0 } + {OPT_PFC, 1, NULL, OPT_PFC_NUM}, + {OPT_MNC, 1, NULL, OPT_MNC_NUM}, + {OPT_RSZ, 1, NULL, OPT_RSZ_NUM}, + {OPT_BSZ, 1, NULL, OPT_BSZ_NUM}, + {OPT_MSZ, 1, NULL, OPT_MSZ_NUM}, + {OPT_RTH, 1, NULL, OPT_RTH_NUM}, + {OPT_TTH, 1, NULL, OPT_TTH_NUM}, + {OPT_CFG, 1, NULL, OPT_CFG_NUM}, + {NULL, 0, 0, 0 } }; /* initialize EAL first */ @@ -369,84 +356,87 @@ app_parse_args(int argc, char **argv) interactive = 1; break; /* long options */ - case 0: - optname = lgopts[option_index].name; - if (str_is(optname, "pfc")) { - ret = app_parse_flow_conf(optarg); - if (ret) { - RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", optarg); - return -1; - } - break; - } - if (str_is(optname, "mst")) { - app_master_core = (uint32_t)atoi(optarg); - break; - } - if (str_is(optname, "rsz")) { - ret = app_parse_ring_conf(optarg); - if (ret) { - RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", optarg); - return -1; - } - break; + + case OPT_PFC_NUM: + ret = app_parse_flow_conf(optarg); + if (ret) { + RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", + optarg); + return -1; } - if (str_is(optname, "bsz")) { - ret = app_parse_burst_conf(optarg); - if (ret) { - RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", optarg); - return -1; - } - break; + break; + + case OPT_MNC_NUM: + app_main_core = (uint32_t)atoi(optarg); + break; + + case OPT_RSZ_NUM: + ret = app_parse_ring_conf(optarg); + if (ret) { + RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", + optarg); + return -1; } - if (str_is(optname, "msz")) { - mp_size = atoi(optarg); - if (mp_size <= 0) { - RTE_LOG(ERR, APP, "Invalid mempool size %s\n", optarg); - return -1; - } - break; + break; + + case OPT_BSZ_NUM: + ret = app_parse_burst_conf(optarg); + if (ret) { + RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", + optarg); + return -1; } - if (str_is(optname, "rth")) { - ret = app_parse_rth_conf(optarg); - if (ret) { - RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", optarg); - return -1; - } - break; + break; + + case OPT_MSZ_NUM: + mp_size = atoi(optarg); + if (mp_size <= 0) { + RTE_LOG(ERR, APP, "Invalid mempool size %s\n", + optarg); + return -1; } - if (str_is(optname, "tth")) { - ret = app_parse_tth_conf(optarg); - if (ret) { - RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", optarg); - return -1; - } - break; + break; + + case OPT_RTH_NUM: + ret = app_parse_rth_conf(optarg); + if (ret) { + RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", + optarg); + return -1; } - if (str_is(optname, "cfg")) { - cfg_profile = optarg; - break; + break; + + case OPT_TTH_NUM: + ret = app_parse_tth_conf(optarg); + if (ret) { + RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", + optarg); + return -1; } break; + case OPT_CFG_NUM: + cfg_profile = optarg; + break; + default: app_usage(prgname); return -1; } } - /* check master core index validity */ - for(i = 0; i <= app_master_core; i++) { - if (app_used_core_mask & (1u << app_master_core)) { - RTE_LOG(ERR, APP, "Master core index is not configured properly\n"); + /* check main core index validity */ + for (i = 0; i <= app_main_core; i++) { + if (app_used_core_mask & (1u << app_main_core)) { + RTE_LOG(ERR, APP, "Main core index is not configured properly\n"); app_usage(prgname); return -1; } } - app_used_core_mask |= 1u << app_master_core; + app_used_core_mask |= 1u << app_main_core; if ((app_used_core_mask != app_eal_core_mask()) || - (app_master_core != rte_get_master_lcore())) { + (app_main_core != rte_get_main_lcore())) { RTE_LOG(ERR, APP, "EAL core mask not configured properly, must be %" PRIx64 " instead of %" PRIx64 "\n" , app_used_core_mask, app_eal_core_mask()); return -1; @@ -483,4 +473,3 @@ app_parse_args(int argc, char **argv) return 0; } -