X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=examples%2Fqos_sched%2Fmain.h;h=23bc418d9716c4187421a639b17fe9e99e83981b;hb=f74904ce98e84f48e8f3a96b7ad6b6347c3f44b6;hp=3d25a11850b27dccb329673df783b3c84a9b2ec7;hpb=1c1d4d7a923d4804f1926fc5264f9ecdd8977b04;p=dpdk.git

diff --git a/examples/qos_sched/main.h b/examples/qos_sched/main.h
old mode 100755
new mode 100644
index 3d25a11850..23bc418d97
--- a/examples/qos_sched/main.h
+++ b/examples/qos_sched/main.h
@@ -1,34 +1,5 @@
-/*-
- *   BSD LICENSE
- * 
- *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
- *   All rights reserved.
- * 
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- * 
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- * 
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2014 Intel Corporation
  */
 
 #ifndef _MAIN_H_
@@ -40,21 +11,16 @@ extern "C" {
 
 #include <rte_sched.h>
 
-#ifdef RTE_EXEC_ENV_BAREMETAL
-#error "Baremetal is not supported"
-#else
-#define MAIN main
-#endif
-
 #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1
 
 /*
  * Configurable number of RX/TX ring descriptors
  */
-#define APP_RX_DESC_DEFAULT 128
-#define APP_TX_DESC_DEFAULT 256
+#define APP_INTERACTIVE_DEFAULT 0
+
+#define APP_RX_DESC_DEFAULT 1024
+#define APP_TX_DESC_DEFAULT 1024
 
-#define MBUF_SIZE (1528 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
 #define APP_RING_SIZE (8*1024)
 #define NB_MBUF   (2*1024*1024)
 
@@ -73,9 +39,18 @@ extern "C" {
 
 #define BURST_TX_DRAIN_US 100
 
-#define MAX_DATA_STREAMS (RTE_MAX_LCORE/2)
+#ifndef APP_MAX_LCORE
+#if (RTE_MAX_LCORE > 64)
+#define APP_MAX_LCORE 64
+#else
+#define APP_MAX_LCORE RTE_MAX_LCORE
+#endif
+#endif
+
+#define MAX_DATA_STREAMS (APP_MAX_LCORE/2)
 #define MAX_SCHED_SUBPORTS		8
-#define MAX_SCHED_PIPES  		4096
+#define MAX_SCHED_PIPES		4096
+#define MAX_SCHED_PIPE_PROFILES		256
 
 #ifndef APP_COLLECT_STAT
 #define APP_COLLECT_STAT		1
@@ -87,6 +62,9 @@ extern "C" {
 #define APP_STATS_ADD(stat,val) do {(void) (val);} while (0)
 #endif
 
+#define APP_QAVG_NTIMES 10
+#define APP_QAVG_PERIOD 100
+
 struct thread_stat
 {
 	uint64_t nb_rx;
@@ -100,8 +78,8 @@ struct thread_conf
 	uint32_t n_mbufs;
 	struct rte_mbuf **m_table;
 
-	uint8_t rx_port;
-	uint8_t tx_port;
+	uint16_t rx_port;
+	uint16_t tx_port;
 	uint16_t rx_queue;
 	uint16_t tx_queue;
 	struct rte_ring *rx_ring;
@@ -119,8 +97,8 @@ struct flow_conf
 	uint32_t rx_core;
 	uint32_t wt_core;
 	uint32_t tx_core;
-	uint8_t rx_port;
-	uint8_t tx_port;
+	uint16_t rx_port;
+	uint16_t tx_port;
 	uint16_t rx_queue;
 	uint16_t tx_queue;
 	struct rte_ring *rx_ring;
@@ -156,6 +134,9 @@ struct ring_thresh
 	uint8_t wthresh; /**< Ring writeback threshold. */
 };
 
+extern uint8_t interactive;
+extern uint32_t qavg_period;
+extern uint32_t qavg_ntimes;
 extern uint32_t nb_pfc;
 extern const char *cfg_profile;
 extern int mp_size;
@@ -167,17 +148,31 @@ extern struct burst_conf burst_conf;
 extern struct ring_thresh rx_thresh;
 extern struct ring_thresh tx_thresh;
 
+extern uint32_t active_queues[RTE_SCHED_QUEUES_PER_PIPE];
+extern uint32_t n_active_queues;
+
 extern struct rte_sched_port_params port_params;
+extern struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS];
 
-int MAIN(int argc, char **argv);
 int app_parse_args(int argc, char **argv);
 int app_init(void);
 
+void prompt(void);
 void app_rx_thread(struct thread_conf **qconf);
 void app_tx_thread(struct thread_conf **qconf);
 void app_worker_thread(struct thread_conf **qconf);
 void app_mixed_thread(struct thread_conf **qconf);
 
+void app_stat(void);
+int subport_stat(uint16_t port_id, uint32_t subport_id);
+int pipe_stat(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id);
+int qavg_q(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id,
+	   uint8_t tc, uint8_t q);
+int qavg_tcpipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id,
+		uint8_t tc);
+int qavg_pipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id);
+int qavg_tcsubport(uint16_t port_id, uint32_t subport_id, uint8_t tc);
+int qavg_subport(uint16_t port_id, uint32_t subport_id);
 
 #ifdef __cplusplus
 }